| version 1.12, 2003/12/09 15:49:14 | version 1.22, 2004/04/14 20:39:12 | 
| Line 1 | Line 1 | 
 | #include        "compiler.h" | #include        "compiler.h" | 
 | #include        "cpucore.h" | #include        "cpucore.h" | 
 | #include        "memory.h" |  | 
 | #include        "egcmem.h" | #include        "egcmem.h" | 
 | #include        "pccore.h" | #include        "pccore.h" | 
 | #include        "iocore.h" | #include        "iocore.h" | 
| Line 8 | Line 7 | 
 | #include        "font.h" | #include        "font.h" | 
 |  |  | 
 |  |  | 
| #define USE_HIMEM               0x10fff0 | BYTE    mem[0x200000]; | 
 |  |  | 
 | #if defined(TRACE) |  | 
 | #define MEMORY_DEBUG |  | 
 | #endif |  | 
 |  |  | 
 | // ---- write byte | // ---- write byte | 
 |  |  | 
| static void MEMCALL i286_wt(UINT32 address, REG8 value) { | static void MEMCALL i286_wt(UINT32 address, REG8 value) {               // MAIN | 
 |  |  | 
 | mem[address & CPU_ADRSMASK] = (BYTE)value; | mem[address & CPU_ADRSMASK] = (BYTE)value; | 
 | } | } | 
 |  |  | 
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) {               // TRAM | 
 |  |  | 
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < 0xa2000) { | if (address < 0xa2000) { | 
 | mem[address] = (BYTE)value; | mem[address] = (BYTE)value; | 
 | tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; | 
| Line 53  static void MEMCALL tram_wt(UINT32 addre | Line 49  static void MEMCALL tram_wt(UINT32 addre | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { | static void MEMCALL vram_w0(UINT32 address, REG8 value) {               // VRAM | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | mem[address] = (BYTE)value; | mem[address] = (BYTE)value; | 
 | vramupdate[LOW15(address)] |= 1; | vramupdate[LOW15(address)] |= 1; | 
 | gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; | 
 | } | } | 
 |  |  | 
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { | static void MEMCALL vram_w1(UINT32 address, REG8 value) {               // VRAM | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; | 
 | vramupdate[LOW15(address)] |= 2; | vramupdate[LOW15(address)] |= 2; | 
 | gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; | 
 | } | } | 
 |  |  | 
| static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { | static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) {             // VRAM | 
 |  |  | 
 | REG8    mask; | REG8    mask; | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | mask = ~value; | mask = ~value; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 1; | vramupdate[address] |= 1; | 
| Line 98  static void MEMCALL grcg_rmw0(UINT32 add | Line 94  static void MEMCALL grcg_rmw0(UINT32 add | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { | static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) {             // VRAM | 
 |  |  | 
 | REG8    mask; | REG8    mask; | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | mask = ~value; | mask = ~value; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 2; | vramupdate[address] |= 2; | 
| Line 127  static void MEMCALL grcg_rmw1(UINT32 add | Line 123  static void MEMCALL grcg_rmw1(UINT32 add | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { | static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) {             // VRAM | 
 |  |  | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 1; | vramupdate[address] |= 1; | 
 | gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; | 
| Line 151  static void MEMCALL grcg_tdw0(UINT32 add | Line 147  static void MEMCALL grcg_tdw0(UINT32 add | 
 | (void)value; | (void)value; | 
 | } | } | 
 |  |  | 
| static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { | static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) {             // VRAM | 
 |  |  | 
 | BYTE    *vram; | BYTE    *vram; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | address = LOW15(address); | address = LOW15(address); | 
 | vramupdate[address] |= 2; | vramupdate[address] |= 2; | 
 | gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; | 
| Line 175  static void MEMCALL grcg_tdw1(UINT32 add | Line 171  static void MEMCALL grcg_tdw1(UINT32 add | 
 | (void)value; | (void)value; | 
 | } | } | 
 |  |  | 
| static void MEMCALL egc_wt(UINT32 address, REG8 value) { | static void MEMCALL egc_wt(UINT32 address, REG8 value) {                // VRAM | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | egc_write(address, value); | egc_write(address, value); | 
 | } | } | 
 |  |  | 
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { | static void MEMCALL emmc_wt(UINT32 address, REG8 value) {               // EMS | 
|  |  | 
|  | CPU_EMSPTR[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | 
|  | } | 
|  |  | 
|  | static void MEMCALL i286_wd(UINT32 address, REG8 value) {               // D000¡ÁDFFF | 
|  |  | 
|  | if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) { | 
|  | mem[address] = (BYTE)value; | 
|  | } | 
|  | } | 
|  |  | 
|  | static void MEMCALL i286_wb(UINT32 address, REG8 value) {               // F800¡ÁFFFF | 
 |  |  | 
| extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | 
 | } | } | 
 |  |  | 
| static void MEMCALL i286_wn(UINT32 address, REG8 value) { | static void MEMCALL i286_wn(UINT32 address, REG8 value) {               // NONE | 
 |  |  | 
 | (void)address; | (void)address; | 
 | (void)value; | (void)value; | 
| Line 194  static void MEMCALL i286_wn(UINT32 addre | Line 203  static void MEMCALL i286_wn(UINT32 addre | 
 |  |  | 
 | // ---- read byte | // ---- read byte | 
 |  |  | 
| static REG8 MEMCALL i286_rd(UINT32 address) { | static REG8 MEMCALL i286_rd(UINT32 address) {                                   // MAIN | 
 |  |  | 
 | return(mem[address & CPU_ADRSMASK]); | return(mem[address & CPU_ADRSMASK]); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) {                                   // TRAM | 
 |  |  | 
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < 0xa4000) { | if (address < 0xa4000) { | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
| Line 216  static REG8 MEMCALL tram_rd(UINT32 addre | Line 225  static REG8 MEMCALL tram_rd(UINT32 addre | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) {                                   // VRAM | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) {                                   // VRAM | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL grcg_tcr0(UINT32 address) { | static REG8 MEMCALL grcg_tcr0(UINT32 address) {                                 // VRAM | 
 |  |  | 
 | const BYTE      *vram; | const BYTE      *vram; | 
 | REG8    ret; | REG8    ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | ret = 0; | ret = 0; | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 251  const BYTE *vram; | Line 260  const BYTE *vram; | 
 | return(ret ^ 0xff); | return(ret ^ 0xff); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL grcg_tcr1(UINT32 address) { | static REG8 MEMCALL grcg_tcr1(UINT32 address) {                                 // VRAM | 
 |  |  | 
 | const BYTE      *vram; | const BYTE      *vram; | 
 | REG8    ret; | REG8    ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | ret = 0; | ret = 0; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 274  const BYTE *vram; | Line 283  const BYTE *vram; | 
 | return(ret ^ 0xff); | return(ret ^ 0xff); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) {                                    // VRAM | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | return(egc_read(address)); | return(egc_read(address)); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL emmc_rd(UINT32 address) { | static REG8 MEMCALL emmc_rd(UINT32 address) {                                   // EMS | 
 |  |  | 
| return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]); | return(CPU_EMSPTR[(address >> 14) & 3][LOW14(address)]); | 
 | } | } | 
 |  |  | 
| static REG8 MEMCALL i286_itf(UINT32 address) { | static REG8 MEMCALL i286_rb(UINT32 address) {                                   // F800-FFFF | 
 |  |  | 
 | if (CPU_ITFBANK) { | if (CPU_ITFBANK) { | 
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; | 
 | } | } | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
| Line 305  static void MEMCALL i286w_wt(UINT32 addr | Line 315  static void MEMCALL i286w_wt(UINT32 addr | 
 |  |  | 
 | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | 
 |  |  | 
 |  | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < 0xa1fff) { | if (address < 0xa1fff) { | 
 | STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); | 
 | tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; | 
| Line 338  static void MEMCALL tramw_wt(UINT32 addr | Line 349  static void MEMCALL tramw_wt(UINT32 addr | 
 | } | } | 
 | } | } | 
 | else if (address < 0xa5000) { | else if (address < 0xa5000) { | 
| if (address & 1) { | if (!(address & 1)) { | 
 | value >>= 8; | value >>= 8; | 
 | } | } | 
 | if (cgwindow.writable & 1) { | if (cgwindow.writable & 1) { | 
| Line 350  static void MEMCALL tramw_wt(UINT32 addr | Line 361  static void MEMCALL tramw_wt(UINT32 addr | 
 |  |  | 
 |  |  | 
 | #define GRCGW_NON(page) {                                                                                       \ | #define GRCGW_NON(page) {                                                                                       \ | 
| CPU_REMCLOCK -= vramop.vramwait;                                                                \ | CPU_REMCLOCK -= MEMWAIT_VRAM;                                                                   \ | 
 | STOREINTELWORD(mem + address + VRAM_STEP*(page), value);                \ | STOREINTELWORD(mem + address + VRAM_STEP*(page), value);                \ | 
 | vramupdate[LOW15(address)] |= (1 << page);                                              \ | vramupdate[LOW15(address)] |= (1 << page);                                              \ | 
 | vramupdate[LOW15(address + 1)] |= (1 << page);                                  \ | vramupdate[LOW15(address + 1)] |= (1 << page);                                  \ | 
| Line 359  static void MEMCALL tramw_wt(UINT32 addr | Line 370  static void MEMCALL tramw_wt(UINT32 addr | 
 |  |  | 
 | #define GRCGW_RMW(page) {                                                                                       \ | #define GRCGW_RMW(page) {                                                                                       \ | 
 | BYTE    *vram;                                                                                                  \ | BYTE    *vram;                                                                                                  \ | 
| CPU_REMCLOCK -= vramop.grcgwait;                                                                \ | CPU_REMCLOCK -= MEMWAIT_GRCG;                                                                   \ | 
 | address = LOW15(address);                                                                               \ | address = LOW15(address);                                                                               \ | 
 | vramupdate[address] |= (1 << page);                                                             \ | vramupdate[address] |= (1 << page);                                                             \ | 
 | vramupdate[address + 1] |= (1 << page);                                                 \ | vramupdate[address + 1] |= (1 << page);                                                 \ | 
| Line 405  static void MEMCALL tramw_wt(UINT32 addr | Line 416  static void MEMCALL tramw_wt(UINT32 addr | 
 |  |  | 
 | #define GRCGW_TDW(page) {                                                                                       \ | #define GRCGW_TDW(page) {                                                                                       \ | 
 | BYTE    *vram;                                                                                                  \ | BYTE    *vram;                                                                                                  \ | 
| CPU_REMCLOCK -= vramop.grcgwait;                                                                \ | CPU_REMCLOCK -= MEMWAIT_GRCG;                                                                   \ | 
 | address = LOW15(address);                                                                               \ | address = LOW15(address);                                                                               \ | 
 | vramupdate[address] |= (1 << page);                                                             \ | vramupdate[address] |= (1 << page);                                                             \ | 
 | vramupdate[address + 1] |= (1 << page);                                                 \ | vramupdate[address + 1] |= (1 << page);                                                 \ | 
| Line 439  static void MEMCALL grcgw_tdw1(UINT32 ad | Line 450  static void MEMCALL grcgw_tdw1(UINT32 ad | 
 |  |  | 
 | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | 
 |  |  | 
| if (!(address & 1)) { | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
| egc_write_w(address, value); | egc_write_w(address, value); | 
| } |  | 
| else { |  | 
| if (!(egc.sft & 0x1000)) { |  | 
| egc_write(address, (REG8)value); |  | 
| egc_write(address + 1, (REG8)(value >> 8)); |  | 
| } |  | 
| else { |  | 
| egc_write(address + 1, (REG8)(value >> 8)); |  | 
| egc_write(address, (REG8)value); |  | 
| } |  | 
| } |  | 
 | } | } | 
 |  |  | 
 | static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | 
| Line 459  static void MEMCALL emmcw_wt(UINT32 addr | Line 459  static void MEMCALL emmcw_wt(UINT32 addr | 
 | BYTE    *ptr; | BYTE    *ptr; | 
 |  |  | 
 | if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { | 
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = CPU_EMSPTR[(address >> 14) & 3] + LOW14(address); | 
 | STOREINTELWORD(ptr, value); | STOREINTELWORD(ptr, value); | 
 | } | } | 
 | else { | else { | 
| extmem.pageptr[(address >> 14) & 3][0x3fff] = (BYTE)value; | CPU_EMSPTR[(address >> 14) & 3][0x3fff] = (BYTE)value; | 
| extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); | CPU_EMSPTR[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); | 
|  | } | 
|  | } | 
|  |  | 
|  | static void MEMCALL i286w_wd(UINT32 address, REG16 value) { | 
|  |  | 
|  | BYTE    *ptr; | 
|  | UINT16  bit; | 
|  |  | 
|  | ptr = mem + address; | 
|  | bit = 1 << ((address >> 12) & 15); | 
|  | if ((address + 1) & 0xfff) { | 
|  | if (CPU_RAM_D000 & bit) { | 
|  | STOREINTELWORD(ptr, value); | 
|  | } | 
 | } | } | 
 |  | else { | 
 |  | if (CPU_RAM_D000 & bit) { | 
 |  | ptr[0] = (UINT8)value; | 
 |  | } | 
 |  | if (CPU_RAM_D000 & (bit << 1)) { | 
 |  | ptr[1] = (UINT8)(value >> 8); | 
 |  | } | 
 |  | } | 
 |  | } | 
 |  |  | 
 |  | static void MEMCALL i286w_wb(UINT32 address, REG16 value) { | 
 |  |  | 
 |  | BYTE    *ptr; | 
 |  |  | 
 |  | ptr = mem + (address + 0x1c8000 - 0xe8000); | 
 |  | STOREINTELWORD(ptr, value); | 
 | } | } | 
 |  |  | 
 | static void MEMCALL i286w_wn(UINT32 address, REG16 value) { | static void MEMCALL i286w_wn(UINT32 address, REG16 value) { | 
| Line 487  static REG16 MEMCALL i286w_rd(UINT32 add | Line 517  static REG16 MEMCALL i286w_rd(UINT32 add | 
 |  |  | 
 | static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; | 
 | if (address < (0xa4000 - 1)) { | if (address < (0xa4000 - 1)) { | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
| Line 516  static REG16 MEMCALL tramw_rd(UINT32 add | Line 546  static REG16 MEMCALL tramw_rd(UINT32 add | 
 |  |  | 
 | static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
 |  |  | 
 | static REG16 MEMCALL vramw_r1(UINT32 address) { | static REG16 MEMCALL vramw_r1(UINT32 address) { | 
 |  |  | 
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; | 
 | return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); | 
 | } | } | 
 |  |  | 
| Line 531  static REG16 MEMCALL grcgw_tcr0(UINT32 a | Line 561  static REG16 MEMCALL grcgw_tcr0(UINT32 a | 
 | BYTE    *vram; | BYTE    *vram; | 
 | REG16   ret; | REG16   ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | ret = 0; | ret = 0; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 554  static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 584  static REG16 MEMCALL grcgw_tcr1(UINT32 a | 
 | BYTE    *vram; | BYTE    *vram; | 
 | REG16   ret; | REG16   ret; | 
 |  |  | 
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
 | ret = 0; | ret = 0; | 
 | vram = mem + LOW15(address); | vram = mem + LOW15(address); | 
 | if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { | 
| Line 574  static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 604  static REG16 MEMCALL grcgw_tcr1(UINT32 a | 
 |  |  | 
 | static REG16 MEMCALL egcw_rd(UINT32 address) { | static REG16 MEMCALL egcw_rd(UINT32 address) { | 
 |  |  | 
| REG16   ret; | CPU_REMCLOCK -= MEMWAIT_GRCG; | 
|  | return(egc_read_w(address)); | 
| if (!(address & 1)) { |  | 
| return(egc_read_w(address)); |  | 
| } |  | 
| else { |  | 
| if (!(egc.sft & 0x1000)) { |  | 
| ret = egc_read(address); |  | 
| ret += egc_read(address + 1) << 8; |  | 
| return(ret); |  | 
| } |  | 
| else { |  | 
| ret = egc_read(address + 1) << 8; |  | 
| ret += egc_read(address); |  | 
| return(ret); |  | 
| } |  | 
| } |  | 
 | } | } | 
 |  |  | 
 | static REG16 MEMCALL emmcw_rd(UINT32 address) { | static REG16 MEMCALL emmcw_rd(UINT32 address) { | 
| Line 599  const BYTE *ptr; | Line 614  const BYTE *ptr; | 
 | REG16   ret; | REG16   ret; | 
 |  |  | 
 | if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { | 
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = CPU_EMSPTR[(address >> 14) & 3] + LOW14(address); | 
 | return(LOADINTELWORD(ptr)); | return(LOADINTELWORD(ptr)); | 
 | } | } | 
 | else { | else { | 
| ret = extmem.pageptr[(address >> 14) & 3][0x3fff]; | ret = CPU_EMSPTR[(address >> 14) & 3][0x3fff]; | 
| ret += extmem.pageptr[((address + 1) >> 14) & 3][0] << 8; | ret += CPU_EMSPTR[((address + 1) >> 14) & 3][0] << 8; | 
 | return(ret); | return(ret); | 
 | } | } | 
 | } | } | 
 |  |  | 
| static REG16 MEMCALL i286w_itf(UINT32 address) { | static REG16 MEMCALL i286w_rb(UINT32 address) { | 
 |  |  | 
 | if (CPU_ITFBANK) { | if (CPU_ITFBANK) { | 
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; | 
 | } | } | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
| Line 633  typedef struct { | Line 648  typedef struct { | 
 | } MEMFN; | } MEMFN; | 
 |  |  | 
 | typedef struct { | typedef struct { | 
 |  | MEM8READ        brd8;           // E8000-F7FFF byte read | 
 |  | MEM8READ        ird8;           // F8000-FFFFF byte read | 
 |  | MEM8WRITE       bwr8;           // E8000-FFFFF byte write | 
 |  | MEM16READ       brd16;          // E8000-F7FFF word read | 
 |  | MEM16READ       ird16;          // F8000-FFFFF word read | 
 |  | MEM16WRITE      bwr16;          // F8000-FFFFF word write | 
 |  | } MMAPTBL; | 
 |  |  | 
 |  | typedef struct { | 
 | MEM8READ        rd8; | MEM8READ        rd8; | 
 | MEM8WRITE       wr8; | MEM8WRITE       wr8; | 
 | MEM16READ       rd16; | MEM16READ       rd16; | 
| Line 647  static MEMFN memfn = { | Line 671  static MEMFN memfn = { | 
 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 80 | i286_rd,        i286_rd,        i286_rd,        i286_rd,                // 80 | 
 | tram_rd,        vram_r0,        vram_r0,        vram_r0,                // a0 | tram_rd,        vram_r0,        vram_r0,        vram_r0,                // a0 | 
 | emmc_rd,        emmc_rd,        i286_rd,        i286_rd,                // c0 | emmc_rd,        emmc_rd,        i286_rd,        i286_rd,                // c0 | 
| vram_r0,        i286_rd,        i286_rd,        i286_itf},              // f0 | vram_r0,        i286_rd,        i286_rd,        i286_rb},               // e0 | 
 |  |  | 
 | {i286_wt,    i286_wt,        i286_wt,        i286_wt,                // 00 | {i286_wt,    i286_wt,        i286_wt,        i286_wt,                // 00 | 
 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 20 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 20 | 
| Line 655  static MEMFN memfn = { | Line 679  static MEMFN memfn = { | 
 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 60 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 60 | 
 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 80 | i286_wt,        i286_wt,        i286_wt,        i286_wt,                // 80 | 
 | tram_wt,        vram_w0,        vram_w0,        vram_w0,                // a0 | tram_wt,        vram_w0,        vram_w0,        vram_w0,                // a0 | 
| emmc_wt,        emmc_wt,        i286_wn,        i286_wn,                // c0 | emmc_wt,        emmc_wt,        i286_wd,        i286_wd,                // c0 | 
 | vram_w0,        i286_wn,        i286_wn,        i286_wn},               // e0 | vram_w0,        i286_wn,        i286_wn,        i286_wn},               // e0 | 
 |  |  | 
 | {i286w_rd,   i286w_rd,       i286w_rd,       i286w_rd,               // 00 | {i286w_rd,   i286w_rd,       i286w_rd,       i286w_rd,               // 00 | 
| Line 665  static MEMFN memfn = { | Line 689  static MEMFN memfn = { | 
 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 80 | i286w_rd,       i286w_rd,       i286w_rd,       i286w_rd,               // 80 | 
 | tramw_rd,       vramw_r0,       vramw_r0,       vramw_r0,               // a0 | tramw_rd,       vramw_r0,       vramw_r0,       vramw_r0,               // a0 | 
 | emmcw_rd,       emmcw_rd,       i286w_rd,       i286w_rd,               // c0 | emmcw_rd,       emmcw_rd,       i286w_rd,       i286w_rd,               // c0 | 
| vramw_r0,       i286w_rd,       i286w_rd,       i286w_itf},             // e0 | vramw_r0,       i286w_rd,       i286w_rd,       i286w_rb},              // e0 | 
 |  |  | 
 | {i286w_wt,   i286w_wt,       i286w_wt,       i286w_wt,               // 00 | {i286w_wt,   i286w_wt,       i286w_wt,       i286w_wt,               // 00 | 
 | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 20 | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 20 | 
| Line 673  static MEMFN memfn = { | Line 697  static MEMFN memfn = { | 
 | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 60 | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 60 | 
 | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 80 | i286w_wt,       i286w_wt,       i286w_wt,       i286w_wt,               // 80 | 
 | tramw_wt,       vramw_w0,       vramw_w0,       vramw_w0,               // a0 | tramw_wt,       vramw_w0,       vramw_w0,       vramw_w0,               // a0 | 
| emmcw_wt,       emmcw_wt,       i286w_wn,       i286w_wn,               // c0 | emmcw_wt,       emmcw_wt,       i286w_wd,       i286w_wd,               // c0 | 
 | vramw_w0,       i286w_wn,       i286w_wn,       i286w_wn}};             // e0 | vramw_w0,       i286w_wn,       i286w_wn,       i286w_wn}};             // e0 | 
 |  |  | 
 |  | static const MMAPTBL mmaptbl[2] = { | 
 |  | {i286_rd,    i286_rb,        i286_wn, | 
 |  | i286w_rd,       i286w_rb,       i286w_wn}, | 
 |  | {i286_rb,    i286_rb,        i286_wb, | 
 |  | i286w_rb,       i286w_rb,       i286w_wb}}; | 
 |  |  | 
 | static const VACCTBL vacctbl[0x10] = { | static const VACCTBL vacctbl[0x10] = { | 
 | {vram_r0,       vram_w0,        vramw_r0,       vramw_w0},              // 00 | {vram_r0,       vram_w0,        vramw_r0,       vramw_w0},              // 00 | 
 | {vram_r1,       vram_w1,        vramw_r1,       vramw_w1}, | {vram_r1,       vram_w1,        vramw_r1,       vramw_w1}, | 
| Line 707  static REG16 MEMCALL i286_nonram_rw(UINT | Line 737  static REG16 MEMCALL i286_nonram_rw(UINT | 
 | return(0xffff); | return(0xffff); | 
 | } | } | 
 |  |  | 
 |  |  | 
 |  | void MEMCALL i286_memorymap(UINT type) { | 
 |  |  | 
 |  | const MMAPTBL   *mm; | 
 |  |  | 
 |  | mm = mmaptbl + (type & 1); | 
 |  |  | 
 |  | memfn.rd8[0xe8000 >> 15] = mm->brd8; | 
 |  | memfn.rd8[0xf0000 >> 15] = mm->brd8; | 
 |  | memfn.rd8[0xf8000 >> 15] = mm->ird8; | 
 |  | memfn.wr8[0xe8000 >> 15] = mm->bwr8; | 
 |  | memfn.wr8[0xf0000 >> 15] = mm->bwr8; | 
 |  | memfn.wr8[0xf8000 >> 15] = mm->bwr8; | 
 |  |  | 
 |  | memfn.rd16[0xe8000 >> 15] = mm->brd16; | 
 |  | memfn.rd16[0xf0000 >> 15] = mm->brd16; | 
 |  | memfn.rd16[0xf8000 >> 15] = mm->ird16; | 
 |  | memfn.wr16[0xe8000 >> 15] = mm->bwr16; | 
 |  | memfn.wr16[0xf0000 >> 15] = mm->bwr16; | 
 |  | memfn.wr16[0xf8000 >> 15] = mm->bwr16; | 
 |  | } | 
 |  |  | 
 | void MEMCALL i286_vram_dispatch(UINT func) { | void MEMCALL i286_vram_dispatch(UINT func) { | 
 |  |  | 
 | const VACCTBL   *vacc; | const VACCTBL   *vacc; | 
| Line 733  const VACCTBL *vacc; | Line 785  const VACCTBL *vacc; | 
 | memfn.wr16[0xb8000 >> 15] = vacc->wr16; | memfn.wr16[0xb8000 >> 15] = vacc->wr16; | 
 | memfn.wr16[0xe0000 >> 15] = vacc->wr16; | memfn.wr16[0xe0000 >> 15] = vacc->wr16; | 
 |  |  | 
| if (!(func & 0x10)) {                                                   // degital | if (!(func & 0x10)) {                                                   // digital | 
 | memfn.wr8[0xe0000 >> 15] = i286_wn; | memfn.wr8[0xe0000 >> 15] = i286_wn; | 
 | memfn.wr16[0xe0000 >> 15] = i286w_wn; | memfn.wr16[0xe0000 >> 15] = i286w_wn; | 
 | memfn.rd8[0xe0000 >> 15] = i286_nonram_r; | memfn.rd8[0xe0000 >> 15] = i286_nonram_r; | 
| Line 741  const VACCTBL *vacc; | Line 793  const VACCTBL *vacc; | 
 | } | } | 
 | } | } | 
 |  |  | 
 | #if defined(MEMORY_DEBUG) |  | 
 | static REG8 MEMCALL _i286_memoryread(UINT32 address) { |  | 
 |  |  | 
 | if (address < I286_MEMREADMAX) { |  | 
 | return(mem[address]); |  | 
 | } |  | 
 | #if defined(USE_HIMEM) |  | 
 | else if (address >= USE_HIMEM) { |  | 
 | address -= 0x100000; |  | 
 | if (address < CPU_EXTMEMSIZE) { |  | 
 | return(CPU_EXTMEM[address]); |  | 
 | } |  | 
 | else { |  | 
 | return(0xff); |  | 
 | } |  | 
 | } |  | 
 | #endif |  | 
 | else { |  | 
 | return(memfn.rd8[(address >> 15) & 0x1f](address)); |  | 
 | } |  | 
 | } |  | 
 |  |  | 
 | static REG16 MEMCALL _i286_memoryread_w(UINT32 address) { |  | 
 |  |  | 
 | REG16   ret; |  | 
 |  |  | 
 | if (address < (I286_MEMREADMAX - 1)) { |  | 
 | return(LOADINTELWORD(mem + address)); |  | 
 | } |  | 
 | #if defined(USE_HIMEM) |  | 
 | else if (address >= (USE_HIMEM - 1)) { |  | 
 | address -= 0x100000; |  | 
 | if (address == (USE_HIMEM - 0x100000 - 1)) { |  | 
 | ret = mem[0x100000 + address]; |  | 
 | } |  | 
 | else if (address < CPU_EXTMEMSIZE) { |  | 
 | ret = CPU_EXTMEM[address]; |  | 
 | } |  | 
 | else { |  | 
 | ret = 0xff; |  | 
 | } |  | 
 | address++; |  | 
 | if (address < CPU_EXTMEMSIZE) { |  | 
 | ret += CPU_EXTMEM[address] << 8; |  | 
 | } |  | 
 | else { |  | 
 | ret += 0xff00; |  | 
 | } |  | 
 | return(ret); |  | 
 | } |  | 
 | #endif |  | 
 | else if ((address & 0x7fff) != 0x7fff) { |  | 
 | return(memfn.rd16[(address >> 15) & 0x1f](address)); |  | 
 | } |  | 
 | else { |  | 
 | ret = memfn.rd8[(address >> 15) & 0x1f](address); |  | 
 | address++; |  | 
 | ret += memfn.rd8[(address >> 15) & 0x1f](address) << 8; |  | 
 | return(ret); |  | 
 | } |  | 
 | } |  | 
 |  |  | 
 | REG8 MEMCALL i286_memoryread(UINT32 address) { |  | 
 |  |  | 
 | REG8    r; |  | 
 |  |  | 
 | r = _i286_memoryread(address); |  | 
 | if (r & 0xffffff00) { |  | 
 | TRACEOUT(("error i286_memoryread %x %x", address, r)); |  | 
 | } |  | 
 | return(r); |  | 
 | } |  | 
 |  |  | 
 | REG16 MEMCALL i286_memoryread_w(UINT32 address) { |  | 
 |  |  | 
 | REG16   r; |  | 
 |  |  | 
 | r = _i286_memoryread_w(address); |  | 
 | if (r & 0xffff0000) { |  | 
 | TRACEOUT(("error i286_memoryread_w %x %x", address, r)); |  | 
 | } |  | 
 | return(r); |  | 
 | } |  | 
 | #else |  | 
 | REG8 MEMCALL i286_memoryread(UINT32 address) { | REG8 MEMCALL i286_memoryread(UINT32 address) { | 
 |  |  | 
 | if (address < I286_MEMREADMAX) { | if (address < I286_MEMREADMAX) { | 
| Line 885  REG16 MEMCALL i286_memoryread_w(UINT32 a | Line 853  REG16 MEMCALL i286_memoryread_w(UINT32 a | 
 | return(ret); | return(ret); | 
 | } | } | 
 | } | } | 
 | #endif |  | 
 |  |  | 
 | void MEMCALL i286_memorywrite(UINT32 address, REG8 value) { | void MEMCALL i286_memorywrite(UINT32 address, REG8 value) { | 
 |  |  | 
| Line 935  void MEMCALL i286_memorywrite_w(UINT32 a | Line 902  void MEMCALL i286_memorywrite_w(UINT32 a | 
 | } | } | 
 | } | } | 
 |  |  | 
| REG8 MEMCALL i286_membyte_read(UINT seg, UINT off) { | REG8 MEMCALL meml_read8(UINT seg, UINT off) { | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < I286_MEMREADMAX) { | if (address < I286_MEMREADMAX) { | 
 | return(mem[address]); | return(mem[address]); | 
 | } | } | 
| Line 948  REG8 MEMCALL i286_membyte_read(UINT seg, | Line 915  REG8 MEMCALL i286_membyte_read(UINT seg, | 
 | } | } | 
 | } | } | 
 |  |  | 
| REG16 MEMCALL i286_memword_read(UINT seg, UINT off) { | REG16 MEMCALL meml_read16(UINT seg, UINT off) { | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < (I286_MEMREADMAX - 1)) { | if (address < (I286_MEMREADMAX - 1)) { | 
 | return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); | 
 | } | } | 
| Line 961  REG16 MEMCALL i286_memword_read(UINT seg | Line 928  REG16 MEMCALL i286_memword_read(UINT seg | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_membyte_write(UINT seg, UINT off, REG8 value) { | void MEMCALL meml_write8(UINT seg, UINT off, REG8 value) { | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < I286_MEMWRITEMAX) { | if (address < I286_MEMWRITEMAX) { | 
 | mem[address] = (BYTE)value; | mem[address] = (BYTE)value; | 
 | } | } | 
| Line 974  void MEMCALL i286_membyte_write(UINT seg | Line 941  void MEMCALL i286_membyte_write(UINT seg | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_memword_write(UINT seg, UINT off, REG16 value) { | void MEMCALL meml_write16(UINT seg, UINT off, REG16 value) { | 
 |  |  | 
 | UINT32  address; | UINT32  address; | 
 |  |  | 
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); | 
 | if (address < (I286_MEMWRITEMAX - 1)) { | if (address < (I286_MEMWRITEMAX - 1)) { | 
 | STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); | 
 | } | } | 
| Line 987  void MEMCALL i286_memword_write(UINT seg | Line 954  void MEMCALL i286_memword_write(UINT seg | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_memstr_read(UINT seg, UINT off, void *dat, UINT leng) { | void MEMCALL meml_readstr(UINT seg, UINT off, void *dat, UINT leng) { | 
 |  |  | 
 | BYTE    *out; | BYTE    *out; | 
 | UINT32  adrs; | UINT32  adrs; | 
| Line 995  void MEMCALL i286_memstr_read(UINT seg, | Line 962  void MEMCALL i286_memstr_read(UINT seg, | 
 |  |  | 
 | out = (BYTE *)dat; | out = (BYTE *)dat; | 
 | adrs = seg << 4; | adrs = seg << 4; | 
 |  | off = LOW16(off); | 
 | if ((I286_MEMREADMAX >= 0x10000) && | if ((I286_MEMREADMAX >= 0x10000) && | 
 | (adrs < (I286_MEMREADMAX - 0x10000))) { | (adrs < (I286_MEMREADMAX - 0x10000))) { | 
 | if (leng) { | if (leng) { | 
| Line 1024  void MEMCALL i286_memstr_read(UINT seg, | Line 992  void MEMCALL i286_memstr_read(UINT seg, | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_memstr_write(UINT seg, UINT off, | void MEMCALL meml_writestr(UINT seg, UINT off, const void *dat, UINT leng) { | 
| const void *dat, UINT leng) { |  | 
 |  |  | 
 | BYTE    *out; | BYTE    *out; | 
 | UINT32  adrs; | UINT32  adrs; | 
| Line 1033  void MEMCALL i286_memstr_write(UINT seg, | Line 1000  void MEMCALL i286_memstr_write(UINT seg, | 
 |  |  | 
 | out = (BYTE *)dat; | out = (BYTE *)dat; | 
 | adrs = seg << 4; | adrs = seg << 4; | 
 |  | off = LOW16(off); | 
 | if ((I286_MEMWRITEMAX >= 0x10000) && | if ((I286_MEMWRITEMAX >= 0x10000) && | 
 | (adrs < (I286_MEMWRITEMAX - 0x10000))) { | (adrs < (I286_MEMWRITEMAX - 0x10000))) { | 
 | if (leng) { | if (leng) { | 
| Line 1062  void MEMCALL i286_memstr_write(UINT seg, | Line 1030  void MEMCALL i286_memstr_write(UINT seg, | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_memx_read(UINT32 address, void *dat, UINT leng) { | void MEMCALL meml_read(UINT32 address, void *dat, UINT leng) { | 
 |  |  | 
 | if ((address + leng) < I286_MEMREADMAX) { | if ((address + leng) < I286_MEMREADMAX) { | 
 | CopyMemory(dat, mem + address, leng); | CopyMemory(dat, mem + address, leng); | 
| Line 1081  void MEMCALL i286_memx_read(UINT32 addre | Line 1049  void MEMCALL i286_memx_read(UINT32 addre | 
 | } | } | 
 | } | } | 
 |  |  | 
| void MEMCALL i286_memx_write(UINT32 address, const void *dat, UINT leng) { | void MEMCALL meml_write(UINT32 address, const void *dat, UINT leng) { | 
 |  |  | 
 | const BYTE      *out; | const BYTE      *out; | 
 |  |  |