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| version 1.13, 2003/12/12 01:04:40 | version 1.14, 2003/12/19 23:16:06 |
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| Line 25 static void MEMCALL i286_wt(UINT32 addre | Line 25 static void MEMCALL i286_wt(UINT32 addre |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa2000) { | if (address < 0xa2000) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 57 static void MEMCALL tram_wt(UINT32 addre | Line 57 static void MEMCALL tram_wt(UINT32 addre |
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { | static void MEMCALL vram_w0(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 1; | vramupdate[LOW15(address)] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 65 static void MEMCALL vram_w0(UINT32 addre | Line 65 static void MEMCALL vram_w0(UINT32 addre |
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { | static void MEMCALL vram_w1(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 2; | vramupdate[LOW15(address)] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 76 static void MEMCALL grcg_rmw0(UINT32 add | Line 76 static void MEMCALL grcg_rmw0(UINT32 add |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| Line 105 static void MEMCALL grcg_rmw1(UINT32 add | Line 105 static void MEMCALL grcg_rmw1(UINT32 add |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| Line 133 static void MEMCALL grcg_tdw0(UINT32 add | Line 133 static void MEMCALL grcg_tdw0(UINT32 add |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 157 static void MEMCALL grcg_tdw1(UINT32 add | Line 157 static void MEMCALL grcg_tdw1(UINT32 add |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 179 static void MEMCALL grcg_tdw1(UINT32 add | Line 179 static void MEMCALL grcg_tdw1(UINT32 add |
| static void MEMCALL egc_wt(UINT32 address, REG8 value) { | static void MEMCALL egc_wt(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| egc_write(address, value); | egc_write(address, value); |
| } | } |
| Line 203 static REG8 MEMCALL i286_rd(UINT32 addre | Line 204 static REG8 MEMCALL i286_rd(UINT32 addre |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa4000) { | if (address < 0xa4000) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 220 static REG8 MEMCALL tram_rd(UINT32 addre | Line 221 static REG8 MEMCALL tram_rd(UINT32 addre |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| Line 235 static REG8 MEMCALL grcg_tcr0(UINT32 add | Line 236 static REG8 MEMCALL grcg_tcr0(UINT32 add |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| ret = 0; | ret = 0; |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 258 static REG8 MEMCALL grcg_tcr1(UINT32 add | Line 259 static REG8 MEMCALL grcg_tcr1(UINT32 add |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 278 const BYTE *vram; | Line 279 const BYTE *vram; |
| static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) { |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| return(egc_read(address)); | return(egc_read(address)); |
| } | } |
| Line 307 static void MEMCALL i286w_wt(UINT32 addr | Line 309 static void MEMCALL i286w_wt(UINT32 addr |
| static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | |
| if (address < 0xa1fff) { | if (address < 0xa1fff) { |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 352 static void MEMCALL tramw_wt(UINT32 addr | Line 355 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_NON(page) { \ | #define GRCGW_NON(page) { \ |
| CPU_REMCLOCK -= vramop.vramwait; \ | CPU_REMCLOCK -= MEMWAIT_VRAM; \ |
| STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ | STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ |
| vramupdate[LOW15(address)] |= (1 << page); \ | vramupdate[LOW15(address)] |= (1 << page); \ |
| vramupdate[LOW15(address + 1)] |= (1 << page); \ | vramupdate[LOW15(address + 1)] |= (1 << page); \ |
| Line 361 static void MEMCALL tramw_wt(UINT32 addr | Line 364 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_RMW(page) { \ | #define GRCGW_RMW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| CPU_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 407 static void MEMCALL tramw_wt(UINT32 addr | Line 410 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_TDW(page) { \ | #define GRCGW_TDW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| CPU_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 441 static void MEMCALL grcgw_tdw1(UINT32 ad | Line 444 static void MEMCALL grcgw_tdw1(UINT32 ad |
| static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| if (!(address & 1)) { | if (!(address & 1)) { |
| egc_write_w(address, value); | egc_write_w(address, value); |
| } | } |
| Line 489 static REG16 MEMCALL i286w_rd(UINT32 add | Line 493 static REG16 MEMCALL i286w_rd(UINT32 add |
| static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < (0xa4000 - 1)) { | if (address < (0xa4000 - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 518 static REG16 MEMCALL tramw_rd(UINT32 add | Line 522 static REG16 MEMCALL tramw_rd(UINT32 add |
| static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| static REG16 MEMCALL vramw_r1(UINT32 address) { | static REG16 MEMCALL vramw_r1(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); |
| } | } |
| Line 533 static REG16 MEMCALL grcgw_tcr0(UINT32 a | Line 537 static REG16 MEMCALL grcgw_tcr0(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 556 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 560 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 578 static REG16 MEMCALL egcw_rd(UINT32 addr | Line 582 static REG16 MEMCALL egcw_rd(UINT32 addr |
| REG16 ret; | REG16 ret; |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| if (!(address & 1)) { | if (!(address & 1)) { |
| return(egc_read_w(address)); | return(egc_read_w(address)); |
| } | } |