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| version 1.13, 2003/12/12 01:04:40 | version 1.18, 2004/02/18 02:03:36 |
|---|---|
| Line 10 | Line 10 |
| BYTE mem[0x200000]; | BYTE mem[0x200000]; |
| #define USE_HIMEM 0x10fff0 | |
| #if defined(TRACE) | #if defined(TRACE) |
| #define MEMORY_DEBUG | #define MEMORY_DEBUG |
| #endif | #endif |
| Line 25 static void MEMCALL i286_wt(UINT32 addre | Line 23 static void MEMCALL i286_wt(UINT32 addre |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa2000) { | if (address < 0xa2000) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 57 static void MEMCALL tram_wt(UINT32 addre | Line 55 static void MEMCALL tram_wt(UINT32 addre |
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { | static void MEMCALL vram_w0(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 1; | vramupdate[LOW15(address)] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 65 static void MEMCALL vram_w0(UINT32 addre | Line 63 static void MEMCALL vram_w0(UINT32 addre |
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { | static void MEMCALL vram_w1(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 2; | vramupdate[LOW15(address)] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 76 static void MEMCALL grcg_rmw0(UINT32 add | Line 74 static void MEMCALL grcg_rmw0(UINT32 add |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| Line 105 static void MEMCALL grcg_rmw1(UINT32 add | Line 103 static void MEMCALL grcg_rmw1(UINT32 add |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| Line 133 static void MEMCALL grcg_tdw0(UINT32 add | Line 131 static void MEMCALL grcg_tdw0(UINT32 add |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 157 static void MEMCALL grcg_tdw1(UINT32 add | Line 155 static void MEMCALL grcg_tdw1(UINT32 add |
| BYTE *vram; | BYTE *vram; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 179 static void MEMCALL grcg_tdw1(UINT32 add | Line 177 static void MEMCALL grcg_tdw1(UINT32 add |
| static void MEMCALL egc_wt(UINT32 address, REG8 value) { | static void MEMCALL egc_wt(UINT32 address, REG8 value) { |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| egc_write(address, value); | egc_write(address, value); |
| } | } |
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { | static void MEMCALL emmc_wt(UINT32 address, REG8 value) { |
| extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | i286core.e.ems[(address >> 14) & 3][LOW14(address)] = (BYTE)value; |
| } | |
| static void MEMCALL i286_wb(UINT32 address, REG8 value) { | |
| mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | |
| } | } |
| static void MEMCALL i286_wn(UINT32 address, REG8 value) { | static void MEMCALL i286_wn(UINT32 address, REG8 value) { |
| Line 203 static REG8 MEMCALL i286_rd(UINT32 addre | Line 207 static REG8 MEMCALL i286_rd(UINT32 addre |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa4000) { | if (address < 0xa4000) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 220 static REG8 MEMCALL tram_rd(UINT32 addre | Line 224 static REG8 MEMCALL tram_rd(UINT32 addre |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| Line 235 static REG8 MEMCALL grcg_tcr0(UINT32 add | Line 239 static REG8 MEMCALL grcg_tcr0(UINT32 add |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| ret = 0; | ret = 0; |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 258 static REG8 MEMCALL grcg_tcr1(UINT32 add | Line 262 static REG8 MEMCALL grcg_tcr1(UINT32 add |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 278 const BYTE *vram; | Line 282 const BYTE *vram; |
| static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) { |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| return(egc_read(address)); | return(egc_read(address)); |
| } | } |
| static REG8 MEMCALL emmc_rd(UINT32 address) { | static REG8 MEMCALL emmc_rd(UINT32 address) { |
| return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]); | return(i286core.e.ems[(address >> 14) & 3][LOW14(address)]); |
| } | } |
| static REG8 MEMCALL i286_itf(UINT32 address) { | static REG8 MEMCALL i286_rb(UINT32 address) { |
| if (CPU_ITFBANK) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; |
| } | } |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 307 static void MEMCALL i286w_wt(UINT32 addr | Line 312 static void MEMCALL i286w_wt(UINT32 addr |
| static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | |
| if (address < 0xa1fff) { | if (address < 0xa1fff) { |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 352 static void MEMCALL tramw_wt(UINT32 addr | Line 358 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_NON(page) { \ | #define GRCGW_NON(page) { \ |
| CPU_REMCLOCK -= vramop.vramwait; \ | CPU_REMCLOCK -= MEMWAIT_VRAM; \ |
| STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ | STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ |
| vramupdate[LOW15(address)] |= (1 << page); \ | vramupdate[LOW15(address)] |= (1 << page); \ |
| vramupdate[LOW15(address + 1)] |= (1 << page); \ | vramupdate[LOW15(address + 1)] |= (1 << page); \ |
| Line 361 static void MEMCALL tramw_wt(UINT32 addr | Line 367 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_RMW(page) { \ | #define GRCGW_RMW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| CPU_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 407 static void MEMCALL tramw_wt(UINT32 addr | Line 413 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_TDW(page) { \ | #define GRCGW_TDW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| CPU_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 441 static void MEMCALL grcgw_tdw1(UINT32 ad | Line 447 static void MEMCALL grcgw_tdw1(UINT32 ad |
| static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { |
| if (!(address & 1)) { | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| egc_write_w(address, value); | egc_write_w(address, value); |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| egc_write(address, (REG8)value); | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| } | |
| else { | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| egc_write(address, (REG8)value); | |
| } | |
| } | |
| } | } |
| static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { |
| Line 461 static void MEMCALL emmcw_wt(UINT32 addr | Line 456 static void MEMCALL emmcw_wt(UINT32 addr |
| BYTE *ptr; | BYTE *ptr; |
| if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { |
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = i286core.e.ems[(address >> 14) & 3] + LOW14(address); |
| STOREINTELWORD(ptr, value); | STOREINTELWORD(ptr, value); |
| } | } |
| else { | else { |
| extmem.pageptr[(address >> 14) & 3][0x3fff] = (BYTE)value; | i286core.e.ems[(address >> 14) & 3][0x3fff] = (BYTE)value; |
| extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); | i286core.e.ems[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); |
| } | } |
| } | } |
| static void MEMCALL i286w_wb(UINT32 address, REG16 value) { | |
| mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | |
| mem[address + 0x1c8001 - 0xe8000] = (BYTE)(value >> 8); | |
| } | |
| static void MEMCALL i286w_wn(UINT32 address, REG16 value) { | static void MEMCALL i286w_wn(UINT32 address, REG16 value) { |
| (void)address; | (void)address; |
| Line 489 static REG16 MEMCALL i286w_rd(UINT32 add | Line 490 static REG16 MEMCALL i286w_rd(UINT32 add |
| static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { |
| CPU_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < (0xa4000 - 1)) { | if (address < (0xa4000 - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 518 static REG16 MEMCALL tramw_rd(UINT32 add | Line 519 static REG16 MEMCALL tramw_rd(UINT32 add |
| static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| static REG16 MEMCALL vramw_r1(UINT32 address) { | static REG16 MEMCALL vramw_r1(UINT32 address) { |
| CPU_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); |
| } | } |
| Line 533 static REG16 MEMCALL grcgw_tcr0(UINT32 a | Line 534 static REG16 MEMCALL grcgw_tcr0(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 556 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 557 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| CPU_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 576 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 577 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| static REG16 MEMCALL egcw_rd(UINT32 address) { | static REG16 MEMCALL egcw_rd(UINT32 address) { |
| REG16 ret; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| return(egc_read_w(address)); | |
| if (!(address & 1)) { | |
| return(egc_read_w(address)); | |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| ret = egc_read(address); | |
| ret += egc_read(address + 1) << 8; | |
| return(ret); | |
| } | |
| else { | |
| ret = egc_read(address + 1) << 8; | |
| ret += egc_read(address); | |
| return(ret); | |
| } | |
| } | |
| } | } |
| static REG16 MEMCALL emmcw_rd(UINT32 address) { | static REG16 MEMCALL emmcw_rd(UINT32 address) { |
| Line 601 const BYTE *ptr; | Line 587 const BYTE *ptr; |
| REG16 ret; | REG16 ret; |
| if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { |
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = i286core.e.ems[(address >> 14) & 3] + LOW14(address); |
| return(LOADINTELWORD(ptr)); | return(LOADINTELWORD(ptr)); |
| } | } |
| else { | else { |
| ret = extmem.pageptr[(address >> 14) & 3][0x3fff]; | ret = i286core.e.ems[(address >> 14) & 3][0x3fff]; |
| ret += extmem.pageptr[((address + 1) >> 14) & 3][0] << 8; | ret += i286core.e.ems[((address + 1) >> 14) & 3][0] << 8; |
| return(ret); | return(ret); |
| } | } |
| } | } |
| static REG16 MEMCALL i286w_itf(UINT32 address) { | static REG16 MEMCALL i286w_rb(UINT32 address) { |
| if (CPU_ITFBANK) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; |
| } | } |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 635 typedef struct { | Line 621 typedef struct { |
| } MEMFN; | } MEMFN; |
| typedef struct { | typedef struct { |
| MEM8READ brd8; | |
| MEM8READ ird8; | |
| MEM8WRITE ewr8; | |
| MEM8WRITE bwr8; | |
| MEM16READ brd16; | |
| MEM16READ ird16; | |
| MEM16WRITE ewr16; | |
| MEM16WRITE bwr16; | |
| } MMAPTBL; | |
| typedef struct { | |
| MEM8READ rd8; | MEM8READ rd8; |
| MEM8WRITE wr8; | MEM8WRITE wr8; |
| MEM16READ rd16; | MEM16READ rd16; |
| Line 649 static MEMFN memfn = { | Line 646 static MEMFN memfn = { |
| i286_rd, i286_rd, i286_rd, i286_rd, // 80 | i286_rd, i286_rd, i286_rd, i286_rd, // 80 |
| tram_rd, vram_r0, vram_r0, vram_r0, // a0 | tram_rd, vram_r0, vram_r0, vram_r0, // a0 |
| emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 | emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 |
| vram_r0, i286_rd, i286_rd, i286_itf}, // f0 | vram_r0, i286_rd, i286_rd, i286_rb}, // f0 |
| {i286_wt, i286_wt, i286_wt, i286_wt, // 00 | {i286_wt, i286_wt, i286_wt, i286_wt, // 00 |
| i286_wt, i286_wt, i286_wt, i286_wt, // 20 | i286_wt, i286_wt, i286_wt, i286_wt, // 20 |
| Line 667 static MEMFN memfn = { | Line 664 static MEMFN memfn = { |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 80 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 80 |
| tramw_rd, vramw_r0, vramw_r0, vramw_r0, // a0 | tramw_rd, vramw_r0, vramw_r0, vramw_r0, // a0 |
| emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 | emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 |
| vramw_r0, i286w_rd, i286w_rd, i286w_itf}, // e0 | vramw_r0, i286w_rd, i286w_rd, i286w_rb}, // e0 |
| {i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 | {i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 | i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 |
| Line 678 static MEMFN memfn = { | Line 675 static MEMFN memfn = { |
| emmcw_wt, emmcw_wt, i286w_wn, i286w_wn, // c0 | emmcw_wt, emmcw_wt, i286w_wn, i286w_wn, // c0 |
| vramw_w0, i286w_wn, i286w_wn, i286w_wn}}; // e0 | vramw_w0, i286w_wn, i286w_wn, i286w_wn}}; // e0 |
| static const MMAPTBL mmaptbl[2] = { | |
| {i286_rd, i286_rb, i286_wn, i286_wn, | |
| i286w_rd, i286w_rb, i286w_wn, i286w_wn}, | |
| {i286_rb, i286_rb, i286_wt, i286_wb, | |
| i286w_rb, i286w_rb, i286w_wt, i286w_wb}}; | |
| static const VACCTBL vacctbl[0x10] = { | static const VACCTBL vacctbl[0x10] = { |
| {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 00 | {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 00 |
| {vram_r1, vram_w1, vramw_r1, vramw_w1}, | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| Line 709 static REG16 MEMCALL i286_nonram_rw(UINT | Line 712 static REG16 MEMCALL i286_nonram_rw(UINT |
| return(0xffff); | return(0xffff); |
| } | } |
| void MEMCALL i286_memorymap(UINT type) { | |
| const MMAPTBL *mm; | |
| mm = mmaptbl + (type & 1); | |
| memfn.rd8[0xe8000 >> 15] = mm->brd8; | |
| memfn.rd8[0xf0000 >> 15] = mm->brd8; | |
| memfn.rd8[0xf8000 >> 15] = mm->ird8; | |
| memfn.wr8[0xd0000 >> 15] = mm->ewr8; | |
| memfn.wr8[0xd8000 >> 15] = mm->ewr8; | |
| memfn.wr8[0xe8000 >> 15] = mm->bwr8; | |
| memfn.wr8[0xf0000 >> 15] = mm->bwr8; | |
| memfn.wr8[0xf8000 >> 15] = mm->bwr8; | |
| memfn.rd16[0xe8000 >> 15] = mm->brd16; | |
| memfn.rd16[0xf0000 >> 15] = mm->brd16; | |
| memfn.rd16[0xf8000 >> 15] = mm->ird16; | |
| memfn.wr16[0xd0000 >> 15] = mm->ewr16; | |
| memfn.wr16[0xd8000 >> 15] = mm->ewr16; | |
| memfn.wr16[0xe8000 >> 15] = mm->bwr16; | |
| memfn.wr16[0xf0000 >> 15] = mm->bwr16; | |
| memfn.wr16[0xf8000 >> 15] = mm->bwr16; | |
| } | |
| void MEMCALL i286_vram_dispatch(UINT func) { | void MEMCALL i286_vram_dispatch(UINT func) { |
| const VACCTBL *vacc; | const VACCTBL *vacc; |
| Line 941 REG8 MEMCALL i286_membyte_read(UINT seg, | Line 972 REG8 MEMCALL i286_membyte_read(UINT seg, |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < I286_MEMREADMAX) { | if (address < I286_MEMREADMAX) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 954 REG16 MEMCALL i286_memword_read(UINT seg | Line 985 REG16 MEMCALL i286_memword_read(UINT seg |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < (I286_MEMREADMAX - 1)) { | if (address < (I286_MEMREADMAX - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 967 void MEMCALL i286_membyte_write(UINT seg | Line 998 void MEMCALL i286_membyte_write(UINT seg |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < I286_MEMWRITEMAX) { | if (address < I286_MEMWRITEMAX) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| Line 980 void MEMCALL i286_memword_write(UINT seg | Line 1011 void MEMCALL i286_memword_write(UINT seg |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < (I286_MEMWRITEMAX - 1)) { | if (address < (I286_MEMWRITEMAX - 1)) { |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| } | } |
| Line 997 void MEMCALL i286_memstr_read(UINT seg, | Line 1028 void MEMCALL i286_memstr_read(UINT seg, |
| out = (BYTE *)dat; | out = (BYTE *)dat; |
| adrs = seg << 4; | adrs = seg << 4; |
| off = LOW16(off); | |
| if ((I286_MEMREADMAX >= 0x10000) && | if ((I286_MEMREADMAX >= 0x10000) && |
| (adrs < (I286_MEMREADMAX - 0x10000))) { | (adrs < (I286_MEMREADMAX - 0x10000))) { |
| if (leng) { | if (leng) { |
| Line 1035 void MEMCALL i286_memstr_write(UINT seg, | Line 1067 void MEMCALL i286_memstr_write(UINT seg, |
| out = (BYTE *)dat; | out = (BYTE *)dat; |
| adrs = seg << 4; | adrs = seg << 4; |
| off = LOW16(off); | |
| if ((I286_MEMWRITEMAX >= 0x10000) && | if ((I286_MEMWRITEMAX >= 0x10000) && |
| (adrs < (I286_MEMWRITEMAX - 0x10000))) { | (adrs < (I286_MEMWRITEMAX - 0x10000))) { |
| if (leng) { | if (leng) { |