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| version 1.8, 2003/12/01 17:13:36 | version 1.21, 2004/04/05 12:02:30 |
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| Line 1 | Line 1 |
| #include "compiler.h" | #include "compiler.h" |
| #include "i286.h" | #include "cpucore.h" |
| #include "memory.h" | |
| #include "egcmem.h" | #include "egcmem.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| Line 8 | Line 7 |
| #include "font.h" | #include "font.h" |
| #define USE_HIMEM | BYTE mem[0x200000]; |
| // #define MEMORY_DEBUG | |
| // ---- write byte | // ---- write byte |
| static void MEMCALL i286_wt(UINT32 address, REG8 value) { | static void MEMCALL i286_wt(UINT32 address, REG8 value) { // MAIN |
| mem[address & i286core.s.adrsmask] = (BYTE)value; | mem[address & CPU_ADRSMASK] = (BYTE)value; |
| } | } |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) { // TRAM |
| I286_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa2000) { | if (address < 0xa2000) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 50 static void MEMCALL tram_wt(UINT32 addre | Line 49 static void MEMCALL tram_wt(UINT32 addre |
| } | } |
| } | } |
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { | static void MEMCALL vram_w0(UINT32 address, REG8 value) { // VRAM |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 1; | vramupdate[LOW15(address)] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| } | } |
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { | static void MEMCALL vram_w1(UINT32 address, REG8 value) { // VRAM |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 2; | vramupdate[LOW15(address)] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| } | } |
| static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { | static void MEMCALL grcg_rmw0(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| Line 95 static void MEMCALL grcg_rmw0(UINT32 add | Line 94 static void MEMCALL grcg_rmw0(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { | static void MEMCALL grcg_rmw1(UINT32 address, REG8 value) { // VRAM |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| Line 124 static void MEMCALL grcg_rmw1(UINT32 add | Line 123 static void MEMCALL grcg_rmw1(UINT32 add |
| } | } |
| } | } |
| static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { | static void MEMCALL grcg_tdw0(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 148 static void MEMCALL grcg_tdw0(UINT32 add | Line 147 static void MEMCALL grcg_tdw0(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { | static void MEMCALL grcg_tdw1(UINT32 address, REG8 value) { // VRAM |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 172 static void MEMCALL grcg_tdw1(UINT32 add | Line 171 static void MEMCALL grcg_tdw1(UINT32 add |
| (void)value; | (void)value; |
| } | } |
| static void MEMCALL egc_wt(UINT32 address, REG8 value) { | static void MEMCALL egc_wt(UINT32 address, REG8 value) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| egc_write(address, value); | egc_write(address, value); |
| } | } |
| static void MEMCALL emmc_wt(UINT32 address, REG8 value) { | static void MEMCALL emmc_wt(UINT32 address, REG8 value) { // EMS |
| CPU_EMSPTR[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | |
| } | |
| static void MEMCALL i286_wd(UINT32 address, REG8 value) { // D000¡ÁDFFF | |
| extmem.pageptr[(address >> 14) & 3][LOW14(address)] = (BYTE)value; | if (CPU_RAM_D000 & (1 << ((address >> 12) & 15))) { |
| mem[address] = (BYTE)value; | |
| } | |
| } | } |
| static void MEMCALL i286_wn(UINT32 address, REG8 value) { | static void MEMCALL i286_wb(UINT32 address, REG8 value) { // F800¡ÁFFFF |
| mem[address + 0x1c8000 - 0xe8000] = (BYTE)value; | |
| } | |
| static void MEMCALL i286_wn(UINT32 address, REG8 value) { // NONE | |
| (void)address; | (void)address; |
| (void)value; | (void)value; |
| Line 191 static void MEMCALL i286_wn(UINT32 addre | Line 203 static void MEMCALL i286_wn(UINT32 addre |
| // ---- read byte | // ---- read byte |
| static REG8 MEMCALL i286_rd(UINT32 address) { | static REG8 MEMCALL i286_rd(UINT32 address) { // MAIN |
| return(mem[address & i286core.s.adrsmask]); | return(mem[address & CPU_ADRSMASK]); |
| } | } |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { // TRAM |
| I286_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < 0xa4000) { | if (address < 0xa4000) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 213 static REG8 MEMCALL tram_rd(UINT32 addre | Line 225 static REG8 MEMCALL tram_rd(UINT32 addre |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { // VRAM |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { // VRAM |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| static REG8 MEMCALL grcg_tcr0(UINT32 address) { | static REG8 MEMCALL grcg_tcr0(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| ret = 0; | ret = 0; |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 248 const BYTE *vram; | Line 260 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL grcg_tcr1(UINT32 address) { | static REG8 MEMCALL grcg_tcr1(UINT32 address) { // VRAM |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 271 const BYTE *vram; | Line 283 const BYTE *vram; |
| return(ret ^ 0xff); | return(ret ^ 0xff); |
| } | } |
| static REG8 MEMCALL egc_rd(UINT32 address) { | static REG8 MEMCALL egc_rd(UINT32 address) { // VRAM |
| CPU_REMCLOCK -= MEMWAIT_GRCG; | |
| return(egc_read(address)); | return(egc_read(address)); |
| } | } |
| static REG8 MEMCALL emmc_rd(UINT32 address) { | static REG8 MEMCALL emmc_rd(UINT32 address) { // EMS |
| return(extmem.pageptr[(address >> 14) & 3][LOW14(address)]); | return(CPU_EMSPTR[(address >> 14) & 3][LOW14(address)]); |
| } | } |
| static REG8 MEMCALL i286_itf(UINT32 address) { | static REG8 MEMCALL i286_rb(UINT32 address) { // F800-FFFF |
| if (i286core.s.itfbank) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; |
| } | } |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 296 static void MEMCALL i286w_wt(UINT32 addr | Line 309 static void MEMCALL i286w_wt(UINT32 addr |
| BYTE *ptr; | BYTE *ptr; |
| ptr = mem + (address & i286core.s.adrsmask); | ptr = mem + (address & CPU_ADRSMASK); |
| STOREINTELWORD(ptr, value); | STOREINTELWORD(ptr, value); |
| } | } |
| static void MEMCALL tramw_wt(UINT32 address, REG16 value) { | static void MEMCALL tramw_wt(UINT32 address, REG16 value) { |
| CPU_REMCLOCK -= MEMWAIT_TRAM; | |
| if (address < 0xa1fff) { | if (address < 0xa1fff) { |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 347 static void MEMCALL tramw_wt(UINT32 addr | Line 361 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_NON(page) { \ | #define GRCGW_NON(page) { \ |
| I286_REMCLOCK -= vramop.vramwait; \ | CPU_REMCLOCK -= MEMWAIT_VRAM; \ |
| STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ | STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ |
| vramupdate[LOW15(address)] |= (1 << page); \ | vramupdate[LOW15(address)] |= (1 << page); \ |
| vramupdate[LOW15(address + 1)] |= (1 << page); \ | vramupdate[LOW15(address + 1)] |= (1 << page); \ |
| Line 356 static void MEMCALL tramw_wt(UINT32 addr | Line 370 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_RMW(page) { \ | #define GRCGW_RMW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| I286_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 402 static void MEMCALL tramw_wt(UINT32 addr | Line 416 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_TDW(page) { \ | #define GRCGW_TDW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| I286_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= MEMWAIT_GRCG; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 436 static void MEMCALL grcgw_tdw1(UINT32 ad | Line 450 static void MEMCALL grcgw_tdw1(UINT32 ad |
| static void MEMCALL egcw_wt(UINT32 address, REG16 value) { | static void MEMCALL egcw_wt(UINT32 address, REG16 value) { |
| if (!(address & 1)) { | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| egc_write_w(address, value); | egc_write_w(address, value); |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| egc_write(address, (REG8)value); | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| } | |
| else { | |
| egc_write(address + 1, (REG8)(value >> 8)); | |
| egc_write(address, (REG8)value); | |
| } | |
| } | |
| } | } |
| static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { | static void MEMCALL emmcw_wt(UINT32 address, REG16 value) { |
| Line 456 static void MEMCALL emmcw_wt(UINT32 addr | Line 459 static void MEMCALL emmcw_wt(UINT32 addr |
| BYTE *ptr; | BYTE *ptr; |
| if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { |
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = CPU_EMSPTR[(address >> 14) & 3] + LOW14(address); |
| STOREINTELWORD(ptr, value); | STOREINTELWORD(ptr, value); |
| } | } |
| else { | else { |
| extmem.pageptr[(address >> 14) & 3][0x3fff] = (BYTE)value; | CPU_EMSPTR[(address >> 14) & 3][0x3fff] = (BYTE)value; |
| extmem.pageptr[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); | CPU_EMSPTR[((address + 1) >> 14) & 3][0] = (BYTE)(value >> 8); |
| } | } |
| } | } |
| static void MEMCALL i286w_wd(UINT32 address, REG16 value) { | |
| BYTE *ptr; | |
| UINT16 bit; | |
| ptr = mem + address; | |
| bit = 1 << ((address >> 12) & 15); | |
| if ((address + 1) & 0xfff) { | |
| if (CPU_RAM_D000 & bit) { | |
| STOREINTELWORD(ptr, value); | |
| } | |
| } | |
| else { | |
| if (CPU_RAM_D000 & bit) { | |
| ptr[0] = (UINT8)value; | |
| } | |
| if (CPU_RAM_D000 & (bit << 1)) { | |
| ptr[1] = (UINT8)(value >> 8); | |
| } | |
| } | |
| } | |
| static void MEMCALL i286w_wb(UINT32 address, REG16 value) { | |
| BYTE *ptr; | |
| ptr = mem + (address + 0x1c8000 - 0xe8000); | |
| STOREINTELWORD(ptr, value); | |
| } | |
| static void MEMCALL i286w_wn(UINT32 address, REG16 value) { | static void MEMCALL i286w_wn(UINT32 address, REG16 value) { |
| (void)address; | (void)address; |
| Line 478 static REG16 MEMCALL i286w_rd(UINT32 add | Line 511 static REG16 MEMCALL i286w_rd(UINT32 add |
| BYTE *ptr; | BYTE *ptr; |
| ptr = mem + (address & i286core.s.adrsmask); | ptr = mem + (address & CPU_ADRSMASK); |
| return(LOADINTELWORD(ptr)); | return(LOADINTELWORD(ptr)); |
| } | } |
| static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { |
| I286_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= MEMWAIT_TRAM; |
| if (address < (0xa4000 - 1)) { | if (address < (0xa4000 - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 513 static REG16 MEMCALL tramw_rd(UINT32 add | Line 546 static REG16 MEMCALL tramw_rd(UINT32 add |
| static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| static REG16 MEMCALL vramw_r1(UINT32 address) { | static REG16 MEMCALL vramw_r1(UINT32 address) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= MEMWAIT_VRAM; |
| return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); |
| } | } |
| Line 528 static REG16 MEMCALL grcgw_tcr0(UINT32 a | Line 561 static REG16 MEMCALL grcgw_tcr0(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 551 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 584 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 571 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 604 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| static REG16 MEMCALL egcw_rd(UINT32 address) { | static REG16 MEMCALL egcw_rd(UINT32 address) { |
| REG16 ret; | CPU_REMCLOCK -= MEMWAIT_GRCG; |
| return(egc_read_w(address)); | |
| if (!(address & 1)) { | |
| return(egc_read_w(address)); | |
| } | |
| else { | |
| if (!(egc.sft & 0x1000)) { | |
| ret = egc_read(address); | |
| ret += egc_read(address + 1) << 8; | |
| return(ret); | |
| } | |
| else { | |
| ret = egc_read(address + 1) << 8; | |
| ret += egc_read(address); | |
| return(ret); | |
| } | |
| } | |
| } | } |
| static REG16 MEMCALL emmcw_rd(UINT32 address) { | static REG16 MEMCALL emmcw_rd(UINT32 address) { |
| Line 596 const BYTE *ptr; | Line 614 const BYTE *ptr; |
| REG16 ret; | REG16 ret; |
| if ((address & 0x3fff) != 0x3fff) { | if ((address & 0x3fff) != 0x3fff) { |
| ptr = extmem.pageptr[(address >> 14) & 3] + LOW14(address); | ptr = CPU_EMSPTR[(address >> 14) & 3] + LOW14(address); |
| return(LOADINTELWORD(ptr)); | return(LOADINTELWORD(ptr)); |
| } | } |
| else { | else { |
| ret = extmem.pageptr[(address >> 14) & 3][0x3fff]; | ret = CPU_EMSPTR[(address >> 14) & 3][0x3fff]; |
| ret += extmem.pageptr[((address + 1) >> 14) & 3][0] << 8; | ret += CPU_EMSPTR[((address + 1) >> 14) & 3][0] << 8; |
| return(ret); | return(ret); |
| } | } |
| } | } |
| static REG16 MEMCALL i286w_itf(UINT32 address) { | static REG16 MEMCALL i286w_rb(UINT32 address) { |
| if (i286core.s.itfbank) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address += VRAM_STEP; |
| } | } |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 622 typedef REG8 (MEMCALL * MEM8READ)(UINT32 | Line 640 typedef REG8 (MEMCALL * MEM8READ)(UINT32 |
| typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value); | typedef void (MEMCALL * MEM16WRITE)(UINT32 address, REG16 value); |
| typedef REG16 (MEMCALL * MEM16READ)(UINT32 address); | typedef REG16 (MEMCALL * MEM16READ)(UINT32 address); |
| static MEM8WRITE memory_write[] = { | typedef struct { |
| i286_wt, i286_wt, i286_wt, i286_wt, // 00 | MEM8READ rd8[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 20 | MEM8WRITE wr8[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 40 | MEM16READ rd16[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 60 | MEM16WRITE wr16[0x20]; |
| i286_wt, i286_wt, i286_wt, i286_wt, // 80 | } MEMFN; |
| tram_wt, vram_w0, vram_w0, vram_w0, // a0 | |
| emmc_wt, emmc_wt, i286_wn, i286_wn, // c0 | typedef struct { |
| vram_w0, i286_wn, i286_wn, i286_wn}; // e0 | MEM8READ brd8; // E8000-F7FFF byte read |
| MEM8READ ird8; // F8000-FFFFF byte read | |
| MEM8WRITE bwr8; // E8000-FFFFF byte write | |
| MEM16READ brd16; // E8000-F7FFF word read | |
| MEM16READ ird16; // F8000-FFFFF word read | |
| MEM16WRITE bwr16; // F8000-FFFFF word write | |
| } MMAPTBL; | |
| typedef struct { | |
| MEM8READ rd8; | |
| MEM8WRITE wr8; | |
| MEM16READ rd16; | |
| MEM16WRITE wr16; | |
| } VACCTBL; | |
| static MEM8READ memory_read[] = { | static MEMFN memfn = { |
| i286_rd, i286_rd, i286_rd, i286_rd, // 00 | {i286_rd, i286_rd, i286_rd, i286_rd, // 00 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 20 | i286_rd, i286_rd, i286_rd, i286_rd, // 20 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 40 | i286_rd, i286_rd, i286_rd, i286_rd, // 40 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 60 | i286_rd, i286_rd, i286_rd, i286_rd, // 60 |
| i286_rd, i286_rd, i286_rd, i286_rd, // 80 | i286_rd, i286_rd, i286_rd, i286_rd, // 80 |
| tram_rd, vram_r0, vram_r0, vram_r0, // a0 | tram_rd, vram_r0, vram_r0, vram_r0, // a0 |
| emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 | emmc_rd, emmc_rd, i286_rd, i286_rd, // c0 |
| vram_r0, i286_rd, i286_rd, i286_itf}; // f0 | vram_r0, i286_rd, i286_rd, i286_rb}, // e0 |
| static MEM16WRITE memword_write[] = { | {i286_wt, i286_wt, i286_wt, i286_wt, // 00 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 | i286_wt, i286_wt, i286_wt, i286_wt, // 20 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 | i286_wt, i286_wt, i286_wt, i286_wt, // 40 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 | i286_wt, i286_wt, i286_wt, i286_wt, // 60 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 | i286_wt, i286_wt, i286_wt, i286_wt, // 80 |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80 | tram_wt, vram_w0, vram_w0, vram_w0, // a0 |
| tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0 | emmc_wt, emmc_wt, i286_wd, i286_wd, // c0 |
| emmcw_wt, emmcw_wt, i286w_wn, i286w_wn, // c0 | vram_w0, i286_wn, i286_wn, i286_wn}, // e0 |
| vramw_w0, i286w_wn, i286w_wn, i286w_wn}; // e0 | |
| static MEM16READ memword_read[] = { | {i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 00 | |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 20 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 40 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 60 |
| i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 80 | i286w_rd, i286w_rd, i286w_rd, i286w_rd, // 80 |
| tramw_rd, vramw_r0, vramw_r0, vramw_r0, // a0 | tramw_rd, vramw_r0, vramw_r0, vramw_r0, // a0 |
| emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 | emmcw_rd, emmcw_rd, i286w_rd, i286w_rd, // c0 |
| vramw_r0, i286w_rd, i286w_rd, i286w_itf}; // e0 | vramw_r0, i286w_rd, i286w_rd, i286w_rb}, // e0 |
| {i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 00 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 20 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 40 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 60 | |
| i286w_wt, i286w_wt, i286w_wt, i286w_wt, // 80 | |
| tramw_wt, vramw_w0, vramw_w0, vramw_w0, // a0 | |
| emmcw_wt, emmcw_wt, i286w_wd, i286w_wd, // c0 | |
| vramw_w0, i286w_wn, i286w_wn, i286w_wn}}; // e0 | |
| static const MEM8WRITE vram_write[] = { | static const MMAPTBL mmaptbl[2] = { |
| vram_w0, vram_w1, vram_w0, vram_w1, // 00 | {i286_rd, i286_rb, i286_wn, |
| vram_w0, vram_w1, vram_w0, vram_w1, // 40 | i286w_rd, i286w_rb, i286w_wn}, |
| grcg_tdw0, grcg_tdw1, egc_wt, egc_wt, // 80 tdw/tcr | {i286_rb, i286_rb, i286_wb, |
| grcg_rmw0, grcg_rmw1, egc_wt, egc_wt}; // c0 rmw | i286w_rb, i286w_rb, i286w_wb}}; |
| static const MEM8READ vram_read[] = { | static const VACCTBL vacctbl[0x10] = { |
| vram_r0, vram_r1, vram_r0, vram_r1, // 00 | {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 00 |
| vram_r0, vram_r1, vram_r0, vram_r1, // 40 | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| grcg_tcr0, grcg_tcr1, egc_rd, egc_rd, // 80 tdw/tcr | {vram_r0, vram_w0, vramw_r0, vramw_w0}, |
| vram_r0, vram_r1, egc_rd, egc_rd}; // c0 rmw | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| {vram_r0, vram_w0, vramw_r0, vramw_w0}, // 40 | |
| static const MEM16WRITE vramw_write[] = { | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| vramw_w0, vramw_w1, vramw_w0, vramw_w1, // 00 | {vram_r0, vram_w0, vramw_r0, vramw_w0}, |
| vramw_w0, vramw_w1, vramw_w0, vramw_w1, // 40 | {vram_r1, vram_w1, vramw_r1, vramw_w1}, |
| grcgw_tdw0, grcgw_tdw1, egcw_wt, egcw_wt, // 80 tdw/tcr | {grcg_tcr0, grcg_tdw0, grcgw_tcr0, grcgw_tdw0}, // 80 tdw/tcr |
| grcgw_rmw0, grcgw_rmw1, egcw_wt, egcw_wt}; // c0 rmw | {grcg_tcr1, grcg_tdw1, grcgw_tcr1, grcgw_tdw1}, |
| {egc_rd, egc_wt, egcw_rd, egcw_wt}, | |
| static const MEM16READ vramw_read[] = { | {egc_rd, egc_wt, egcw_rd, egcw_wt}, |
| vramw_r0, vramw_r1, vramw_r0, vramw_r1, // 00 | {vram_r0, grcg_rmw0, vramw_r0, grcgw_rmw0}, // c0 rmw |
| vramw_r0, vramw_r1, vramw_r0, vramw_r1, // 40 | {vram_r1, grcg_rmw1, vramw_r1, grcgw_rmw1}, |
| grcgw_tcr0, grcgw_tcr1, egcw_rd, egcw_rd, // 80 tdw/tcr | {egc_rd, egc_wt, egcw_rd, egcw_wt}, |
| vramw_r0, vramw_r1, egcw_rd, egcw_rd}; // c0 rmw | {egc_rd, egc_wt, egcw_rd, egcw_wt}}; |
| static REG8 MEMCALL i286_nonram_r(UINT32 address) { | static REG8 MEMCALL i286_nonram_r(UINT32 address) { |
| Line 699 static REG16 MEMCALL i286_nonram_rw(UINT | Line 737 static REG16 MEMCALL i286_nonram_rw(UINT |
| return(0xffff); | return(0xffff); |
| } | } |
| void MEMCALL i286_vram_dispatch(UINT func) { | |
| UINT proc; | void MEMCALL i286_memorymap(UINT type) { |
| proc = func & 0x0f; | const MMAPTBL *mm; |
| memory_write[0xa8000 >> 15] = vram_write[proc]; | |
| memory_write[0xb0000 >> 15] = vram_write[proc]; | |
| memory_write[0xb8000 >> 15] = vram_write[proc]; | |
| memory_write[0xe0000 >> 15] = vram_write[proc]; | |
| memory_read[0xa8000 >> 15] = vram_read[proc]; | |
| memory_read[0xb0000 >> 15] = vram_read[proc]; | |
| memory_read[0xb8000 >> 15] = vram_read[proc]; | |
| memory_read[0xe0000 >> 15] = vram_read[proc]; | |
| memword_write[0xa8000 >> 15] = vramw_write[proc]; | |
| memword_write[0xb0000 >> 15] = vramw_write[proc]; | |
| memword_write[0xb8000 >> 15] = vramw_write[proc]; | |
| memword_write[0xe0000 >> 15] = vramw_write[proc]; | |
| memword_read[0xa8000 >> 15] = vramw_read[proc]; | |
| memword_read[0xb0000 >> 15] = vramw_read[proc]; | |
| memword_read[0xb8000 >> 15] = vramw_read[proc]; | |
| memword_read[0xe0000 >> 15] = vramw_read[proc]; | |
| if (!(func & 0x10)) { // degital | |
| memory_write[0xe0000 >> 15] = i286_wn; | |
| memword_write[0xe0000 >> 15] = i286w_wn; | |
| memory_read[0xe0000 >> 15] = i286_nonram_r; | |
| memword_read[0xe0000 >> 15] = i286_nonram_rw; | |
| } | |
| } | |
| #if defined(MEMORY_DEBUG) | mm = mmaptbl + (type & 1); |
| static REG8 MEMCALL _i286_memoryread(UINT32 address) { | |
| if (address < I286_MEMREADMAX) { | memfn.rd8[0xe8000 >> 15] = mm->brd8; |
| return(mem[address]); | memfn.rd8[0xf0000 >> 15] = mm->brd8; |
| } | memfn.rd8[0xf8000 >> 15] = mm->ird8; |
| #if defined(USE_HIMEM) | memfn.wr8[0xe8000 >> 15] = mm->bwr8; |
| else if (address >= 0x10fff0) { | memfn.wr8[0xf0000 >> 15] = mm->bwr8; |
| address -= 0x100000; | memfn.wr8[0xf8000 >> 15] = mm->bwr8; |
| if (address < extmemmng_size) { | |
| return(extmemmng_ptr[address]); | memfn.rd16[0xe8000 >> 15] = mm->brd16; |
| } | memfn.rd16[0xf0000 >> 15] = mm->brd16; |
| else { | memfn.rd16[0xf8000 >> 15] = mm->ird16; |
| return(0xff); | memfn.wr16[0xe8000 >> 15] = mm->bwr16; |
| } | memfn.wr16[0xf0000 >> 15] = mm->bwr16; |
| } | memfn.wr16[0xf8000 >> 15] = mm->bwr16; |
| #endif | |
| else { | |
| return(memory_read[(address >> 15) & 0x1f](address)); | |
| } | |
| } | } |
| static REG16 MEMCALL _i286_memoryread_w(UINT32 address) { | void MEMCALL i286_vram_dispatch(UINT func) { |
| REG16 ret; | |
| if (address < (I286_MEMREADMAX - 1)) { | |
| return(LOADINTELWORD(mem + address)); | |
| } | |
| #if defined(USE_HIMEM) | |
| else if (address >= (0x10fff0 - 1)) { | |
| address -= 0x100000; | |
| if (address == (0x00fff0 - 1)) { | |
| ret = mem[0x100000 + address]; | |
| } | |
| else if (address < extmemmng_size) { | |
| ret = extmemmng_ptr[address]; | |
| } | |
| else { | |
| ret = 0xff; | |
| } | |
| address++; | |
| if (address < extmemmng_size) { | |
| ret += extmemmng_ptr[address] << 8; | |
| } | |
| else { | |
| ret += 0xff00; | |
| } | |
| return(ret); | |
| } | |
| #endif | |
| else if ((address & 0x7fff) != 0x7fff) { | |
| return(memword_read[(address >> 15) & 0x1f](address)); | |
| } | |
| else { | |
| ret = memory_read[(address >> 15) & 0x1f](address); | |
| address++; | |
| ret += memory_read[(address >> 15) & 0x1f](address) << 8; | |
| return(ret); | |
| } | |
| } | |
| REG8 MEMCALL i286_memoryread(UINT32 address) { | const VACCTBL *vacc; |
| REG8 r; | vacc = vacctbl + (func & 0x0f); |
| r = _i286_memoryread(address); | memfn.rd8[0xa8000 >> 15] = vacc->rd8; |
| if (r & 0xffffff00) { | memfn.rd8[0xb0000 >> 15] = vacc->rd8; |
| TRACEOUT(("error i286_memoryread %x %x", address, r)); | memfn.rd8[0xb8000 >> 15] = vacc->rd8; |
| memfn.rd8[0xe0000 >> 15] = vacc->rd8; | |
| memfn.wr8[0xa8000 >> 15] = vacc->wr8; | |
| memfn.wr8[0xb0000 >> 15] = vacc->wr8; | |
| memfn.wr8[0xb8000 >> 15] = vacc->wr8; | |
| memfn.wr8[0xe0000 >> 15] = vacc->wr8; | |
| memfn.rd16[0xa8000 >> 15] = vacc->rd16; | |
| memfn.rd16[0xb0000 >> 15] = vacc->rd16; | |
| memfn.rd16[0xb8000 >> 15] = vacc->rd16; | |
| memfn.rd16[0xe0000 >> 15] = vacc->rd16; | |
| memfn.wr16[0xa8000 >> 15] = vacc->wr16; | |
| memfn.wr16[0xb0000 >> 15] = vacc->wr16; | |
| memfn.wr16[0xb8000 >> 15] = vacc->wr16; | |
| memfn.wr16[0xe0000 >> 15] = vacc->wr16; | |
| if (!(func & 0x10)) { // digital | |
| memfn.wr8[0xe0000 >> 15] = i286_wn; | |
| memfn.wr16[0xe0000 >> 15] = i286w_wn; | |
| memfn.rd8[0xe0000 >> 15] = i286_nonram_r; | |
| memfn.rd16[0xe0000 >> 15] = i286_nonram_rw; | |
| } | } |
| return(r); | |
| } | } |
| REG16 MEMCALL i286_memoryread_w(UINT32 address) { | |
| REG16 r; | |
| r = _i286_memoryread_w(address); | |
| if (r & 0xffff0000) { | |
| TRACEOUT(("error i286_memoryread_w %x %x", address, r)); | |
| } | |
| return(r); | |
| } | |
| #else | |
| REG8 MEMCALL i286_memoryread(UINT32 address) { | REG8 MEMCALL i286_memoryread(UINT32 address) { |
| if (address < I286_MEMREADMAX) { | if (address < I286_MEMREADMAX) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| #if defined(USE_HIMEM) | #if defined(USE_HIMEM) |
| else if (address >= 0x10fff0) { | else if (address >= USE_HIMEM) { |
| address -= 0x100000; | address -= 0x100000; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| return(extmemmng_ptr[address]); | return(CPU_EXTMEM[address]); |
| } | } |
| else { | else { |
| return(0xff); | return(0xff); |
| Line 833 REG8 MEMCALL i286_memoryread(UINT32 addr | Line 810 REG8 MEMCALL i286_memoryread(UINT32 addr |
| } | } |
| #endif | #endif |
| else { | else { |
| return(memory_read[(address >> 15) & 0x1f](address)); | return(memfn.rd8[(address >> 15) & 0x1f](address)); |
| } | } |
| } | } |
| Line 845 REG16 MEMCALL i286_memoryread_w(UINT32 a | Line 822 REG16 MEMCALL i286_memoryread_w(UINT32 a |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| #if defined(USE_HIMEM) | #if defined(USE_HIMEM) |
| else if (address >= (0x10fff0 - 1)) { | else if (address >= (USE_HIMEM - 1)) { |
| address -= 0x100000; | address -= 0x100000; |
| if (address == (0x00fff0 - 1)) { | if (address == (USE_HIMEM - 0x100000 - 1)) { |
| ret = mem[0x100000 + address]; | ret = mem[0x100000 + address]; |
| } | } |
| else if (address < extmemmng_size) { | else if (address < CPU_EXTMEMSIZE) { |
| ret = extmemmng_ptr[address]; | ret = CPU_EXTMEM[address]; |
| } | } |
| else { | else { |
| ret = 0xff; | ret = 0xff; |
| } | } |
| address++; | address++; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| ret += extmemmng_ptr[address] << 8; | ret += CPU_EXTMEM[address] << 8; |
| } | } |
| else { | else { |
| ret += 0xff00; | ret += 0xff00; |
| Line 867 REG16 MEMCALL i286_memoryread_w(UINT32 a | Line 844 REG16 MEMCALL i286_memoryread_w(UINT32 a |
| } | } |
| #endif | #endif |
| else if ((address & 0x7fff) != 0x7fff) { | else if ((address & 0x7fff) != 0x7fff) { |
| return(memword_read[(address >> 15) & 0x1f](address)); | return(memfn.rd16[(address >> 15) & 0x1f](address)); |
| } | } |
| else { | else { |
| ret = memory_read[(address >> 15) & 0x1f](address); | ret = memfn.rd8[(address >> 15) & 0x1f](address); |
| address++; | address++; |
| ret += memory_read[(address >> 15) & 0x1f](address) << 8; | ret += memfn.rd8[(address >> 15) & 0x1f](address) << 8; |
| return(ret); | return(ret); |
| } | } |
| } | } |
| #endif | |
| void MEMCALL i286_memorywrite(UINT32 address, REG8 value) { | void MEMCALL i286_memorywrite(UINT32 address, REG8 value) { |
| Line 884 void MEMCALL i286_memorywrite(UINT32 add | Line 860 void MEMCALL i286_memorywrite(UINT32 add |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| #if defined(USE_HIMEM) | #if defined(USE_HIMEM) |
| else if (address >= 0x10fff0) { | else if (address >= USE_HIMEM) { |
| address -= 0x100000; | address -= 0x100000; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| extmemmng_ptr[address] = (BYTE)value; | CPU_EXTMEM[address] = (BYTE)value; |
| } | } |
| } | } |
| #endif | #endif |
| else { | else { |
| memory_write[(address >> 15) & 0x1f](address, value); | memfn.wr8[(address >> 15) & 0x1f](address, value); |
| } | } |
| } | } |
| Line 902 void MEMCALL i286_memorywrite_w(UINT32 a | Line 878 void MEMCALL i286_memorywrite_w(UINT32 a |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| } | } |
| #if defined(USE_HIMEM) | #if defined(USE_HIMEM) |
| else if (address >= (0x10fff0 - 1)) { | else if (address >= (USE_HIMEM - 1)) { |
| address -= 0x100000; | address -= 0x100000; |
| if (address == (0x00fff0 - 1)) { | if (address == (USE_HIMEM - 0x100000 - 1)) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| else if (address < extmemmng_size) { | else if (address < CPU_EXTMEMSIZE) { |
| extmemmng_ptr[address] = (BYTE)value; | CPU_EXTMEM[address] = (BYTE)value; |
| } | } |
| address++; | address++; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| extmemmng_ptr[address] = (BYTE)(value >> 8); | CPU_EXTMEM[address] = (BYTE)(value >> 8); |
| } | } |
| } | } |
| #endif | #endif |
| else if ((address & 0x7fff) != 0x7fff) { | else if ((address & 0x7fff) != 0x7fff) { |
| memword_write[(address >> 15) & 0x1f](address, value); | memfn.wr16[(address >> 15) & 0x1f](address, value); |
| } | } |
| else { | else { |
| memory_write[(address >> 15) & 0x1f](address, (BYTE)value); | memfn.wr8[(address >> 15) & 0x1f](address, (BYTE)value); |
| address++; | address++; |
| memory_write[(address >> 15) & 0x1f](address, (BYTE)(value >> 8)); | memfn.wr8[(address >> 15) & 0x1f](address, (BYTE)(value >> 8)); |
| } | } |
| } | } |
| REG8 MEMCALL i286_membyte_read(UINT seg, UINT off) { | REG8 MEMCALL meml_read8(UINT seg, UINT off) { |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < I286_MEMREADMAX) { | if (address < I286_MEMREADMAX) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 939 REG8 MEMCALL i286_membyte_read(UINT seg, | Line 915 REG8 MEMCALL i286_membyte_read(UINT seg, |
| } | } |
| } | } |
| REG16 MEMCALL i286_memword_read(UINT seg, UINT off) { | REG16 MEMCALL meml_read16(UINT seg, UINT off) { |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < (I286_MEMREADMAX - 1)) { | if (address < (I286_MEMREADMAX - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 952 REG16 MEMCALL i286_memword_read(UINT seg | Line 928 REG16 MEMCALL i286_memword_read(UINT seg |
| } | } |
| } | } |
| void MEMCALL i286_membyte_write(UINT seg, UINT off, REG8 value) { | void MEMCALL meml_write8(UINT seg, UINT off, REG8 value) { |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < I286_MEMWRITEMAX) { | if (address < I286_MEMWRITEMAX) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| Line 965 void MEMCALL i286_membyte_write(UINT seg | Line 941 void MEMCALL i286_membyte_write(UINT seg |
| } | } |
| } | } |
| void MEMCALL i286_memword_write(UINT seg, UINT off, REG16 value) { | void MEMCALL meml_write16(UINT seg, UINT off, REG16 value) { |
| UINT32 address; | UINT32 address; |
| address = (seg << 4) + off; | address = (seg << 4) + LOW16(off); |
| if (address < (I286_MEMWRITEMAX - 1)) { | if (address < (I286_MEMWRITEMAX - 1)) { |
| STOREINTELWORD(mem + address, value); | STOREINTELWORD(mem + address, value); |
| } | } |
| Line 978 void MEMCALL i286_memword_write(UINT seg | Line 954 void MEMCALL i286_memword_write(UINT seg |
| } | } |
| } | } |
| void MEMCALL i286_memstr_read(UINT seg, UINT off, void *dat, UINT leng) { | void MEMCALL meml_readstr(UINT seg, UINT off, void *dat, UINT leng) { |
| BYTE *out; | BYTE *out; |
| UINT32 adrs; | UINT32 adrs; |
| Line 986 void MEMCALL i286_memstr_read(UINT seg, | Line 962 void MEMCALL i286_memstr_read(UINT seg, |
| out = (BYTE *)dat; | out = (BYTE *)dat; |
| adrs = seg << 4; | adrs = seg << 4; |
| off = LOW16(off); | |
| if ((I286_MEMREADMAX >= 0x10000) && | if ((I286_MEMREADMAX >= 0x10000) && |
| (adrs < (I286_MEMREADMAX - 0x10000))) { | (adrs < (I286_MEMREADMAX - 0x10000))) { |
| if (leng) { | if (leng) { |
| Line 1015 void MEMCALL i286_memstr_read(UINT seg, | Line 992 void MEMCALL i286_memstr_read(UINT seg, |
| } | } |
| } | } |
| void MEMCALL i286_memstr_write(UINT seg, UINT off, | void MEMCALL meml_writestr(UINT seg, UINT off, const void *dat, UINT leng) { |
| const void *dat, UINT leng) { | |
| BYTE *out; | BYTE *out; |
| UINT32 adrs; | UINT32 adrs; |
| Line 1024 void MEMCALL i286_memstr_write(UINT seg, | Line 1000 void MEMCALL i286_memstr_write(UINT seg, |
| out = (BYTE *)dat; | out = (BYTE *)dat; |
| adrs = seg << 4; | adrs = seg << 4; |
| off = LOW16(off); | |
| if ((I286_MEMWRITEMAX >= 0x10000) && | if ((I286_MEMWRITEMAX >= 0x10000) && |
| (adrs < (I286_MEMWRITEMAX - 0x10000))) { | (adrs < (I286_MEMWRITEMAX - 0x10000))) { |
| if (leng) { | if (leng) { |
| Line 1053 void MEMCALL i286_memstr_write(UINT seg, | Line 1030 void MEMCALL i286_memstr_write(UINT seg, |
| } | } |
| } | } |
| void MEMCALL i286_memx_read(UINT32 address, void *dat, UINT leng) { | void MEMCALL meml_read(UINT32 address, void *dat, UINT leng) { |
| if ((address + leng) < I286_MEMREADMAX) { | if ((address + leng) < I286_MEMREADMAX) { |
| CopyMemory(dat, mem + address, leng); | CopyMemory(dat, mem + address, leng); |
| Line 1072 void MEMCALL i286_memx_read(UINT32 addre | Line 1049 void MEMCALL i286_memx_read(UINT32 addre |
| } | } |
| } | } |
| void MEMCALL i286_memx_write(UINT32 address, const void *dat, UINT leng) { | void MEMCALL meml_write(UINT32 address, const void *dat, UINT leng) { |
| const BYTE *out; | const BYTE *out; |