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| version 1.9, 2003/12/03 07:59:57 | version 1.10, 2003/12/08 00:55:31 |
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| Line 1 | Line 1 |
| #include "compiler.h" | #include "compiler.h" |
| #include "i286.h" | #include "cpucore.h" |
| #include "memory.h" | #include "memory.h" |
| #include "egcmem.h" | #include "egcmem.h" |
| #include "pccore.h" | #include "pccore.h" |
| Line 17 | Line 17 |
| static void MEMCALL i286_wt(UINT32 address, REG8 value) { | static void MEMCALL i286_wt(UINT32 address, REG8 value) { |
| mem[address & i286core.s.adrsmask] = (BYTE)value; | mem[address & CPU_ADRSMASK] = (BYTE)value; |
| } | } |
| static void MEMCALL tram_wt(UINT32 address, REG8 value) { | static void MEMCALL tram_wt(UINT32 address, REG8 value) { |
| I286_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= vramop.tramwait; |
| if (address < 0xa2000) { | if (address < 0xa2000) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| tramupdate[LOW12(address >> 1)] = 1; | tramupdate[LOW12(address >> 1)] = 1; |
| Line 54 static void MEMCALL tram_wt(UINT32 addre | Line 54 static void MEMCALL tram_wt(UINT32 addre |
| static void MEMCALL vram_w0(UINT32 address, REG8 value) { | static void MEMCALL vram_w0(UINT32 address, REG8 value) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 1; | vramupdate[LOW15(address)] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 62 static void MEMCALL vram_w0(UINT32 addre | Line 62 static void MEMCALL vram_w0(UINT32 addre |
| static void MEMCALL vram_w1(UINT32 address, REG8 value) { | static void MEMCALL vram_w1(UINT32 address, REG8 value) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| mem[address + VRAM_STEP] = (BYTE)value; | mem[address + VRAM_STEP] = (BYTE)value; |
| vramupdate[LOW15(address)] |= 2; | vramupdate[LOW15(address)] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 73 static void MEMCALL grcg_rmw0(UINT32 add | Line 73 static void MEMCALL grcg_rmw0(UINT32 add |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| Line 102 static void MEMCALL grcg_rmw1(UINT32 add | Line 102 static void MEMCALL grcg_rmw1(UINT32 add |
| REG8 mask; | REG8 mask; |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| mask = ~value; | mask = ~value; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| Line 130 static void MEMCALL grcg_tdw0(UINT32 add | Line 130 static void MEMCALL grcg_tdw0(UINT32 add |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 1; | vramupdate[address] |= 1; |
| gdcs.grphdisp |= 1; | gdcs.grphdisp |= 1; |
| Line 154 static void MEMCALL grcg_tdw1(UINT32 add | Line 154 static void MEMCALL grcg_tdw1(UINT32 add |
| BYTE *vram; | BYTE *vram; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| address = LOW15(address); | address = LOW15(address); |
| vramupdate[address] |= 2; | vramupdate[address] |= 2; |
| gdcs.grphdisp |= 2; | gdcs.grphdisp |= 2; |
| Line 195 static void MEMCALL i286_wn(UINT32 addre | Line 195 static void MEMCALL i286_wn(UINT32 addre |
| static REG8 MEMCALL i286_rd(UINT32 address) { | static REG8 MEMCALL i286_rd(UINT32 address) { |
| return(mem[address & i286core.s.adrsmask]); | return(mem[address & CPU_ADRSMASK]); |
| } | } |
| static REG8 MEMCALL tram_rd(UINT32 address) { | static REG8 MEMCALL tram_rd(UINT32 address) { |
| I286_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= vramop.tramwait; |
| if (address < 0xa4000) { | if (address < 0xa4000) { |
| return(mem[address]); | return(mem[address]); |
| } | } |
| Line 217 static REG8 MEMCALL tram_rd(UINT32 addre | Line 217 static REG8 MEMCALL tram_rd(UINT32 addre |
| static REG8 MEMCALL vram_r0(UINT32 address) { | static REG8 MEMCALL vram_r0(UINT32 address) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| return(mem[address]); | return(mem[address]); |
| } | } |
| static REG8 MEMCALL vram_r1(UINT32 address) { | static REG8 MEMCALL vram_r1(UINT32 address) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| return(mem[address + VRAM_STEP]); | return(mem[address + VRAM_STEP]); |
| } | } |
| Line 232 static REG8 MEMCALL grcg_tcr0(UINT32 add | Line 232 static REG8 MEMCALL grcg_tcr0(UINT32 add |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| ret = 0; | ret = 0; |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 255 static REG8 MEMCALL grcg_tcr1(UINT32 add | Line 255 static REG8 MEMCALL grcg_tcr1(UINT32 add |
| const BYTE *vram; | const BYTE *vram; |
| REG8 ret; | REG8 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 285 static REG8 MEMCALL emmc_rd(UINT32 addre | Line 285 static REG8 MEMCALL emmc_rd(UINT32 addre |
| static REG8 MEMCALL i286_itf(UINT32 address) { | static REG8 MEMCALL i286_itf(UINT32 address) { |
| if (i286core.s.itfbank) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address = ITF_ADRS + LOW15(address); |
| } | } |
| return(mem[address]); | return(mem[address]); |
| Line 298 static void MEMCALL i286w_wt(UINT32 addr | Line 298 static void MEMCALL i286w_wt(UINT32 addr |
| BYTE *ptr; | BYTE *ptr; |
| ptr = mem + (address & i286core.s.adrsmask); | ptr = mem + (address & CPU_ADRSMASK); |
| STOREINTELWORD(ptr, value); | STOREINTELWORD(ptr, value); |
| } | } |
| Line 349 static void MEMCALL tramw_wt(UINT32 addr | Line 349 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_NON(page) { \ | #define GRCGW_NON(page) { \ |
| I286_REMCLOCK -= vramop.vramwait; \ | CPU_REMCLOCK -= vramop.vramwait; \ |
| STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ | STOREINTELWORD(mem + address + VRAM_STEP*(page), value); \ |
| vramupdate[LOW15(address)] |= (1 << page); \ | vramupdate[LOW15(address)] |= (1 << page); \ |
| vramupdate[LOW15(address + 1)] |= (1 << page); \ | vramupdate[LOW15(address + 1)] |= (1 << page); \ |
| Line 358 static void MEMCALL tramw_wt(UINT32 addr | Line 358 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_RMW(page) { \ | #define GRCGW_RMW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| I286_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= vramop.grcgwait; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 404 static void MEMCALL tramw_wt(UINT32 addr | Line 404 static void MEMCALL tramw_wt(UINT32 addr |
| #define GRCGW_TDW(page) { \ | #define GRCGW_TDW(page) { \ |
| BYTE *vram; \ | BYTE *vram; \ |
| I286_REMCLOCK -= vramop.grcgwait; \ | CPU_REMCLOCK -= vramop.grcgwait; \ |
| address = LOW15(address); \ | address = LOW15(address); \ |
| vramupdate[address] |= (1 << page); \ | vramupdate[address] |= (1 << page); \ |
| vramupdate[address + 1] |= (1 << page); \ | vramupdate[address + 1] |= (1 << page); \ |
| Line 480 static REG16 MEMCALL i286w_rd(UINT32 add | Line 480 static REG16 MEMCALL i286w_rd(UINT32 add |
| BYTE *ptr; | BYTE *ptr; |
| ptr = mem + (address & i286core.s.adrsmask); | ptr = mem + (address & CPU_ADRSMASK); |
| return(LOADINTELWORD(ptr)); | return(LOADINTELWORD(ptr)); |
| } | } |
| static REG16 MEMCALL tramw_rd(UINT32 address) { | static REG16 MEMCALL tramw_rd(UINT32 address) { |
| I286_REMCLOCK -= vramop.tramwait; | CPU_REMCLOCK -= vramop.tramwait; |
| if (address < (0xa4000 - 1)) { | if (address < (0xa4000 - 1)) { |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| Line 515 static REG16 MEMCALL tramw_rd(UINT32 add | Line 515 static REG16 MEMCALL tramw_rd(UINT32 add |
| static REG16 MEMCALL vramw_r0(UINT32 address) { | static REG16 MEMCALL vramw_r0(UINT32 address) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| } | } |
| static REG16 MEMCALL vramw_r1(UINT32 address) { | static REG16 MEMCALL vramw_r1(UINT32 address) { |
| I286_REMCLOCK -= vramop.vramwait; | CPU_REMCLOCK -= vramop.vramwait; |
| return(LOADINTELWORD(mem + address + VRAM_STEP)); | return(LOADINTELWORD(mem + address + VRAM_STEP)); |
| } | } |
| Line 530 static REG16 MEMCALL grcgw_tcr0(UINT32 a | Line 530 static REG16 MEMCALL grcgw_tcr0(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 553 static REG16 MEMCALL grcgw_tcr1(UINT32 a | Line 553 static REG16 MEMCALL grcgw_tcr1(UINT32 a |
| BYTE *vram; | BYTE *vram; |
| REG16 ret; | REG16 ret; |
| I286_REMCLOCK -= vramop.grcgwait; | CPU_REMCLOCK -= vramop.grcgwait; |
| ret = 0; | ret = 0; |
| vram = mem + LOW15(address); | vram = mem + LOW15(address); |
| if (!(grcg.modereg & 1)) { | if (!(grcg.modereg & 1)) { |
| Line 610 const BYTE *ptr; | Line 610 const BYTE *ptr; |
| static REG16 MEMCALL i286w_itf(UINT32 address) { | static REG16 MEMCALL i286w_itf(UINT32 address) { |
| if (i286core.s.itfbank) { | if (CPU_ITFBANK) { |
| address = ITF_ADRS + LOW15(address); | address = ITF_ADRS + LOW15(address); |
| } | } |
| return(LOADINTELWORD(mem + address)); | return(LOADINTELWORD(mem + address)); |
| Line 743 static REG8 MEMCALL _i286_memoryread(UIN | Line 743 static REG8 MEMCALL _i286_memoryread(UIN |
| #if defined(USE_HIMEM) | #if defined(USE_HIMEM) |
| else if (address >= 0x10fff0) { | else if (address >= 0x10fff0) { |
| address -= 0x100000; | address -= 0x100000; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| return(extmemmng_ptr[address]); | return(CPU_EXTMEM[address]); |
| } | } |
| else { | else { |
| return(0xff); | return(0xff); |
| Line 769 static REG16 MEMCALL _i286_memoryread_w( | Line 769 static REG16 MEMCALL _i286_memoryread_w( |
| if (address == (0x00fff0 - 1)) { | if (address == (0x00fff0 - 1)) { |
| ret = mem[0x100000 + address]; | ret = mem[0x100000 + address]; |
| } | } |
| else if (address < extmemmng_size) { | else if (address < CPU_EXTMEMSIZE) { |
| ret = extmemmng_ptr[address]; | ret = CPU_EXTMEM[address]; |
| } | } |
| else { | else { |
| ret = 0xff; | ret = 0xff; |
| } | } |
| address++; | address++; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| ret += extmemmng_ptr[address] << 8; | ret += CPU_EXTMEM[address] << 8; |
| } | } |
| else { | else { |
| ret += 0xff00; | ret += 0xff00; |
| Line 826 REG8 MEMCALL i286_memoryread(UINT32 addr | Line 826 REG8 MEMCALL i286_memoryread(UINT32 addr |
| #if defined(USE_HIMEM) | #if defined(USE_HIMEM) |
| else if (address >= 0x10fff0) { | else if (address >= 0x10fff0) { |
| address -= 0x100000; | address -= 0x100000; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| return(extmemmng_ptr[address]); | return(CPU_EXTMEM[address]); |
| } | } |
| else { | else { |
| return(0xff); | return(0xff); |
| Line 852 REG16 MEMCALL i286_memoryread_w(UINT32 a | Line 852 REG16 MEMCALL i286_memoryread_w(UINT32 a |
| if (address == (0x00fff0 - 1)) { | if (address == (0x00fff0 - 1)) { |
| ret = mem[0x100000 + address]; | ret = mem[0x100000 + address]; |
| } | } |
| else if (address < extmemmng_size) { | else if (address < CPU_EXTMEMSIZE) { |
| ret = extmemmng_ptr[address]; | ret = CPU_EXTMEM[address]; |
| } | } |
| else { | else { |
| ret = 0xff; | ret = 0xff; |
| } | } |
| address++; | address++; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| ret += extmemmng_ptr[address] << 8; | ret += CPU_EXTMEM[address] << 8; |
| } | } |
| else { | else { |
| ret += 0xff00; | ret += 0xff00; |
| Line 888 void MEMCALL i286_memorywrite(UINT32 add | Line 888 void MEMCALL i286_memorywrite(UINT32 add |
| #if defined(USE_HIMEM) | #if defined(USE_HIMEM) |
| else if (address >= 0x10fff0) { | else if (address >= 0x10fff0) { |
| address -= 0x100000; | address -= 0x100000; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| extmemmng_ptr[address] = (BYTE)value; | CPU_EXTMEM[address] = (BYTE)value; |
| } | } |
| } | } |
| #endif | #endif |
| Line 909 void MEMCALL i286_memorywrite_w(UINT32 a | Line 909 void MEMCALL i286_memorywrite_w(UINT32 a |
| if (address == (0x00fff0 - 1)) { | if (address == (0x00fff0 - 1)) { |
| mem[address] = (BYTE)value; | mem[address] = (BYTE)value; |
| } | } |
| else if (address < extmemmng_size) { | else if (address < CPU_EXTMEMSIZE) { |
| extmemmng_ptr[address] = (BYTE)value; | CPU_EXTMEM[address] = (BYTE)value; |
| } | } |
| address++; | address++; |
| if (address < extmemmng_size) { | if (address < CPU_EXTMEMSIZE) { |
| extmemmng_ptr[address] = (BYTE)(value >> 8); | CPU_EXTMEM[address] = (BYTE)(value >> 8); |
| } | } |
| } | } |
| #endif | #endif |