|
|
| version 1.1.1.1, 2003/10/16 17:57:16 | version 1.3, 2003/10/19 14:56:15 |
|---|---|
| Line 1 | Line 1 |
| //---------------------------------------------------------------------------- | //---------------------------------------------------------------------------- |
| // | // |
| // i286y : 80286 Engine for Pentium ver0.02 | // i286c : 80286 Engine for Pentium ver0.02 |
| // | // |
| // Copyright by Yui/Studio Milmake 1999-2000 | // Copyright by Yui/Studio Milmake 1999-2000 |
| // | // |
| Line 41 typedef struct { | Line 41 typedef struct { |
| BYTE flag_h; | BYTE flag_h; |
| BYTE ip_l; | BYTE ip_l; |
| BYTE ip_h; | BYTE ip_h; |
| } I286REG_BYTE; | } I286REG8; |
| typedef struct { | typedef struct { |
| UINT16 ax; | UINT16 ax; |
| Line 58 typedef struct { | Line 58 typedef struct { |
| UINT16 ds; | UINT16 ds; |
| UINT16 flag; | UINT16 flag; |
| UINT16 ip; | UINT16 ip; |
| } I286REG_WORD; | } I286REG16; |
| typedef struct { | |
| UINT16 limit; | |
| UINT16 base; | |
| BYTE base24; | |
| BYTE reserved; | |
| } I286DTR; | |
| typedef union { | |
| I286REG_BYTE b; | |
| I286REG_WORD w; | |
| } I286REGS; | |
| typedef struct { | typedef struct { |
| union { | |
| I286REG8 b; | |
| I286REG16 w; | |
| } r; | |
| SINT32 remainclock; | |
| SINT32 baseclock; | |
| UINT32 clock; | |
| UINT32 es_base; | UINT32 es_base; |
| UINT32 cs_base; | UINT32 cs_base; |
| UINT32 ss_base; | UINT32 ss_base; |
| Line 74 typedef struct { | Line 84 typedef struct { |
| UINT32 ds_fix; | UINT32 ds_fix; |
| UINT16 prefix; | UINT16 prefix; |
| BYTE trap; | BYTE trap; |
| BYTE reserved; | BYTE cpu_type; |
| UINT32 pf_semaphore; | UINT32 pf_semaphore; |
| UINT32 repbak; | UINT32 repbak; |
| UINT32 inport; | UINT32 inport; |
| BYTE prefetchque[4]; | BYTE prefetchque[4]; |
| BYTE cpu_type; | I286DTR GDTR; |
| } I286STAT; | I286DTR IDTR; |
| UINT16 MSW; | |
| typedef struct { | } I286REG; |
| UINT16 limit; | |
| UINT16 base; | |
| BYTE base24; | |
| BYTE reserved; | |
| } I286DTR; | |
| #ifdef __cplusplus | #ifdef __cplusplus |
| extern "C" { | extern "C" { |
| #endif | #endif |
| extern I286REGS i286r; | extern I286REG i286reg; |
| extern I286STAT i286s; | |
| extern I286DTR GDTR; | |
| extern I286DTR IDTR; | |
| extern UINT16 MSW; | |
| extern const BYTE iflags[]; | extern const BYTE iflags[]; |
| #define I286_MEM mem | #define I286_MEM mem |
| #define I286_REG i286r | #define I286_REG i286reg.r |
| #define I286_SEGREG i286r.w.es | #define I286_SEGREG i286reg.r.w.es |
| #define I286_AX i286reg.r.w.ax | |
| #define I286_BX i286reg.r.w.bx | |
| #define I286_CX i286reg.r.w.cx | |
| #define I286_DX i286reg.r.w.dx | |
| #define I286_SI i286reg.r.w.si | |
| #define I286_DI i286reg.r.w.di | |
| #define I286_BP i286reg.r.w.bp | |
| #define I286_SP i286reg.r.w.sp | |
| #define I286_CS i286reg.r.w.cs | |
| #define I286_DS i286reg.r.w.ds | |
| #define I286_ES i286reg.r.w.es | |
| #define I286_SS i286reg.r.w.ss | |
| #define I286_IP i286reg.r.w.ip | |
| #define SEG_BASE i286reg.es_base | |
| #define ES_BASE i286reg.es_base | |
| #define CS_BASE i286reg.cs_base | |
| #define SS_BASE i286reg.ss_base | |
| #define DS_BASE i286reg.ds_base | |
| #define SS_FIX i286reg.ss_fix | |
| #define DS_FIX i286reg.ds_fix | |
| #define I286_AL i286reg.r.b.al | |
| #define I286_BL i286reg.r.b.bl | |
| #define I286_CL i286reg.r.b.cl | |
| #define I286_DL i286reg.r.b.dl | |
| #define I286_AH i286reg.r.b.ah | |
| #define I286_BH i286reg.r.b.bh | |
| #define I286_CH i286reg.r.b.ch | |
| #define I286_DH i286reg.r.b.dh | |
| #define I286_FLAG i286reg.r.w.flag | |
| #define I286_FLAGL i286reg.r.b.flag_l | |
| #define I286_FLAGH i286reg.r.b.flag_h | |
| #define I286_TRAP i286reg.trap | |
| #define I286_OV i286reg.ovflag | |
| #define I286_REMCLOCK i286reg.remainclock | |
| #define I286_BASECLOCK i286reg.baseclock | |
| #define I286_CLOCK i286reg.clock | |
| #define I286_AX i286r.w.ax | |
| #define I286_BX i286r.w.bx | |
| #define I286_CX i286r.w.cx | |
| #define I286_DX i286r.w.dx | |
| #define I286_SI i286r.w.si | |
| #define I286_DI i286r.w.di | |
| #define I286_BP i286r.w.bp | |
| #define I286_SP i286r.w.sp | |
| #define I286_CS i286r.w.cs | |
| #define I286_DS i286r.w.ds | |
| #define I286_ES i286r.w.es | |
| #define I286_SS i286r.w.ss | |
| #define I286_IP i286r.w.ip | |
| #define SEG_BASE i286s.es_base | |
| #define ES_BASE i286s.es_base | |
| #define CS_BASE i286s.cs_base | |
| #define SS_BASE i286s.ss_base | |
| #define DS_BASE i286s.ds_base | |
| #define SS_FIX i286s.ss_fix | |
| #define DS_FIX i286s.ds_fix | |
| #define I286_AL i286r.b.al | |
| #define I286_BL i286r.b.bl | |
| #define I286_CL i286r.b.cl | |
| #define I286_DL i286r.b.dl | |
| #define I286_AH i286r.b.ah | |
| #define I286_BH i286r.b.bh | |
| #define I286_CH i286r.b.ch | |
| #define I286_DH i286r.b.dh | |
| #define I286_FLAG i286r.w.flag | |
| #define I286_FLAGL i286r.b.flag_l | |
| #define I286_FLAGH i286r.b.flag_h | |
| #define I286_TRAP i286s.trap | |
| enum { | enum { |
| C_FLAG = 0x0001, | C_FLAG = 0x0001, |
| Line 154 enum { | Line 162 enum { |
| O_FLAG = 0x0800 | O_FLAG = 0x0800 |
| }; | }; |
| #define CPUTYPE i286s.cpu_type | #define CPUTYPE i286reg.cpu_type |
| #define CPUTYPE_V30 0x01 | #define CPUTYPE_V30 0x01 |
| // ver0.28 | // ver0.28 |
| #define REPPOSBAK i286s.repbak | #define REPPOSBAK i286reg.repbak |
| #define PREFIX_SMP i286s.pf_semaphore | #define PREFIX_SMP i286reg.pf_semaphore |
| #define isI286DI (!(I286_FLAG & I_FLAG)) | #define isI286DI (!(I286_FLAG & I_FLAG)) |
| #define isI286EI (I286_FLAG & I_FLAG) | #define isI286EI (I286_FLAG & I_FLAG) |