np2/i286x/i286x.cpp - diff

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Diff for /np2/i286x/i286x.cpp between versions 1.20 and 1.26

version 1.20, 2004/02/18 18:29:29	version 1.26, 2005/03/24 02:21:21
Line 11	Line 11
#include "i286xea.mcr"	#include "i286xea.mcr"
#include "v30patch.h"	#include "v30patch.h"
#include "bios.h"	#include "bios.h"
#include "dmap.h"	#include "dmax86.h"
	#if defined(ENABLE_TRAP)
	#include "steptrap.h"
	#include "inttrap.h"
	#endif


I286CORE i286core;	I286CORE i286core;

const BYTE iflags[256] = { // Z_FLAG, S_FLAG, P_FLAG	const UINT8 iflags[256] = { // Z_FLAG, S_FLAG, P_FLAG
0x44, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00,	0x44, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00,
0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04,	0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04,
0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04,	0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04,
Line 95 void i286x_setextsize(UINT32 size) {	Line 99 void i286x_setextsize(UINT32 size) {
CPU_EXTMEM = NULL;	CPU_EXTMEM = NULL;
}	}
if (size) {	if (size) {
CPU_EXTMEM = (BYTE *)_MALLOC(size + 16, "EXTMEM");	CPU_EXTMEM = (UINT8 *)_MALLOC(size + 16, "EXTMEM");
if (CPU_EXTMEM == NULL) {	if (CPU_EXTMEM == NULL) {
size = 0;	size = 0;
}	}
Line 110 void i286x_setextsize(UINT32 size) {	Line 114 void i286x_setextsize(UINT32 size) {

void i286x_setemm(UINT frame, UINT32 addr) {	void i286x_setemm(UINT frame, UINT32 addr) {

BYTE *ptr;	UINT8 *ptr;

frame &= 3;	frame &= 3;
if (addr < USE_HIMEM) {	if (addr < USE_HIMEM) {
Line 138 LABEL void i286x_resetprefetch(void) {	Line 142 LABEL void i286x_resetprefetch(void) {
}	}
}	}

LABEL void __fastcall i286x_interrupt(BYTE vect) {	LABEL void __fastcall i286x_interrupt(UINT8 vect) {

__asm {	__asm {
pushad	pushad
Line 264 LABEL void i286x(void) {	Line 268 LABEL void i286x(void) {
cmp dmac.working, 0	cmp dmac.working, 0
jne short i286_dma_mnlp	jne short i286_dma_mnlp

i286_mnlp: movzx eax, bl	i286_mnlp:
	#if defined(ENABLE_TRAP)
	mov edx, esi
	movzx ecx, I286_CS
	call steptrap
	#endif
	movzx eax, bl
call i286op[eax*4]	call i286op[eax*4]
cmp I286_REMCLOCK, 0	cmp I286_REMCLOCK, 0
jg i286_mnlp	jg i286_mnlp
Line 274 i286_mnlp: movzx eax, bl	Line 284 i286_mnlp: movzx eax, bl
ret	ret

align 16	align 16
i286_dma_mnlp: movzx eax, bl	i286_dma_mnlp:
	#if defined(ENABLE_TRAP)
	mov edx, esi
	movzx ecx, I286_CS
	call steptrap
	#endif
	movzx eax, bl
call i286op[eax*4]	call i286op[eax*4]
call dmap_i286	call dmax86
cmp I286_REMCLOCK, 0	cmp I286_REMCLOCK, 0
jg i286_dma_mnlp	jg i286_dma_mnlp
mov dword ptr (i286core.s.prefetchque), ebx	mov dword ptr (i286core.s.prefetchque), ebx
Line 285 i286_dma_mnlp: movzx eax, bl	Line 301 i286_dma_mnlp: movzx eax, bl
ret	ret

align 16	align 16
i286_trapping: movzx eax, bl	i286_trapping:
	#if defined(ENABLE_TRAP)
	mov edx, esi
	movzx ecx, I286_CS
	call steptrap
	#endif
	movzx eax, bl
call i286op[eax*4]	call i286op[eax*4]
cmp I286_TRAP, 0	cmp I286_TRAP, 0
je i286notrap	je i286notrap
Line 318 nexts:	Line 340 nexts:
mov dword ptr (i286core.s.prefetchque), ebx	mov dword ptr (i286core.s.prefetchque), ebx
mov I286_IP, si	mov I286_IP, si

call dmap_i286	call dmax86
popad	popad
ret	ret
}	}
Line 343 LABEL void removeprefix(void) {	Line 365 LABEL void removeprefix(void) {
I286 _reserved(void) {	I286 _reserved(void) {

__asm {	__asm {
inc si // 01/08/31	// inc si // 01/08/31
INT_NUM(6)	INT_NUM(6)
}	}
}	}
Line 448 I286 pop_es(void) { // 07: pop es	Line 470 I286 pop_es(void) { // 07: pop es
I286CLOCK(5)	I286CLOCK(5)
REGPOP(I286_ES)	REGPOP(I286_ES)
movzx eax, ax	movzx eax, ax
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short pop_es_pe	jne short pop_es_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
pop_es_base: mov ES_BASE, eax	pop_es_base: mov ES_BASE, eax
Line 661 I286 pop_ss(void) { // 17: pop ss	Line 683 I286 pop_ss(void) { // 17: pop ss
I286CLOCK(5)	I286CLOCK(5)
REGPOP(I286_SS)	REGPOP(I286_SS)
movzx eax, ax	movzx eax, ax
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short pop_ss_pe	jne short pop_ss_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
pop_ss_base: mov SS_BASE, eax	pop_ss_base: mov SS_BASE, eax
Line 790 I286 pop_ds(void) { // 1F: pop ds	Line 812 I286 pop_ds(void) { // 1F: pop ds
I286CLOCK(5)	I286CLOCK(5)
REGPOP(I286_DS)	REGPOP(I286_DS)
movzx eax, ax	movzx eax, ax
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short pop_ds_pe	jne short pop_ds_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
pop_ds_base: mov DS_BASE, eax	pop_ds_base: mov DS_BASE, eax
Line 1695 I286 _arpl(void) {	Line 1717 I286 _arpl(void) {
xor eax, eax	xor eax, eax
cmp bh, 0c0h	cmp bh, 0c0h
setc al	setc al
add si, ax	// add si, ax
add eax, 10	add eax, 10
I286CLOCK(eax)	I286CLOCK(eax)
INT_NUM(6)	INT_NUM(6)
Line 2385 I286 mov_ea_r8(void) { // 88: mov	Line 2407 I286 mov_ea_r8(void) { // 88: mov
__asm {	__asm {
PREPART_EA_REG8(2)	PREPART_EA_REG8(2)
mov I286_REG[eax], dl	mov I286_REG[eax], dl
GET_NEXTPRE2 // ea_reg�� regreg��	GET_NEXTPRE1 // ea_reg�� regreg��
ret	ret
align 16	align 16
memory_eareg8:	memory_eareg8:
Line 2498 I286 mov_seg_ea(void) { // 8E: mov	Line 2520 I286 mov_seg_ea(void) { // 8E: mov
segset:	segset:
mov word ptr I286_SEGREG[ebp], ax	mov word ptr I286_SEGREG[ebp], ax
movzx eax, ax	movzx eax, ax
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short mov_seg_pe	jne short mov_seg_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
mov_seg_base: mov SEG_BASE[ebp*2], eax	mov_seg_base: mov SEG_BASE[ebp*2], eax
Line 2714 I286 call_far(void) { // 9A: call	Line 2736 I286 call_far(void) { // 9A: call
mov si, bx	mov si, bx
shr ebx, 16	shr ebx, 16
mov I286_CS, bx	mov I286_CS, bx
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short call_far_pe	jne short call_far_pe
shl ebx, 4	shl ebx, 4
mov CS_BASE, ebx	mov CS_BASE, ebx
Line 3370 I286 les_r16_ea(void) { // C4: les	Line 3392 I286 les_r16_ea(void) { // C4: les
lea ecx, [edi + ebp]	lea ecx, [edi + ebp]
call i286_memoryread_w	call i286_memoryread_w
mov I286_ES, ax	mov I286_ES, ax
and eax, 0000ffffh	movzx eax, ax
	test byte ptr (I286_MSW), MSW_PE
	jne short les_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
mov ES_BASE, eax	les_base: mov ES_BASE, eax
ret	ret
align 4
src_register:	les_pe: push offset les_base
INT_NUM(6)	jmp i286x_selector

	src_register: INT_NUM(6)
}	}
}	}

Line 3399 I286 lds_r16_ea(void) { // C5: lds	Line 3425 I286 lds_r16_ea(void) { // C5: lds
lea ecx, [edi + ebp]	lea ecx, [edi + ebp]
call i286_memoryread_w	call i286_memoryread_w
mov I286_DS, ax	mov I286_DS, ax
and eax, 0000ffffh	movzx eax, ax
	test byte ptr (I286_MSW), MSW_PE
	jne short lds_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
mov DS_BASE, eax	lds_base: mov DS_BASE, eax
mov DS_FIX, eax	mov DS_FIX, eax
ret	ret
align 16
src_register:	lds_pe: push offset lds_base
INT_NUM(6)	jmp i286x_selector

	src_register: INT_NUM(6)

}	}
}	}

Line 3478 I286 _enter(void) { // C8: enter	Line 3509 I286 _enter(void) { // C8: enter
je enter0	je enter0
dec eax	dec eax
je enter1	je enter1
lea ecx, [eax*4 + 12]	lea ecx, [eax*4 + 12 + 4]
I286CLOCK(ecx)	I286CLOCK(ecx)
push ebx	push ebx
movzx ebx, I286_BP	movzx ebx, I286_BP
Line 3559 I286 ret_far_data16(void) { // CA:	Line 3590 I286 ret_far_data16(void) { // CA:
call i286_memoryread_w	call i286_memoryread_w
mov I286_CS, ax	mov I286_CS, ax
movzx eax, ax	movzx eax, ax
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short ret_far16_pe	jne short ret_far16_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
ret_far16_base: mov CS_BASE, eax	ret_far16_base: mov CS_BASE, eax
Line 3587 I286 ret_far(void) { // CB: ret fa	Line 3618 I286 ret_far(void) { // CB: ret fa
call i286_memoryread_w	call i286_memoryread_w
mov I286_CS, ax	mov I286_CS, ax
movzx eax, ax	movzx eax, ax
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short ret_far_pe	jne short ret_far_pe
shl eax, 4 // make segreg	shl eax, 4 // make segreg
ret_far_base: mov CS_BASE, eax	ret_far_base: mov CS_BASE, eax
Line 3626 I286 int_data8(void) { // CD: int	Line 3657 I286 int_data8(void) { // CD: int
lea ecx, [edi + ebp]	lea ecx, [edi + ebp]
mov dx, I286_CS	mov dx, I286_CS
call i286_memorywrite_w	call i286_memorywrite_w
	#if defined(ENABLE_TRAP)
	movzx eax, bh
	push eax
	lea edx, [esi - 1]
	movzx ecx, I286_CS
	call softinttrap
	#endif
movzx eax, bh	movzx eax, bh
sub bp, 2	sub bp, 2
mov I286_SP, bp	mov I286_SP, bp
Line 3651 I286 _into(void) { // CE: into	Line 3689 I286 _into(void) { // CE: into
GET_NEXTPRE1	GET_NEXTPRE1
ret	ret

intovf: INT_NUM(4)	intovf: inc si // ver0.80
	INT_NUM(4)
}	}
}	}

Line 4096 I286 jmp_far(void) { // EA: jmp fa	Line 4135 I286 jmp_far(void) { // EA: jmp fa
mov si, bx	mov si, bx
shr ebx, 16	shr ebx, 16
mov I286_CS, bx	mov I286_CS, bx
test I286_MSW, MSW_PE	test byte ptr (I286_MSW), MSW_PE
jne short jmp_far_pe	jne short jmp_far_pe
shl ebx, 4 // make segreg	shl ebx, 4 // make segreg
mov CS_BASE, ebx	mov CS_BASE, ebx
Line 4339 I286 _ope0xff(void) { // FF:	Line 4378 I286 _ope0xff(void) { // FF:

// -------------------------------------------------------------------------	// -------------------------------------------------------------------------

void (*i286op[])(void) = {	const I286TBL i286op[256] = {
add_ea_r8, // 00: add EA, REG8	add_ea_r8, // 00: add EA, REG8
add_ea_r16, // 01: add EA, REG16	add_ea_r16, // 01: add EA, REG16
add_r8_ea, // 02: add REG8, EA	add_r8_ea, // 02: add REG8, EA
Line 4663 I286 repe_segprefix_ds(void) {	Line 4702 I286 repe_segprefix_ds(void) {
}	}
}	}

void (*i286op_repe[])(void) = {	const I286TBL i286op_repe[256] = {
add_ea_r8, // 00: add EA, REG8	add_ea_r8, // 00: add EA, REG8
add_ea_r16, // 01: add EA, REG16	add_ea_r16, // 01: add EA, REG16
add_r8_ea, // 02: add REG8, EA	add_r8_ea, // 02: add REG8, EA
Line 4987 I286 repne_segprefix_ds(void) {	Line 5026 I286 repne_segprefix_ds(void) {
}	}
}	}

void (*i286op_repne[])(void) = {	const I286TBL i286op_repne[256] = {
add_ea_r8, // 00: add EA, REG8	add_ea_r8, // 00: add EA, REG8
add_ea_r16, // 01: add EA, REG16	add_ea_r16, // 01: add EA, REG16
add_r8_ea, // 02: add REG8, EA	add_r8_ea, // 02: add REG8, EA

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