np2/i286x/v30patch.cpp - diff

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Diff for /np2/i286x/v30patch.cpp between versions 1.11 and 1.12

version 1.11, 2005/03/03 06:59:41	version 1.12, 2005/03/26 07:53:48
Line 28 static I286TBL v30ope0xf6_xtable[8];	Line 28 static I286TBL v30ope0xf6_xtable[8];
static I286TBL v30ope0xf7_xtable[8];	static I286TBL v30ope0xf7_xtable[8];


static const UINT8 shiftbase16[256] =	static const UINT8 rotatebase16[256] =
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,	{0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,	16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,	16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
Line 46 static const UINT8 shiftbase16[256] =	Line 46 static const UINT8 shiftbase16[256] =
16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,	16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15};	16, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15};

static const UINT8 shiftbase09[256] =	static const UINT8 rotatebase09[256] =
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3, 4, 5, 6,	{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3, 4, 5, 6,
7, 8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3, 4,	7, 8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3, 4,
5, 6, 7, 8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2,	5, 6, 7, 8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2,
Line 64 static const UINT8 shiftbase09[256] =	Line 64 static const UINT8 shiftbase09[256] =
8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3, 4, 5,	8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3, 4, 5,
6, 7, 8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3};	6, 7, 8, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 1, 2, 3};

static const UINT8 shiftbase17[256] =	static const UINT8 rotatebase17[256] =
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,	{0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
16,17, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,	16,17, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,
15,16,17, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,	15,16,17, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,
Line 82 static const UINT8 shiftbase17[256] =	Line 82 static const UINT8 shiftbase17[256] =
3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,16,17, 1,	3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,16,17, 1,
2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,16,17};	2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,16,17};

	static const UINT8 shiftbase[256] =
	{0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
	16,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
	17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17};



I286 v30_reserved(void) {	I286 v30_reserved(void) {
Line 260 I286 v30_popf(void) { // 9D: popf	Line 278 I286 v30_popf(void) { // 9D: popf
I286 rol_r8_v30(void) {	I286 rol_r8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
rol byte ptr [edx], cl	rol byte ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
ret	ret
Line 270 I286 rol_r8_v30(void) {	Line 288 I286 rol_r8_v30(void) {
I286 ror_r8_v30(void) {	I286 ror_r8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
ror byte ptr [edx], cl	ror byte ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
ret	ret
Line 280 I286 ror_r8_v30(void) {	Line 298 I286 ror_r8_v30(void) {
I286 rcl_r8_v30(void) {	I286 rcl_r8_v30(void) {

__asm {	__asm {
mov cl, shiftbase09[ecx]	mov cl, rotatebase09[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcl byte ptr [edx], cl	rcl byte ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 291 I286 rcl_r8_v30(void) {	Line 309 I286 rcl_r8_v30(void) {
I286 rcr_r8_v30(void) {	I286 rcr_r8_v30(void) {

__asm {	__asm {
mov cl, shiftbase09[ecx]	mov cl, rotatebase09[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcr byte ptr [edx], cl	rcr byte ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 302 I286 rcr_r8_v30(void) {	Line 320 I286 rcr_r8_v30(void) {
I286 shl_r8_v30(void) {	I286 shl_r8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shl byte ptr [edx], cl	shl byte ptr [edx], cl
FLAG_STORE_OF	FLAG_STORE_OF
ret	ret
Line 312 I286 shl_r8_v30(void) {	Line 330 I286 shl_r8_v30(void) {
I286 shr_r8_v30(void) {	I286 shr_r8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shr byte ptr [edx], cl	shr byte ptr [edx], cl
FLAG_STORE_OF	FLAG_STORE_OF
ret	ret
Line 322 I286 shr_r8_v30(void) {	Line 340 I286 shr_r8_v30(void) {
I286 sar_r8_v30(void) {	I286 sar_r8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
sar byte ptr [edx], cl	sar byte ptr [edx], cl
FLAG_STORE0	FLAG_STORE0
ret	ret
Line 336 static void (*sftreg8v30_table[])(void)	Line 354 static void (*sftreg8v30_table[])(void)
I286 rol_ext8_v30(void) {	I286 rol_ext8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
rol dl, cl	rol dl, cl
FLAG_STORE_OC	FLAG_STORE_OC
mov ecx, ebp	mov ecx, ebp
Line 347 I286 rol_ext8_v30(void) {	Line 365 I286 rol_ext8_v30(void) {
I286 ror_ext8_v30(void) {	I286 ror_ext8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
ror dl, cl	ror dl, cl
FLAG_STORE_OC	FLAG_STORE_OC
mov ecx, ebp	mov ecx, ebp
Line 358 I286 ror_ext8_v30(void) {	Line 376 I286 ror_ext8_v30(void) {
I286 rcl_ext8_v30(void) {	I286 rcl_ext8_v30(void) {

__asm {	__asm {
mov cl, shiftbase09[ecx]	mov cl, rotatebase09[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcl dl, cl	rcl dl, cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 370 I286 rcl_ext8_v30(void) {	Line 388 I286 rcl_ext8_v30(void) {
I286 rcr_ext8_v30(void) {	I286 rcr_ext8_v30(void) {

__asm {	__asm {
mov cl, shiftbase09[ecx]	mov cl, rotatebase09[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcr dl, cl	rcr dl, cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 382 I286 rcr_ext8_v30(void) {	Line 400 I286 rcr_ext8_v30(void) {
I286 shl_ext8_v30(void) {	I286 shl_ext8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shl dl, cl	shl dl, cl
FLAG_STORE_OF	FLAG_STORE_OF
mov ecx, ebp	mov ecx, ebp
Line 393 I286 shl_ext8_v30(void) {	Line 411 I286 shl_ext8_v30(void) {
I286 shr_ext8_v30(void) {	I286 shr_ext8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shr dl, cl	shr dl, cl
FLAG_STORE_OF	FLAG_STORE_OF
mov ecx, ebp	mov ecx, ebp
Line 404 I286 shr_ext8_v30(void) {	Line 422 I286 shr_ext8_v30(void) {
I286 sar_ext8_v30(void) {	I286 sar_ext8_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
sar dl, cl	sar dl, cl
FLAG_STORE0	FLAG_STORE0
mov ecx, ebp	mov ecx, ebp
Line 468 I286 v30shift_ea8_data8(void) { // C	Line 486 I286 v30shift_ea8_data8(void) { // C
I286 rol_r16_v30(void) {	I286 rol_r16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
rol word ptr [edx], cl	rol word ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
ret	ret
Line 478 I286 rol_r16_v30(void) {	Line 496 I286 rol_r16_v30(void) {
I286 ror_r16_v30(void) {	I286 ror_r16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
ror word ptr [edx], cl	ror word ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
ret	ret
Line 488 I286 ror_r16_v30(void) {	Line 506 I286 ror_r16_v30(void) {
I286 rcl_r16_v30(void) {	I286 rcl_r16_v30(void) {

__asm {	__asm {
mov cl, shiftbase17[ecx]	mov cl, rotatebase17[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcl word ptr [edx], cl	rcl word ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 499 I286 rcl_r16_v30(void) {	Line 517 I286 rcl_r16_v30(void) {
I286 rcr_r16_v30(void) {	I286 rcr_r16_v30(void) {

__asm {	__asm {
mov cl, shiftbase17[ecx]	mov cl, rotatebase17[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcr word ptr [edx], cl	rcr word ptr [edx], cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 510 I286 rcr_r16_v30(void) {	Line 528 I286 rcr_r16_v30(void) {
I286 shl_r16_v30(void) {	I286 shl_r16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shl word ptr [edx], cl	shl word ptr [edx], cl
FLAG_STORE_OF	FLAG_STORE_OF
ret	ret
Line 520 I286 shl_r16_v30(void) {	Line 538 I286 shl_r16_v30(void) {
I286 shr_r16_v30(void) {	I286 shr_r16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shr word ptr [edx], cl	shr word ptr [edx], cl
FLAG_STORE_OF	FLAG_STORE_OF
ret	ret
Line 530 I286 shr_r16_v30(void) {	Line 548 I286 shr_r16_v30(void) {
I286 sar_r16_v30(void) {	I286 sar_r16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
sar word ptr [edx], cl	sar word ptr [edx], cl
FLAG_STORE0	FLAG_STORE0
ret	ret
Line 544 static void (*sftreg16v30_table[])(void)	Line 562 static void (*sftreg16v30_table[])(void)
I286 rol_ext16_v30(void) {	I286 rol_ext16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
rol dx, cl	rol dx, cl
FLAG_STORE_OC	FLAG_STORE_OC
mov ecx, ebp	mov ecx, ebp
Line 555 I286 rol_ext16_v30(void) {	Line 573 I286 rol_ext16_v30(void) {
I286 ror_ext16_v30(void) {	I286 ror_ext16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, rotatebase16[ecx]
ror dx, cl	ror dx, cl
FLAG_STORE_OC	FLAG_STORE_OC
mov ecx, ebp	mov ecx, ebp
Line 566 I286 ror_ext16_v30(void) {	Line 584 I286 ror_ext16_v30(void) {
I286 rcl_ext16_v30(void) {	I286 rcl_ext16_v30(void) {

__asm {	__asm {
mov cl, shiftbase17[ecx]	mov cl, rotatebase17[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcl dx, cl	rcl dx, cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 578 I286 rcl_ext16_v30(void) {	Line 596 I286 rcl_ext16_v30(void) {
I286 rcr_ext16_v30(void) {	I286 rcr_ext16_v30(void) {

__asm {	__asm {
mov cl, shiftbase17[ecx]	mov cl, rotatebase17[ecx]
CFLAG_LOAD	CFLAG_LOAD
rcr dx, cl	rcr dx, cl
FLAG_STORE_OC	FLAG_STORE_OC
Line 590 I286 rcr_ext16_v30(void) {	Line 608 I286 rcr_ext16_v30(void) {
I286 shl_ext16_v30(void) {	I286 shl_ext16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shl dx, cl	shl dx, cl
FLAG_STORE_OF	FLAG_STORE_OF
mov ecx, ebp	mov ecx, ebp
Line 601 I286 shl_ext16_v30(void) {	Line 619 I286 shl_ext16_v30(void) {
I286 shr_ext16_v30(void) {	I286 shr_ext16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
shr dx, cl	shr dx, cl
FLAG_STORE_OF	FLAG_STORE_OF
mov ecx, ebp	mov ecx, ebp
Line 612 I286 shr_ext16_v30(void) {	Line 630 I286 shr_ext16_v30(void) {
I286 sar_ext16_v30(void) {	I286 sar_ext16_v30(void) {

__asm {	__asm {
mov cl, shiftbase16[ecx]	mov cl, shiftbase[ecx]
sar dx, cl	sar dx, cl
FLAG_STORE0	FLAG_STORE0
mov ecx, ebp	mov ecx, ebp

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