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Diff for /np2/i386c/ia32/cpu.c between versions 1.20 and 1.26

version 1.20, 2004/08/14 03:09:43 version 1.26, 2011/01/15 17:17:23
Line 1 Line 1
 /*      $Id$    */  
   
 /*  /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro   * Copyright (c) 2002-2003 NONAKA Kimihiro
  * All rights reserved.   * All rights reserved.
Line 12 Line 10
  * 2. Redistributions in binary form must reproduce the above copyright   * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the   *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.   *    documentation and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products  
  *    derived from this software without specific prior written permission.  
  *   *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR   * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES   * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
Line 34 Line 30
   
 #include "inst_table.h"  #include "inst_table.h"
   
   #if defined(ENABLE_TRAP)
   #include "steptrap.h"
   #endif
   
   
 sigjmp_buf exec_1step_jmpbuf;  sigjmp_buf exec_1step_jmpbuf;
   
Line 55  int cpu_inst_trace = 0; Line 55  int cpu_inst_trace = 0;
 #endif  #endif
   
   
 // #define      IPTRACE                 (1 << 14)  
   
 #if defined(TRACE) && IPTRACE  
 static  UINT    trpos = 0;  
 static  UINT32  trcs[IPTRACE];  
 static  UINT32  treip[IPTRACE];  
   
 void iptrace_out(void) {  
   
         FILEH   fh;  
         UINT    s;  
         UINT32  cs;  
         UINT32  eip;  
         char    buf[32];  
   
         s = trpos;  
         if (s > IPTRACE) {  
                 s -= IPTRACE;  
         }  
         else {  
                 s = 0;  
         }  
         fh = file_create_c("his.txt");  
         while(s < trpos) {  
                 cs = trcs[s & (IPTRACE - 1)];  
                 eip = treip[s & (IPTRACE - 1)];  
                 s++;  
                 SPRINTF(buf, "%.4x:%.8x\r\n", cs, eip);  
                 file_write(fh, buf, strlen(buf));  
         }  
         file_close(fh);  
 }  
 #endif  
   
   
 void  void
 exec_1step(void)  exec_1step(void)
 {  {
Line 99  exec_1step(void) Line 64  exec_1step(void)
         CPU_PREV_EIP = CPU_EIP;          CPU_PREV_EIP = CPU_EIP;
         CPU_STATSAVE.cpu_inst = CPU_STATSAVE.cpu_inst_default;          CPU_STATSAVE.cpu_inst = CPU_STATSAVE.cpu_inst_default;
   
 #if defined(TRACE) && IPTRACE  #if defined(ENABLE_TRAP)
         trcs[trpos & (IPTRACE - 1)] = CPU_CS;          steptrap(CPU_CS, CPU_EIP);
         treip[trpos & (IPTRACE - 1)] = CPU_EIP;  
         trpos++;  
 #endif  #endif
   
 #if defined(IA32_INSTRUCTION_TRACE)  #if defined(IA32_INSTRUCTION_TRACE)
Line 291  check_break_point: Line 254  check_break_point:
                 if (CPU_TRAP) {                  if (CPU_TRAP) {
                         CPU_DR6 |= CPU_DR6_BS;                          CPU_DR6 |= CPU_DR6_BS;
                 }                  }
                 INTERRUPT(DB_EXCEPTION, TRUE, FALSE, 0);                  INTERRUPT(DB_EXCEPTION, INTR_TYPE_EXCEPTION);
         }          }
         if (CPU_EFLAG & RF_FLAG) {          if (CPU_EFLAG & RF_FLAG) {
                 if (CPU_STAT_BP_EVENT & CPU_STAT_BP_EVENT_RF) {                  if (CPU_STAT_BP_EVENT & CPU_STAT_BP_EVENT_RF) {
Removed from v.1.20  
changed lines
  Added in v.1.26

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