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| version 1.11, 2004/01/27 15:51:35 | version 1.13, 2004/02/04 13:24:35 |
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| Line 121 typedef struct { | Line 121 typedef struct { |
| WORD sreg[CPU_SEGREG_NUM]; | WORD sreg[CPU_SEGREG_NUM]; |
| REG32 eflags; | REG32 eflags; |
| REG32 eip; | REG32 eip; |
| REG32 prev_eip; | REG32 prev_eip; |
| REG32 prev_esp; | |
| DWORD tr[CPU_TEST_REG_NUM]; | DWORD tr[CPU_TEST_REG_NUM]; |
| DWORD dr[CPU_DEBUG_REG_NUM]; | DWORD dr[CPU_DEBUG_REG_NUM]; |
| Line 137 typedef struct { | Line 138 typedef struct { |
| WORD ldtr; | WORD ldtr; |
| WORD tr; | WORD tr; |
| descriptor_t ldtr_desc; | |
| descriptor_t tr_desc; | |
| DWORD cr0; | DWORD cr0; |
| DWORD cr1; | DWORD cr1; |
| Line 150 typedef struct { | Line 149 typedef struct { |
| typedef struct { | typedef struct { |
| descriptor_t sreg[CPU_SEGREG_NUM]; | descriptor_t sreg[CPU_SEGREG_NUM]; |
| descriptor_t ldtr_desc; | |
| descriptor_t tr_desc; | |
| UINT32 adrsmask; | UINT32 adrsmask; |
| DWORD ovflag; | DWORD ovflag; |
| Line 164 typedef struct { | Line 165 typedef struct { |
| BYTE paging; | BYTE paging; |
| BYTE vm86; | BYTE vm86; |
| DWORD pde_base; | |
| DWORD ioaddr; /* I/O bitmap linear address */ | DWORD ioaddr; /* I/O bitmap linear address */ |
| WORD iolimit; /* I/O bitmap count */ | WORD iolimit; /* I/O bitmap count */ |
| Line 240 extern sigjmp_buf exec_1step_jmpbuf; | Line 243 extern sigjmp_buf exec_1step_jmpbuf; |
| /* version */ | /* version */ |
| #define CPU_FAMILY 4 | #define CPU_FAMILY 4 |
| #define CPU_MODEL 2 | #if defined(USE_FPU) |
| #define CPU_MODEL 1 /* 486DX */ | |
| #else | |
| #define CPU_MODEL 2 /* 486SX */ | |
| #endif | |
| #define CPU_STEPPING 3 | #define CPU_STEPPING 3 |
| /* feature */ | /* feature */ |
| Line 337 do { \ | Line 344 do { \ |
| #define CPU_EDI CPU_REGS_DWORD(CPU_EDI_INDEX) | #define CPU_EDI CPU_REGS_DWORD(CPU_EDI_INDEX) |
| #define CPU_EIP CPU_STATSAVE.cpu_regs.eip.d | #define CPU_EIP CPU_STATSAVE.cpu_regs.eip.d |
| #define CPU_PREV_EIP CPU_STATSAVE.cpu_regs.prev_eip.d | #define CPU_PREV_EIP CPU_STATSAVE.cpu_regs.prev_eip.d |
| #define CPU_PREV_ESP CPU_STATSAVE.cpu_regs.prev_esp.d | |
| #define CPU_ES CPU_REGS_SREG(CPU_ES_INDEX) | #define CPU_ES CPU_REGS_SREG(CPU_ES_INDEX) |
| #define CPU_CS CPU_REGS_SREG(CPU_CS_INDEX) | #define CPU_CS CPU_REGS_SREG(CPU_CS_INDEX) |
| Line 357 do { \ | Line 365 do { \ |
| #define CPU_FLAGL CPU_STATSAVE.cpu_regs.eflags.b.l | #define CPU_FLAGL CPU_STATSAVE.cpu_regs.eflags.b.l |
| #define CPU_FLAGH CPU_STATSAVE.cpu_regs.eflags.b.h | #define CPU_FLAGH CPU_STATSAVE.cpu_regs.eflags.b.h |
| #define CPU_TRAP CPU_STATSAVE.cpu_stat.trap | #define CPU_TRAP CPU_STATSAVE.cpu_stat.trap |
| // #define CPU_INPORT CPU_STATSAVE.cpu_stat.inport | #if 0 |
| #define CPU_INPORT CPU_STATSAVE.cpu_stat.inport | |
| #endif | |
| #define CPU_OV CPU_STATSAVE.cpu_stat.ovflag | #define CPU_OV CPU_STATSAVE.cpu_stat.ovflag |
| #define C_FLAG (1 << 0) | #define C_FLAG (1 << 0) |
| Line 410 void set_eflags(DWORD new_flags, DWORD m | Line 420 void set_eflags(DWORD new_flags, DWORD m |
| #define CPU_STAT_VM86 CPU_STATSAVE.cpu_stat.vm86 | #define CPU_STAT_VM86 CPU_STATSAVE.cpu_stat.vm86 |
| #define CPU_STAT_PAGING CPU_STATSAVE.cpu_stat.paging | #define CPU_STAT_PAGING CPU_STATSAVE.cpu_stat.paging |
| #define CPU_STAT_CPL CPU_STATSAVE.cpu_stat.cpl | #define CPU_STAT_CPL CPU_STATSAVE.cpu_stat.cpl |
| #define CPU_STAT_PDE_BASE CPU_STATSAVE.cpu_stat.pde_base | |
| #define CPU_STAT_IOPL ((CPU_EFLAG & IOPL_FLAG) >> 12) | #define CPU_STAT_IOPL ((CPU_EFLAG & IOPL_FLAG) >> 12) |
| #define CPU_IOPL0 0 | #define CPU_IOPL0 0 |
| Line 423 void set_eflags(DWORD new_flags, DWORD m | Line 434 void set_eflags(DWORD new_flags, DWORD m |
| #define CPU_STAT_NERROR CPU_STATSAVE.cpu_stat.nerror | #define CPU_STAT_NERROR CPU_STATSAVE.cpu_stat.nerror |
| #define CPU_STAT_PREV_EXCEPTION CPU_STATSAVE.cpu_stat.prev_exception | #define CPU_STAT_PREV_EXCEPTION CPU_STATSAVE.cpu_stat.prev_exception |
| #define CPU_MODE_SUPERVISER 0 | |
| #define CPU_MODE_USER 1 | |
| #define CPU_IS_USER_MODE() ((CPU_STAT_CPL == 3) ? CPU_MODE_USER : CPU_MODE_SUPERVISER) | |
| #define CPU_CLI do { CPU_FLAG &= ~I_FLAG; \ | #define CPU_CLI do { CPU_FLAG &= ~I_FLAG; \ |
| CPU_TRAP = 0; } while (/*CONSTCOND*/ 0) | CPU_TRAP = 0; } while (/*CONSTCOND*/ 0) |
| #define CPU_STI do { CPU_FLAG |= I_FLAG; \ | #define CPU_STI do { CPU_FLAG |= I_FLAG; \ |
| Line 433 void set_eflags(DWORD new_flags, DWORD m | Line 448 void set_eflags(DWORD new_flags, DWORD m |
| #define CPU_IDTR_LIMIT CPU_STATSAVE.cpu_sysregs.idtr_limit | #define CPU_IDTR_LIMIT CPU_STATSAVE.cpu_sysregs.idtr_limit |
| #define CPU_IDTR_BASE CPU_STATSAVE.cpu_sysregs.idtr_base | #define CPU_IDTR_BASE CPU_STATSAVE.cpu_sysregs.idtr_base |
| #define CPU_LDTR CPU_STATSAVE.cpu_sysregs.ldtr | #define CPU_LDTR CPU_STATSAVE.cpu_sysregs.ldtr |
| #define CPU_LDTR_DESC CPU_STATSAVE.cpu_sysregs.ldtr_desc | #define CPU_LDTR_DESC CPU_STATSAVE.cpu_stat.ldtr_desc |
| #define CPU_LDTR_BASE CPU_STATSAVE.cpu_sysregs.ldtr_desc.u.seg.segbase | #define CPU_LDTR_BASE CPU_STATSAVE.cpu_stat.ldtr_desc.u.seg.segbase |
| #define CPU_LDTR_END CPU_STATSAVE.cpu_sysregs.ldtr_desc.u.seg.segend | #define CPU_LDTR_END CPU_STATSAVE.cpu_stat.ldtr_desc.u.seg.segend |
| #define CPU_LDTR_LIMIT CPU_STATSAVE.cpu_sysregs.ldtr_desc.u.seg.limit | #define CPU_LDTR_LIMIT CPU_STATSAVE.cpu_stat.ldtr_desc.u.seg.limit |
| #define CPU_TR CPU_STATSAVE.cpu_sysregs.tr | #define CPU_TR CPU_STATSAVE.cpu_sysregs.tr |
| #define CPU_TR_DESC CPU_STATSAVE.cpu_sysregs.tr_desc | #define CPU_TR_DESC CPU_STATSAVE.cpu_stat.tr_desc |
| #define CPU_TR_BASE CPU_STATSAVE.cpu_sysregs.tr_desc.u.seg.segbase | #define CPU_TR_BASE CPU_STATSAVE.cpu_stat.tr_desc.u.seg.segbase |
| #define CPU_TR_END CPU_STATSAVE.cpu_sysregs.tr_desc.u.seg.segend | #define CPU_TR_END CPU_STATSAVE.cpu_stat.tr_desc.u.seg.segend |
| #define CPU_TR_LIMIT CPU_STATSAVE.cpu_sysregs.tr_desc.u.seg.limit | #define CPU_TR_LIMIT CPU_STATSAVE.cpu_stat.tr_desc.u.seg.limit |
| /* | /* |
| * control register | * control register |
| Line 502 void exec_1step(void); | Line 517 void exec_1step(void); |
| #define INST_STRING (1 << 1) | #define INST_STRING (1 << 1) |
| #define REP_CHECKZF (1 << 7) | #define REP_CHECKZF (1 << 7) |
| void disasm(WORD cs, DWORD maddr); | |
| void ia32_printf(const char *buf, ...); | void ia32_printf(const char *buf, ...); |
| void ia32_warning(const char *buf, ...); | void ia32_warning(const char *buf, ...); |
| void ia32_panic(const char *buf, ...); | void ia32_panic(const char *buf, ...); |
| Line 512 void ia32_bioscall(void); | Line 525 void ia32_bioscall(void); |
| void FASTCALL change_pm(BOOL onoff); | void FASTCALL change_pm(BOOL onoff); |
| void FASTCALL change_vm(BOOL onoff); | void FASTCALL change_vm(BOOL onoff); |
| void FASTCALL change_pg(BOOL onoff); | |
| extern BYTE szpcflag[0x200]; | extern BYTE szpcflag[0x200]; |
| extern BYTE szpflag_w[0x10000]; | extern BYTE szpflag_w[0x10000]; |
| Line 527 extern const char *reg8_str[8]; | Line 541 extern const char *reg8_str[8]; |
| extern const char *reg16_str[8]; | extern const char *reg16_str[8]; |
| extern const char *reg32_str[8]; | extern const char *reg32_str[8]; |
| char *cpu_reg2str(void); | |
| #if defined(USE_FPU) | |
| char *fpu_reg2str(void); | |
| #endif | |
| void dbg_printf(const char *str, ...); | |
| /* | /* |
| * Misc. | * Misc. |
| */ | */ |