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Diff for /np2/i386c/ia32/cpu.h between versions 1.23 and 1.27

version 1.23, 2004/03/08 14:48:20 version 1.27, 2004/03/24 14:34:23
Line 406  do { \ Line 406  do { \
 #define ALL_FLAG        (SZAPC_FLAG|T_FLAG|I_FLAG|D_FLAG|O_FLAG|IOPL_FLAG|NT_FLAG)  #define ALL_FLAG        (SZAPC_FLAG|T_FLAG|I_FLAG|D_FLAG|O_FLAG|IOPL_FLAG|NT_FLAG)
 #define ALL_EFLAG       (ALL_FLAG|RF_FLAG|VM_FLAG|AC_FLAG|VIF_FLAG|VIP_FLAG|ID_FLAG)  #define ALL_EFLAG       (ALL_FLAG|RF_FLAG|VM_FLAG|AC_FLAG|VIF_FLAG|VIP_FLAG|ID_FLAG)
   
 #define REAL_FLAGREG    ((CPU_FLAG & 0xf7ff) | (CPU_OV ? O_FLAG : 0))  #define REAL_FLAGREG    ((CPU_FLAG & 0xf7ff) | (CPU_OV ? O_FLAG : 0) | 2)
 #define REAL_EFLAGREG   ((CPU_EFLAG & 0xfffff7ff) | (CPU_OV ? O_FLAG : 0))  #define REAL_EFLAGREG   ((CPU_EFLAG & 0xfffff7ff) | (CPU_OV ? O_FLAG : 0) | 2)
   
   #if !defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION)
 void set_flags(UINT16 new_flags, UINT16 mask);  void set_flags(UINT16 new_flags, UINT16 mask);
 void set_eflags(UINT32 new_flags, UINT32 mask);  void set_eflags(UINT32 new_flags, UINT32 mask);
   #endif
   
   
 #define CPU_INST_OP32           CPU_STATSAVE.cpu_inst.op_32  #define CPU_INST_OP32           CPU_STATSAVE.cpu_inst.op_32
Line 462  void set_eflags(UINT32 new_flags, UINT32 Line 464  void set_eflags(UINT32 new_flags, UINT32
 #endif  /* IA32_SUPPORT_PREFETCH_QUEUE */  #endif  /* IA32_SUPPORT_PREFETCH_QUEUE */
   
 #define CPU_MODE_SUPERVISER     0  #define CPU_MODE_SUPERVISER     0
 #define CPU_MODE_USER           1  #define CPU_MODE_USER           (1 << 3)
 #define CPU_SET_CPL(cpl) \  #define CPU_SET_CPL(cpl) \
 do { \  do { \
         UINT8 __t = (UINT8)((cpl) & 3); \          UINT8 __t = (UINT8)((cpl) & 3); \
Line 479  do { \ Line 481  do { \
 #define CPU_STI \  #define CPU_STI \
 do { \  do { \
         CPU_FLAG |= I_FLAG; \          CPU_FLAG |= I_FLAG; \
         CPU_TRAP = (CPU_FLAG >> 8) & 1; \          CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG) ; \
 } while (/*CONSTCOND*/0)  } while (/*CONSTCOND*/0)
   
 #define CPU_GDTR_LIMIT  CPU_STATSAVE.cpu_sysregs.gdtr_limit  #define CPU_GDTR_LIMIT  CPU_STATSAVE.cpu_sysregs.gdtr_limit
Line 520  do { \ Line 522  do { \
 #define CPU_CR0_NW              (1 << 29)  #define CPU_CR0_NW              (1 << 29)
 #define CPU_CR0_CD              (1 << 30)  #define CPU_CR0_CD              (1 << 30)
 #define CPU_CR0_PG              (1 << 31)  #define CPU_CR0_PG              (1 << 31)
   #define CPU_CR0_ALL             (CPU_CR0_PE|CPU_CR0_MP|CPU_CR0_EM|CPU_CR0_TS|CPU_CR0_ET|CPU_CR0_NE|CPU_CR0_WP|CPU_CR0_AM|CPU_CR0_NW|CPU_CR0_CD|CPU_CR0_PG)
   
 #define CPU_CR3_PD_MASK         0xfffff000  #define CPU_CR3_PD_MASK         0xfffff000
 #define CPU_CR3_PWT             (1 << 3)  #define CPU_CR3_PWT             (1 << 3)
Line 582  void ia32reset(void); Line 585  void ia32reset(void);
 void ia32shut(void);  void ia32shut(void);
 void ia32(void);  void ia32(void);
 void ia32_step(void);  void ia32_step(void);
 void CPUCALL ia32_interrupt(int vect);  void CPUCALL ia32_interrupt(int vect, int soft);
 void CPUCALL ia32_exception(int vect, int p1, int p2);  void CPUCALL ia32_exception(int vect, int p1, int p2);
   
 void exec_1step(void);  void exec_1step(void);
Removed from v.1.23  
changed lines
  Added in v.1.27

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