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| version 1.30, 2004/06/15 13:50:13 | version 1.35, 2008/01/25 17:49:46 |
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| Line 12 | Line 12 |
| * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. | * documentation and/or other materials provided with the distribution. |
| * 3. The name of the author may not be used to endorse or promote products | |
| * derived from this software without specific prior written permission. | |
| * | * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| Line 71 typedef union { | Line 69 typedef union { |
| UINT32 d; | UINT32 d; |
| } REG32; | } REG32; |
| typedef struct { | |
| UINT8 b[10]; | |
| } REG80; | |
| #ifdef __cplusplus | #ifdef __cplusplus |
| } | } |
| #endif | #endif |
| Line 133 typedef struct { | Line 135 typedef struct { |
| typedef struct { | typedef struct { |
| UINT16 gdtr_limit; | UINT16 gdtr_limit; |
| UINT16 pad0; | |
| UINT32 gdtr_base; | UINT32 gdtr_base; |
| UINT16 idtr_limit; | UINT16 idtr_limit; |
| UINT16 pad1; | |
| UINT32 idtr_base; | UINT32 idtr_base; |
| UINT16 ldtr; | UINT16 ldtr; |
| Line 189 typedef struct { | Line 193 typedef struct { |
| UINT32 seg_base; | UINT32 seg_base; |
| } CPU_INST; | } CPU_INST; |
| /* FPU */ | |
| enum { | |
| FPU_REG_NUM = 8 | |
| }; | |
| typedef struct { | |
| UINT16 seg; | |
| UINT16 pad; | |
| UINT32 offset; | |
| } FPU_PTR; | |
| typedef struct { | |
| UINT16 control; | |
| UINT16 status; | |
| UINT16 op; | |
| FPU_PTR inst; | |
| FPU_PTR data; | |
| } FPU_REGS; | |
| typedef struct { | |
| UINT8 valid; /* レジスタ有効 */ | |
| UINT8 sign; /* 符号 */ | |
| UINT8 zero; /* ゼロ */ | |
| UINT8 inf; /* ∞ */ | |
| UINT8 nan; /* NaN */ | |
| UINT8 denorm; /* 非正規化 */ | |
| SINT16 exp; /* 指数部 */ | |
| UINT64 num; /* 小数部 */ | |
| } FP_REG; | |
| typedef struct { | |
| UINT8 top; /* スタック位置 */ | |
| UINT8 pc; /* 精度 */ | |
| UINT8 rc; /* 丸め */ | |
| UINT8 dmy[1]; | |
| FP_REG reg[FPU_REG_NUM]; | |
| } FPU_STAT; | |
| typedef struct { | typedef struct { |
| CPU_REGS cpu_regs; | CPU_REGS cpu_regs; |
| CPU_SYSREGS cpu_sysregs; | CPU_SYSREGS cpu_sysregs; |
| Line 196 typedef struct { | Line 240 typedef struct { |
| CPU_INST cpu_inst; | CPU_INST cpu_inst; |
| CPU_INST cpu_inst_default; | CPU_INST cpu_inst_default; |
| #if defined(USE_FPU) | |
| FPU_REGS fpu_regs; | |
| FPU_STAT fpu_stat; | |
| #endif | |
| /* protected by cpu shut */ | /* protected by cpu shut */ |
| UINT8 cpu_type; | UINT8 cpu_type; |
| UINT8 itfbank; | UINT8 itfbank; |
| Line 206 typedef struct { | Line 255 typedef struct { |
| } I386STAT; | } I386STAT; |
| typedef struct { | typedef struct { |
| BYTE *ext; | UINT8 *ext; |
| UINT32 extsize; | UINT32 extsize; |
| UINT8 *extbase; /* = ext - 0x100000 */ | |
| UINT32 extlimit16mb; /* = extsize + 0x100000 (MAX:16MB) */ | |
| UINT32 extlimit4gb; /* = extsize + 0x100000 */ | |
| UINT32 inport; | UINT32 inport; |
| BYTE *ems[4]; | UINT8 *ems[4]; |
| } I386EXT; | } I386EXT; |
| typedef struct { | typedef struct { |
| Line 235 extern I386CORE i386core; | Line 287 extern I386CORE i386core; |
| #define CPU_EXTMEM i386core.e.ext | #define CPU_EXTMEM i386core.e.ext |
| #define CPU_EXTMEMSIZE i386core.e.extsize | #define CPU_EXTMEMSIZE i386core.e.extsize |
| #define CPU_EXTMEMBASE i386core.e.extbase | |
| #define CPU_EXTLIMIT16 i386core.e.extlimit16mb | |
| #define CPU_EXTLIMIT i386core.e.extlimit4gb | |
| #define CPU_INPADRS i386core.e.inport | #define CPU_INPADRS i386core.e.inport |
| #define CPU_EMSPTR i386core.e.ems | #define CPU_EMSPTR i386core.e.ems |
| Line 291 extern sigjmp_buf exec_1step_jmpbuf; | Line 346 extern sigjmp_buf exec_1step_jmpbuf; |
| /* (1 << 29) */ | /* (1 << 29) */ |
| /* (1 << 30) */ | /* (1 << 30) */ |
| /* (1 << 31) */ | /* (1 << 31) */ |
| #ifdef USE_FPU | #if defined(USE_FPU) |
| #define CPU_FEATURES (CPU_FEATURE_CMOV|CPU_FEATURE_FPU) | #define CPU_FEATURES (CPU_FEATURE_CMOV|CPU_FEATURE_FPU) |
| #else | #else |
| #define CPU_FEATURES (CPU_FEATURE_CMOV) | #define CPU_FEATURES (CPU_FEATURE_CMOV) |
| Line 403 do { \ | Line 458 do { \ |
| #define REAL_FLAGREG ((CPU_FLAG & 0xf7ff) | (CPU_OV ? O_FLAG : 0) | 2) | #define REAL_FLAGREG ((CPU_FLAG & 0xf7ff) | (CPU_OV ? O_FLAG : 0) | 2) |
| #define REAL_EFLAGREG ((CPU_EFLAG & 0xfffff7ff) | (CPU_OV ? O_FLAG : 0) | 2) | #define REAL_EFLAGREG ((CPU_EFLAG & 0xfffff7ff) | (CPU_OV ? O_FLAG : 0) | 2) |
| #if !defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) | |
| void set_flags(UINT16 new_flags, UINT16 mask); | void set_flags(UINT16 new_flags, UINT16 mask); |
| void set_eflags(UINT32 new_flags, UINT32 mask); | void set_eflags(UINT32 new_flags, UINT32 mask); |
| #endif | |
| #define CPU_INST_OP32 CPU_STATSAVE.cpu_inst.op_32 | #define CPU_INST_OP32 CPU_STATSAVE.cpu_inst.op_32 |
| Line 618 void dbg_printf(const char *str, ...); | Line 671 void dbg_printf(const char *str, ...); |
| /* | /* |
| * FPU | |
| */ | |
| #define FPU_REGS CPU_STATSAVE.fpu_regs | |
| #define FPU_CTRLWORD FPU_REGS.control | |
| #define FPU_STATUSWORD FPU_REGS.status | |
| #define FPU_INSTPTR FPU_REGS.inst | |
| #define FPU_DATAPTR FPU_REGS.data | |
| #define FPU_LASTINSTOP FPU_REGS.op | |
| #define FPU_INSTPTR_OFFSET FPU_REGS.inst.offset | |
| #define FPU_INSTPTR_SEG FPU_REGS.inst.seg | |
| #define FPU_DATAPTR_OFFSET FPU_REGS.data.offset | |
| #define FPU_DATAPTR_SEG FPU_REGS.data.seg | |
| #define FPU_STAT CPU_STATSAVE.fpu_stat | |
| #define FPU_STAT_TOP FPU_STAT.top | |
| #define FPU_STAT_PC FPU_STAT.pc | |
| #define FPU_STAT_RC FPU_STAT.rc | |
| #define FPU_ST(i) FPU_STAT.reg[((i) + FPU_STAT_TOP) & 7] | |
| #define FPU_REG(i) FPU_STAT.reg[i] | |
| /* FPU status register */ | |
| #define FP_IE_FLAG (1 << 0) /* 無効な動作 */ | |
| #define FP_DE_FLAG (1 << 1) /* デノーマライズド・オペランド */ | |
| #define FP_ZE_FLAG (1 << 2) /* ゼロによる除算 */ | |
| #define FP_OE_FLAG (1 << 3) /* オーバーフロー */ | |
| #define FP_UE_FLAG (1 << 4) /* アンダーフロー */ | |
| #define FP_PE_FLAG (1 << 5) /* 精度 */ | |
| #define FP_SF_FLAG (1 << 6) /* スタックフォルト */ | |
| #define FP_ES_FLAG (1 << 7) /* エラーサマリステータス */ | |
| #define FP_C0_FLAG (1 << 8) /* 条件コード */ | |
| #define FP_C1_FLAG (1 << 9) /* 条件コード */ | |
| #define FP_C2_FLAG (1 << 10) /* 条件コード */ | |
| #define FP_TOP_FLAG (7 << 11) /* スタックポイントのトップ */ | |
| #define FP_C3_FLAG (1 << 14) /* 条件コード */ | |
| #define FP_B_FLAG (1 << 15) /* FPU ビジー */ | |
| #define FP_TOP_SHIFT 11 | |
| #define FP_TOP_GET() ((FPU_STATUSWORD & FP_TOP_FLAG) >> FP_TOP_SHIFT) | |
| #define FP_TOP_SET(v) ((FPU_STATUSWORD & ~FP_TOP_FLAG) | ((v) << FP_TOP_SHIFT)) | |
| #define FPU_STAT_TOP_INC() \ | |
| do { \ | |
| FPU_STAT.top = (FPU_STAT.top + 1) & 7; \ | |
| } while (/*CONSTCOND*/0) | |
| #define FPU_STAT_TOP_DEC() \ | |
| do { \ | |
| FPU_STAT.top = (FPU_STAT.top - 1) & 7; \ | |
| } while (/*CONSTCOND*/0) | |
| /* FPU control register */ | |
| #define FP_CTRL_PC_SHIFT 8 /* 精度制御 */ | |
| #define FP_CTRL_RC_SHIFT 10 /* 丸め制御 */ | |
| #define FP_CTRL_PC_24 0 /* 単精度 */ | |
| #define FP_CTRL_PC_53 1 /* 倍精度 */ | |
| #define FP_CTRL_PC_64 3 /* 拡張精度 */ | |
| #define FP_CTRL_RC_NEAREST_EVEN 0 | |
| #define FP_CTRL_RC_DOWN 1 | |
| #define FP_CTRL_RC_UP 2 | |
| #define FP_CTRL_RC_TO_ZERO 3 | |
| /* | |
| * Misc. | * Misc. |
| */ | */ |
| void memory_dump(int idx, UINT32 madr); | |
| void gdtr_dump(UINT32 base, UINT limit); | void gdtr_dump(UINT32 base, UINT limit); |
| void idtr_dump(UINT32 base, UINT limit); | void idtr_dump(UINT32 base, UINT limit); |
| void ldtr_dump(UINT32 base, UINT limit); | void ldtr_dump(UINT32 base, UINT limit); |
| void tr_dump(UINT16 selector, UINT32 base, UINT limit); | void tr_dump(UINT16 selector, UINT32 base, UINT limit); |
| UINT32 pde_dump(UINT32 base, int idx); | |
| UINT32 convert_laddr_to_paddr(UINT32 laddr); | |
| UINT32 convert_vaddr_to_paddr(unsigned int idx, UINT32 offset); | |
| /* | /* |
| * disasm | * disasm |
| Line 661 typedef struct { | Line 783 typedef struct { |
| int disasm(UINT32 *eip, disasm_context_t *ctx); | int disasm(UINT32 *eip, disasm_context_t *ctx); |
| #ifdef __cplusplus | #ifdef __cplusplus |
| } | } |
| #endif | #endif |