--- np2/i386c/ia32/cpu.h	2004/03/08 14:48:20	1.23
+++ np2/i386c/ia32/cpu.h	2004/06/15 13:50:13	1.30
@@ -1,4 +1,4 @@
-/*	$Id: cpu.h,v 1.23 2004/03/08 14:48:20 monaka Exp $	*/
+/*	$Id: cpu.h,v 1.30 2004/06/15 13:50:13 monaka Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -117,10 +117,6 @@ enum {
 	MAX_PREFIX = 8
 };
 
-enum {
-	CPU_PREFETCH_QUEUE_LENGTH = 16
-};
-
 typedef struct {
 	REG32		reg[CPU_REG_NUM];
 	UINT16		sreg[CPU_SEGREG_NUM];
@@ -157,10 +153,6 @@ typedef struct {
 	descriptor_t	ldtr;
 	descriptor_t	tr;
 
-	BYTE		prefetch[CPU_PREFETCH_QUEUE_LENGTH];
-	SINT8		prefetch_remain;
-	UINT8		pad2[3];
-
 	UINT32		adrsmask;
 	UINT32		ovflag;
 
@@ -213,10 +205,11 @@ typedef struct {
 	UINT32		clock;
 } I386STAT;
 
-typedef struct {					/* for ver0.73 */
+typedef struct {
 	BYTE		*ext;
 	UINT32		extsize;
 	UINT32		inport;
+	BYTE		*ems[4];
 } I386EXT;
 
 typedef struct {
@@ -243,6 +236,7 @@ extern I386CORE		i386core;
 #define	CPU_EXTMEM	i386core.e.ext
 #define	CPU_EXTMEMSIZE	i386core.e.extsize
 #define	CPU_INPADRS	i386core.e.inport
+#define	CPU_EMSPTR	i386core.e.ems
 
 extern sigjmp_buf	exec_1step_jmpbuf;
 
@@ -406,11 +400,13 @@ do { \
 #define	ALL_FLAG	(SZAPC_FLAG|T_FLAG|I_FLAG|D_FLAG|O_FLAG|IOPL_FLAG|NT_FLAG)
 #define	ALL_EFLAG	(ALL_FLAG|RF_FLAG|VM_FLAG|AC_FLAG|VIF_FLAG|VIP_FLAG|ID_FLAG)
 
-#define	REAL_FLAGREG	((CPU_FLAG & 0xf7ff) | (CPU_OV ? O_FLAG : 0))
-#define	REAL_EFLAGREG	((CPU_EFLAG & 0xfffff7ff) | (CPU_OV ? O_FLAG : 0))
+#define	REAL_FLAGREG	((CPU_FLAG & 0xf7ff) | (CPU_OV ? O_FLAG : 0) | 2)
+#define	REAL_EFLAGREG	((CPU_EFLAG & 0xfffff7ff) | (CPU_OV ? O_FLAG : 0) | 2)
 
+#if !defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION)
 void set_flags(UINT16 new_flags, UINT16 mask);
 void set_eflags(UINT32 new_flags, UINT32 mask);
+#endif
 
 
 #define	CPU_INST_OP32		CPU_STATSAVE.cpu_inst.op_32
@@ -452,17 +448,12 @@ void set_eflags(UINT32 new_flags, UINT32
 #define	CPU_STAT_EXCEPTION_COUNTER_INC()	CPU_STATSAVE.cpu_stat.nerror++
 #define	CPU_STAT_EXCEPTION_COUNTER_CLEAR()	CPU_STATSAVE.cpu_stat.nerror = 0
 
-#define	CPU_PREFETCHQ		CPU_STATSAVE.cpu_stat.prefetch
-#define	CPU_PREFETCHQ_REMAIN	CPU_STATSAVE.cpu_stat.prefetch_remain
-
-#if defined(IA32_SUPPORT_PREFETCH_QUEUE)
-#define	CPU_PREFETCH_CLEAR()	CPU_PREFETCHQ_REMAIN = 0
-#else	/* !IA32_SUPPORT_PREFETCH_QUEUE */
 #define	CPU_PREFETCH_CLEAR()
-#endif	/* IA32_SUPPORT_PREFETCH_QUEUE */
+#define	CPU_PREFETCHQ_REMAIN_ADD(d)
+#define	CPU_PREFETCHQ_REMAIN_SUB(d)
 
 #define	CPU_MODE_SUPERVISER	0
-#define	CPU_MODE_USER		1
+#define	CPU_MODE_USER		(1 << 3)
 #define	CPU_SET_CPL(cpl) \
 do { \
 	UINT8 __t = (UINT8)((cpl) & 3); \
@@ -479,7 +470,7 @@ do { \
 #define CPU_STI \
 do { \
 	CPU_FLAG |= I_FLAG; \
-	CPU_TRAP = (CPU_FLAG >> 8) & 1; \
+	CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG) ; \
 } while (/*CONSTCOND*/0)
 
 #define CPU_GDTR_LIMIT	CPU_STATSAVE.cpu_sysregs.gdtr_limit
@@ -520,6 +511,7 @@ do { \
 #define	CPU_CR0_NW		(1 << 29)
 #define	CPU_CR0_CD		(1 << 30)
 #define	CPU_CR0_PG		(1 << 31)
+#define	CPU_CR0_ALL		(CPU_CR0_PE|CPU_CR0_MP|CPU_CR0_EM|CPU_CR0_TS|CPU_CR0_ET|CPU_CR0_NE|CPU_CR0_WP|CPU_CR0_AM|CPU_CR0_NW|CPU_CR0_CD|CPU_CR0_PG)
 
 #define	CPU_CR3_PD_MASK		0xfffff000
 #define	CPU_CR3_PWT		(1 << 3)
@@ -577,12 +569,14 @@ do { \
 void ia32_init(void);
 void ia32_initreg(void);
 void ia32_setextsize(UINT32 size);
+void ia32_setemm(UINT frame, UINT32 addr);
 
 void ia32reset(void);
 void ia32shut(void);
+void ia32a20enable(BOOL enable);
 void ia32(void);
 void ia32_step(void);
-void CPUCALL ia32_interrupt(int vect);
+void CPUCALL ia32_interrupt(int vect, int soft);
 void CPUCALL ia32_exception(int vect, int p1, int p2);
 
 void exec_1step(void);