--- np2/i386c/ia32/cpu.h	2004/03/12 13:34:08	1.25
+++ np2/i386c/ia32/cpu.h	2004/03/25 08:51:24	1.28
@@ -1,4 +1,4 @@
-/*	$Id: cpu.h,v 1.25 2004/03/12 13:34:08 monaka Exp $	*/
+/*	$Id: cpu.h,v 1.28 2004/03/25 08:51:24 yui Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -464,7 +464,7 @@ void set_eflags(UINT32 new_flags, UINT32
 #endif	/* IA32_SUPPORT_PREFETCH_QUEUE */
 
 #define	CPU_MODE_SUPERVISER	0
-#define	CPU_MODE_USER		1
+#define	CPU_MODE_USER		(1 << 3)
 #define	CPU_SET_CPL(cpl) \
 do { \
 	UINT8 __t = (UINT8)((cpl) & 3); \
@@ -522,6 +522,7 @@ do { \
 #define	CPU_CR0_NW		(1 << 29)
 #define	CPU_CR0_CD		(1 << 30)
 #define	CPU_CR0_PG		(1 << 31)
+#define	CPU_CR0_ALL		(CPU_CR0_PE|CPU_CR0_MP|CPU_CR0_EM|CPU_CR0_TS|CPU_CR0_ET|CPU_CR0_NE|CPU_CR0_WP|CPU_CR0_AM|CPU_CR0_NW|CPU_CR0_CD|CPU_CR0_PG)
 
 #define	CPU_CR3_PD_MASK		0xfffff000
 #define	CPU_CR3_PWT		(1 << 3)
@@ -582,6 +583,7 @@ void ia32_setextsize(UINT32 size);
 
 void ia32reset(void);
 void ia32shut(void);
+void ia32a20enable(BOOL enable);
 void ia32(void);
 void ia32_step(void);
 void CPUCALL ia32_interrupt(int vect, int soft);