--- np2/i386c/ia32/cpu.h	2003/12/22 18:00:31	1.3
+++ np2/i386c/ia32/cpu.h	2004/01/15 15:50:33	1.8
@@ -1,4 +1,4 @@
-/*	$Id: cpu.h,v 1.3 2003/12/22 18:00:31 monaka Exp $	*/
+/*	$Id: cpu.h,v 1.8 2004/01/15 15:50:33 monaka Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -142,12 +142,12 @@ typedef struct {
 typedef struct {
 	descriptor_t	sreg[CPU_SEGREG_NUM];
 
-	DWORD		inport;
+	UINT32		adrsmask;
 	DWORD		ovflag;
 
 	BYTE		ss_32;
+	BYTE		resetreq;
 	BYTE		trap;
-	BYTE		cpu_type;
 	BYTE		_dummy;
 
 	BYTE		cpl;
@@ -177,19 +177,19 @@ typedef struct {
 	CPU_INST	cpu_inst;
 	CPU_INST	cpu_inst_default;
 
+	/* protected by cpu shut */
+	UINT8		cpu_type;
+	UINT8		itfbank;
+	UINT16		ram_d0;
 	SINT32		remainclock;
 	SINT32		baseclock;
 	UINT32		clock;
-
-	UINT32		adrsmask;			/* ? */
-	UINT32		inport;				/* ? */
-	UINT8		resetreq;
-	UINT8		itfbank;
 } I386STAT;
 
 typedef struct {					/* for ver0.73 */
-	BYTE	*ext;
-	UINT32	extsize;
+	BYTE		*ext;
+	UINT32		extsize;
+	UINT32		inport;
 } I386EXT;
 
 typedef struct {
@@ -201,16 +201,21 @@ extern I386CORE		i386core;
 
 #define	CPU_STATSAVE	i386core.s
 
+#define	CPU_ADRSMASK	i386core.s.cpu_stat.adrsmask
+#define	CPU_RESETREQ	i386core.s.cpu_stat.resetreq
+
 #define	CPU_REMCLOCK	i386core.s.remainclock
 #define	CPU_BASECLOCK	i386core.s.baseclock
 #define	CPU_CLOCK	i386core.s.clock
-#define	CPU_ADRSMASK	i386core.s.adrsmask
-#define	CPU_RESETREQ	i386core.s.resetreq
 #define	CPU_ITFBANK	i386core.s.itfbank
-#define	CPU_INPADRS	i386core.s.inport
+#define	CPU_RAM_D000	i386core.s.ram_d0
+
+#define CPU_TYPE	i386core.s.cpu_type
+#define CPUTYPE_V30	0x01
 
 #define	CPU_EXTMEM	i386core.e.ext
 #define	CPU_EXTMEMSIZE	i386core.e.extsize
+#define	CPU_INPADRS	i386core.e.inport
 
 extern BYTE 		iflags[];
 extern jmp_buf		exec_1step_jmpbuf;
@@ -286,7 +291,7 @@ do { \
 #define	CPU_STAT_SREG_INIT(n) \
 do { \
 	descriptor_t sd; \
-	memset(&CPU_STAT_SREG(n), 0, sizeof(CPU_STAT_SREG(n))); \
+\
 	memset(&sd, 0, sizeof(sd)); \
 	sd.u.seg.limit = 0xffff; \
 	CPU_SET_SEGDESC_DEFAULT(&sd, (n), 0); \
@@ -343,7 +348,7 @@ do { \
 #define CPU_FLAGL	CPU_STATSAVE.cpu_regs.eflags.b.l
 #define CPU_FLAGH	CPU_STATSAVE.cpu_regs.eflags.b.h
 #define CPU_TRAP	CPU_STATSAVE.cpu_stat.trap
-#define CPU_INPORT	CPU_STATSAVE.cpu_stat.inport
+// #define CPU_INPORT	CPU_STATSAVE.cpu_stat.inport
 #define CPU_OV		CPU_STATSAVE.cpu_stat.ovflag
 
 #define C_FLAG		(1 << 0)
@@ -377,9 +382,6 @@ void set_flags(WORD new_flags, WORD mask
 void set_eflags(DWORD new_flags, DWORD mask);
 
 
-#define CPU_TYPE		CPU_STATSAVE.cpu_stat.cpu_type
-#define CPUTYPE_V30		0x01
-
 #define	CPU_INST_OP32		CPU_STATSAVE.cpu_inst.op_32
 #define	CPU_INST_AS32		CPU_STATSAVE.cpu_inst.as_32
 #define	CPU_INST_REPUSE		CPU_STATSAVE.cpu_inst.rep_used
@@ -392,7 +394,9 @@ void set_eflags(DWORD new_flags, DWORD m
 #define	CPU_STAT_CS_LIMIT	CPU_STATSAVE.cpu_stat.sreg[CPU_CS_INDEX].u.seg.limit
 #define	CPU_STAT_CS_END		CPU_STATSAVE.cpu_stat.sreg[CPU_CS_INDEX].u.seg.segend
 
+#define	CPU_STAT_ADRSMASK	CPU_STATSAVE.cpu_stat.adrsmask
 #define	CPU_STAT_SS32		CPU_STATSAVE.cpu_stat.ss_32
+#define	CPU_STAT_RESETREQ	CPU_STATSAVE.cpu_stat.resetreq
 #define	CPU_STAT_PM		CPU_STATSAVE.cpu_stat.protected_mode
 #define	CPU_STAT_VM86		CPU_STATSAVE.cpu_stat.vm86
 #define	CPU_STAT_PAGING		CPU_STATSAVE.cpu_stat.paging
@@ -433,6 +437,8 @@ void set_eflags(DWORD new_flags, DWORD m
 /*
  * control register
  */
+#define CPU_MSW			CPU_STATSAVE.cpu_sysregs.cr0
+
 #define CPU_CR0			CPU_STATSAVE.cpu_sysregs.cr0
 #define CPU_CR1			CPU_STATSAVE.cpu_sysregs.cr1
 #define CPU_CR2			CPU_STATSAVE.cpu_sysregs.cr2
@@ -472,6 +478,7 @@ void set_eflags(DWORD new_flags, DWORD m
 void ia32_init(void);
 
 void ia32reset(void);
+void ia32shut(void);
 void ia32(void);
 void ia32withtrap(void);
 void ia32withdma(void);