--- np2/i386c/ia32/cpu.h	2004/01/05 06:50:15	1.6
+++ np2/i386c/ia32/cpu.h	2004/01/27 15:51:35	1.11
@@ -1,4 +1,4 @@
-/*	$Id: cpu.h,v 1.6 2004/01/05 06:50:15 yui Exp $	*/
+/*	$Id: cpu.h,v 1.11 2004/01/27 15:51:35 monaka Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -75,13 +75,7 @@ typedef union {
 }
 #endif
 
-#include "cpu_io.h"
-#include "cpu_mem.h"
-#include "exception.h"
-#include "paging.h"
-#include "resolve.h"
 #include "segments.h"
-#include "task.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -110,6 +104,18 @@ enum {
 	CPU_SEGREG_NUM
 };
 
+enum {
+	CPU_TEST_REG_NUM = 8
+};
+
+enum {
+	CPU_DEBUG_REG_NUM = 8
+};
+
+enum {
+	MAX_PREFIX = 8
+};
+
 typedef struct {
 	REG32		reg[CPU_REG_NUM];
 	WORD		sreg[CPU_SEGREG_NUM];
@@ -118,6 +124,9 @@ typedef struct {
 
 	REG32		eip;
 	REG32		prev_eip;
+
+	DWORD		tr[CPU_TEST_REG_NUM];
+	DWORD		dr[CPU_DEBUG_REG_NUM];
 } CPU_REGS;
 
 typedef struct {
@@ -143,7 +152,6 @@ typedef struct {
 	descriptor_t	sreg[CPU_SEGREG_NUM];
 
 	UINT32		adrsmask;
-//	DWORD		inport;		// -> i386core.e.inport
 	DWORD		ovflag;
 
 	BYTE		ss_32;
@@ -209,6 +217,7 @@ extern I386CORE		i386core;
 #define	CPU_BASECLOCK	i386core.s.baseclock
 #define	CPU_CLOCK	i386core.s.clock
 #define	CPU_ITFBANK	i386core.s.itfbank
+#define	CPU_RAM_D000	i386core.s.ram_d0
 
 #define CPU_TYPE	i386core.s.cpu_type
 #define CPUTYPE_V30	0x01
@@ -218,7 +227,7 @@ extern I386CORE		i386core;
 #define	CPU_INPADRS	i386core.e.inport
 
 extern BYTE 		iflags[];
-extern jmp_buf		exec_1step_jmpbuf;
+extern sigjmp_buf	exec_1step_jmpbuf;
 
 
 /*
@@ -230,8 +239,8 @@ extern jmp_buf		exec_1step_jmpbuf;
 #define	CPU_VENDOR_3	0x6c65746e	/* "ntel" */
 
 /* version */
-#define	CPU_FAMILY	6
-#define	CPU_MODEL	1
+#define	CPU_FAMILY	4
+#define	CPU_MODEL	2
 #define	CPU_STEPPING	3
 
 /* feature */
@@ -291,7 +300,7 @@ do { \
 #define	CPU_STAT_SREG_INIT(n) \
 do { \
 	descriptor_t sd; \
-	memset(&CPU_STAT_SREG(n), 0, sizeof(CPU_STAT_SREG(n))); \
+\
 	memset(&sd, 0, sizeof(sd)); \
 	sd.u.seg.limit = 0xffff; \
 	CPU_SET_SEGDESC_DEFAULT(&sd, (n), 0); \
@@ -461,6 +470,7 @@ void set_eflags(DWORD new_flags, DWORD m
 #define	CPU_CR3_PD_MASK		0xfffff000
 #define	CPU_CR3_PWT		(1 << 3)
 #define	CPU_CR3_PCD		(1 << 4)
+#define	CPU_CR3_MASK		(CPU_CR3_PD_MASK|CPU_CR3_PWT|CPU_CR3_PCD)
 
 #define	CPU_CR4_VME		(1 << 0)
 #define	CPU_CR4_PVI		(1 << 1)
@@ -513,37 +523,27 @@ extern WORD  *reg16_b53[0x100];
 extern DWORD *reg32_b20[0x100];
 extern DWORD *reg32_b53[0x100];
 
+extern const char *reg8_str[8];
+extern const char *reg16_str[8];
+extern const char *reg32_str[8];
+
 /*
- * Profile
+ * Misc.
  */
-#if defined(IA32_PROFILE_INSTRUCTION)
-extern UINT32	inst_1byte_count[2][256];
-extern UINT32	inst_2byte_count[2][256];
-extern UINT32	ea16_count[24];
-extern UINT32	ea32_count[24];
-extern UINT32	sib0_count[256];
-extern UINT32	sib1_count[256];
-extern UINT32	sib2_count[256];
-
-#define	PROFILE_INC_INST_1BYTE(op)	inst_1byte_count[CPU_INST_OP32][op]++
-#define	PROFILE_INC_INST_2BYTE(op)	inst_2byte_count[CPU_INST_OP32][op]++
-#define	PROFILE_INC_EA16(idx)		ea16_count[idx]++
-#define	PROFILE_INC_EA32(idx)		ea32_count[idx]++
-#define	PROFILE_INC_SIB0(op)		sib0_count[op]++
-#define	PROFILE_INC_SIB1(op)		sib1_count[op]++
-#define	PROFILE_INC_SIB2(op)		sib2_count[op]++
-#else
-#define	PROFILE_INC_INST_1BYTE(op)
-#define	PROFILE_INC_INST_2BYTE(op)
-#define	PROFILE_INC_EA16(idx)
-#define	PROFILE_INC_EA32(idx)
-#define	PROFILE_INC_SIB0(op)
-#define	PROFILE_INC_SIB1(op)
-#define	PROFILE_INC_SIB2(op)
-#endif
+void gdtr_dump(DWORD base, DWORD limit);
+void idtr_dump(DWORD base, DWORD limit);
+void ldtr_dump(DWORD base, DWORD limit);
+void tr_dump(WORD selector, DWORD base, DWORD limit);
 
 #ifdef __cplusplus
 }
 #endif
 
+#include "cpu_io.h"
+#include "cpu_mem.h"
+#include "exception.h"
+#include "paging.h"
+#include "resolve.h"
+#include "task.h"
+
 #endif	/* !IA32_CPU_CPU_H__ */