--- np2/i386c/ia32/cpu.h	2004/01/05 14:30:34	1.7
+++ np2/i386c/ia32/cpu.h	2004/02/04 13:24:35	1.13
@@ -1,4 +1,4 @@
-/*	$Id: cpu.h,v 1.7 2004/01/05 14:30:34 yui Exp $	*/
+/*	$Id: cpu.h,v 1.13 2004/02/04 13:24:35 monaka Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -75,13 +75,7 @@ typedef union {
 }
 #endif
 
-#include "cpu_io.h"
-#include "cpu_mem.h"
-#include "exception.h"
-#include "paging.h"
-#include "resolve.h"
 #include "segments.h"
-#include "task.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -110,14 +104,30 @@ enum {
 	CPU_SEGREG_NUM
 };
 
+enum {
+	CPU_TEST_REG_NUM = 8
+};
+
+enum {
+	CPU_DEBUG_REG_NUM = 8
+};
+
+enum {
+	MAX_PREFIX = 8
+};
+
 typedef struct {
 	REG32		reg[CPU_REG_NUM];
 	WORD		sreg[CPU_SEGREG_NUM];
 
 	REG32		eflags;
-
 	REG32		eip;
+
 	REG32		prev_eip;
+	REG32		prev_esp;
+
+	DWORD		tr[CPU_TEST_REG_NUM];
+	DWORD		dr[CPU_DEBUG_REG_NUM];
 } CPU_REGS;
 
 typedef struct {
@@ -128,8 +138,6 @@ typedef struct {
 
 	WORD		ldtr;
 	WORD		tr;
-	descriptor_t	ldtr_desc;
-	descriptor_t	tr_desc;
 
 	DWORD		cr0;
 	DWORD		cr1;
@@ -141,9 +149,10 @@ typedef struct {
 
 typedef struct {
 	descriptor_t	sreg[CPU_SEGREG_NUM];
+	descriptor_t	ldtr_desc;
+	descriptor_t	tr_desc;
 
 	UINT32		adrsmask;
-//	DWORD		inport;		// -> i386core.e.inport
 	DWORD		ovflag;
 
 	BYTE		ss_32;
@@ -156,6 +165,8 @@ typedef struct {
 	BYTE		paging;
 	BYTE		vm86;
 
+	DWORD		pde_base;
+
 	DWORD		ioaddr;		/* I/O bitmap linear address */
 	WORD		iolimit;	/* I/O bitmap count */
 
@@ -219,7 +230,7 @@ extern I386CORE		i386core;
 #define	CPU_INPADRS	i386core.e.inport
 
 extern BYTE 		iflags[];
-extern jmp_buf		exec_1step_jmpbuf;
+extern sigjmp_buf	exec_1step_jmpbuf;
 
 
 /*
@@ -231,8 +242,12 @@ extern jmp_buf		exec_1step_jmpbuf;
 #define	CPU_VENDOR_3	0x6c65746e	/* "ntel" */
 
 /* version */
-#define	CPU_FAMILY	6
-#define	CPU_MODEL	1
+#define	CPU_FAMILY	4
+#if defined(USE_FPU)
+#define	CPU_MODEL	1	/* 486DX */
+#else
+#define	CPU_MODEL	2	/* 486SX */
+#endif
 #define	CPU_STEPPING	3
 
 /* feature */
@@ -292,7 +307,7 @@ do { \
 #define	CPU_STAT_SREG_INIT(n) \
 do { \
 	descriptor_t sd; \
-	memset(&CPU_STAT_SREG(n), 0, sizeof(CPU_STAT_SREG(n))); \
+\
 	memset(&sd, 0, sizeof(sd)); \
 	sd.u.seg.limit = 0xffff; \
 	CPU_SET_SEGDESC_DEFAULT(&sd, (n), 0); \
@@ -329,6 +344,7 @@ do { \
 #define	CPU_EDI		CPU_REGS_DWORD(CPU_EDI_INDEX)
 #define CPU_EIP		CPU_STATSAVE.cpu_regs.eip.d
 #define CPU_PREV_EIP	CPU_STATSAVE.cpu_regs.prev_eip.d
+#define CPU_PREV_ESP	CPU_STATSAVE.cpu_regs.prev_esp.d
 
 #define	CPU_ES		CPU_REGS_SREG(CPU_ES_INDEX)
 #define	CPU_CS		CPU_REGS_SREG(CPU_CS_INDEX)
@@ -349,7 +365,9 @@ do { \
 #define CPU_FLAGL	CPU_STATSAVE.cpu_regs.eflags.b.l
 #define CPU_FLAGH	CPU_STATSAVE.cpu_regs.eflags.b.h
 #define CPU_TRAP	CPU_STATSAVE.cpu_stat.trap
-// #define CPU_INPORT	CPU_STATSAVE.cpu_stat.inport
+#if 0
+#define CPU_INPORT	CPU_STATSAVE.cpu_stat.inport
+#endif
 #define CPU_OV		CPU_STATSAVE.cpu_stat.ovflag
 
 #define C_FLAG		(1 << 0)
@@ -402,6 +420,7 @@ void set_eflags(DWORD new_flags, DWORD m
 #define	CPU_STAT_VM86		CPU_STATSAVE.cpu_stat.vm86
 #define	CPU_STAT_PAGING		CPU_STATSAVE.cpu_stat.paging
 #define	CPU_STAT_CPL		CPU_STATSAVE.cpu_stat.cpl
+#define	CPU_STAT_PDE_BASE	CPU_STATSAVE.cpu_stat.pde_base
 
 #define	CPU_STAT_IOPL		((CPU_EFLAG & IOPL_FLAG) >> 12)
 #define	CPU_IOPL0		0
@@ -415,6 +434,10 @@ void set_eflags(DWORD new_flags, DWORD m
 #define	CPU_STAT_NERROR		CPU_STATSAVE.cpu_stat.nerror
 #define	CPU_STAT_PREV_EXCEPTION	CPU_STATSAVE.cpu_stat.prev_exception
 
+#define	CPU_MODE_SUPERVISER	0
+#define	CPU_MODE_USER		1
+#define	CPU_IS_USER_MODE()	((CPU_STAT_CPL == 3) ? CPU_MODE_USER : CPU_MODE_SUPERVISER)
+
 #define CPU_CLI		do { CPU_FLAG &= ~I_FLAG;	\
 					CPU_TRAP = 0; } while (/*CONSTCOND*/ 0)
 #define CPU_STI		do { CPU_FLAG |= I_FLAG;	\
@@ -425,15 +448,15 @@ void set_eflags(DWORD new_flags, DWORD m
 #define CPU_IDTR_LIMIT	CPU_STATSAVE.cpu_sysregs.idtr_limit
 #define CPU_IDTR_BASE	CPU_STATSAVE.cpu_sysregs.idtr_base
 #define CPU_LDTR	CPU_STATSAVE.cpu_sysregs.ldtr
-#define CPU_LDTR_DESC	CPU_STATSAVE.cpu_sysregs.ldtr_desc
-#define CPU_LDTR_BASE	CPU_STATSAVE.cpu_sysregs.ldtr_desc.u.seg.segbase
-#define CPU_LDTR_END	CPU_STATSAVE.cpu_sysregs.ldtr_desc.u.seg.segend
-#define CPU_LDTR_LIMIT	CPU_STATSAVE.cpu_sysregs.ldtr_desc.u.seg.limit
+#define CPU_LDTR_DESC	CPU_STATSAVE.cpu_stat.ldtr_desc
+#define CPU_LDTR_BASE	CPU_STATSAVE.cpu_stat.ldtr_desc.u.seg.segbase
+#define CPU_LDTR_END	CPU_STATSAVE.cpu_stat.ldtr_desc.u.seg.segend
+#define CPU_LDTR_LIMIT	CPU_STATSAVE.cpu_stat.ldtr_desc.u.seg.limit
 #define CPU_TR		CPU_STATSAVE.cpu_sysregs.tr
-#define CPU_TR_DESC	CPU_STATSAVE.cpu_sysregs.tr_desc
-#define CPU_TR_BASE	CPU_STATSAVE.cpu_sysregs.tr_desc.u.seg.segbase
-#define CPU_TR_END	CPU_STATSAVE.cpu_sysregs.tr_desc.u.seg.segend
-#define CPU_TR_LIMIT	CPU_STATSAVE.cpu_sysregs.tr_desc.u.seg.limit
+#define CPU_TR_DESC	CPU_STATSAVE.cpu_stat.tr_desc
+#define CPU_TR_BASE	CPU_STATSAVE.cpu_stat.tr_desc.u.seg.segbase
+#define CPU_TR_END	CPU_STATSAVE.cpu_stat.tr_desc.u.seg.segend
+#define CPU_TR_LIMIT	CPU_STATSAVE.cpu_stat.tr_desc.u.seg.limit
 
 /*
  * control register
@@ -462,6 +485,7 @@ void set_eflags(DWORD new_flags, DWORD m
 #define	CPU_CR3_PD_MASK		0xfffff000
 #define	CPU_CR3_PWT		(1 << 3)
 #define	CPU_CR3_PCD		(1 << 4)
+#define	CPU_CR3_MASK		(CPU_CR3_PD_MASK|CPU_CR3_PWT|CPU_CR3_PCD)
 
 #define	CPU_CR4_VME		(1 << 0)
 #define	CPU_CR4_PVI		(1 << 1)
@@ -493,8 +517,6 @@ void exec_1step(void);
 #define	INST_STRING	(1 << 1)
 #define	REP_CHECKZF	(1 << 7)
 
-void disasm(WORD cs, DWORD maddr);
-
 void ia32_printf(const char *buf, ...);
 void ia32_warning(const char *buf, ...);
 void ia32_panic(const char *buf, ...);
@@ -503,6 +525,7 @@ void ia32_bioscall(void);
 
 void FASTCALL change_pm(BOOL onoff);
 void FASTCALL change_vm(BOOL onoff);
+void FASTCALL change_pg(BOOL onoff);
 
 extern BYTE szpcflag[0x200];
 extern BYTE szpflag_w[0x10000];
@@ -514,37 +537,34 @@ extern WORD  *reg16_b53[0x100];
 extern DWORD *reg32_b20[0x100];
 extern DWORD *reg32_b53[0x100];
 
+extern const char *reg8_str[8];
+extern const char *reg16_str[8];
+extern const char *reg32_str[8];
+
+char *cpu_reg2str(void);
+#if defined(USE_FPU)
+char *fpu_reg2str(void);
+#endif
+void dbg_printf(const char *str, ...);
+
+
 /*
- * Profile
+ * Misc.
  */
-#if defined(IA32_PROFILE_INSTRUCTION)
-extern UINT32	inst_1byte_count[2][256];
-extern UINT32	inst_2byte_count[2][256];
-extern UINT32	ea16_count[24];
-extern UINT32	ea32_count[24];
-extern UINT32	sib0_count[256];
-extern UINT32	sib1_count[256];
-extern UINT32	sib2_count[256];
-
-#define	PROFILE_INC_INST_1BYTE(op)	inst_1byte_count[CPU_INST_OP32][op]++
-#define	PROFILE_INC_INST_2BYTE(op)	inst_2byte_count[CPU_INST_OP32][op]++
-#define	PROFILE_INC_EA16(idx)		ea16_count[idx]++
-#define	PROFILE_INC_EA32(idx)		ea32_count[idx]++
-#define	PROFILE_INC_SIB0(op)		sib0_count[op]++
-#define	PROFILE_INC_SIB1(op)		sib1_count[op]++
-#define	PROFILE_INC_SIB2(op)		sib2_count[op]++
-#else
-#define	PROFILE_INC_INST_1BYTE(op)
-#define	PROFILE_INC_INST_2BYTE(op)
-#define	PROFILE_INC_EA16(idx)
-#define	PROFILE_INC_EA32(idx)
-#define	PROFILE_INC_SIB0(op)
-#define	PROFILE_INC_SIB1(op)
-#define	PROFILE_INC_SIB2(op)
-#endif
+void gdtr_dump(DWORD base, DWORD limit);
+void idtr_dump(DWORD base, DWORD limit);
+void ldtr_dump(DWORD base, DWORD limit);
+void tr_dump(WORD selector, DWORD base, DWORD limit);
 
 #ifdef __cplusplus
 }
 #endif
 
+#include "cpu_io.h"
+#include "cpu_mem.h"
+#include "exception.h"
+#include "paging.h"
+#include "resolve.h"
+#include "task.h"
+
 #endif	/* !IA32_CPU_CPU_H__ */