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Diff for /np2/i386c/ia32/cpu_io.c between versions 1.5 and 1.10

version 1.5, 2004/03/08 12:56:22 version 1.10, 2011/01/15 17:17:23
Line 1 Line 1
 /*      $Id$    */  
   
 /*  /*
  * Copyright (c) 2003 NONAKA Kimihiro   * Copyright (c) 2003 NONAKA Kimihiro
  * All rights reserved.   * All rights reserved.
Line 12 Line 10
  * 2. Redistributions in binary form must reproduce the above copyright   * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the   *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.   *    documentation and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products  
  *    derived from this software without specific prior written permission.  
  *   *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR   * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES   * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
Line 28 Line 24
  */   */
   
 #include "compiler.h"  #include "compiler.h"
   
 #include "cpu.h"  #include "cpu.h"
 #include "pccore.h"  #include "pccore.h"
 #include "iocore.h"  #include "iocore.h"
   #include "memory.h"
   
   static void IOOUTCALL check_io(UINT port, UINT len);
   
 static void  static void IOOUTCALL
 check_io(UINT port, UINT len)  check_io(UINT port, UINT len) 
 {  {
         UINT off;          UINT off;
         UINT8 bit;          UINT8 bit;
Line 63  check_io(UINT port, UINT len) Line 62  check_io(UINT port, UINT len)
         }          }
 }  }
   
 #if defined(IA32_SUPPORT_DEBUG_REGISTER) && CPU_FAMILY >= 5  
 INLINE static void  
 check_ioport_break_point(UINT port, UINT length)  
 {  
         int i;  
   
         if (CPU_STAT_BP && !(CPU_EFLAG & RF_FLAG)) {  
                 for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {  
                         if ((CPU_STAT_BP & (1 << i))  
                          && (CPU_DR7_GET_RW(i) == CPU_DR7_RW_IO)  
   
                          && ((port <= CPU_DR(i) && port + length > CPU_DR(i))  
                           || (port > CPU_DR(i) && port <= CPU_DR(i) + CPU_DR7_GET_LEN(i)))) {  
                                 CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_B(i);  
                         }  
                 }  
         }  
 }  
 #else  
 #define check_ioport_break_point(port, length)  
 #endif  
   
 UINT8  UINT8
 cpu_in(UINT port)  cpu_in(UINT port)
 {  {
Line 92  cpu_in(UINT port) Line 69  cpu_in(UINT port)
         if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {          if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {
                 check_io(port, 1);                  check_io(port, 1);
         }          }
         check_ioport_break_point(port, 1);  
         return iocore_inp8(port);          return iocore_inp8(port);
 }  }
   
Line 103  cpu_in_w(UINT port) Line 79  cpu_in_w(UINT port)
         if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {          if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {
                 check_io(port, 2);                  check_io(port, 2);
         }          }
         check_ioport_break_point(port, 2);  
         return iocore_inp16(port);          return iocore_inp16(port);
 }  }
   
Line 114  cpu_in_d(UINT port) Line 89  cpu_in_d(UINT port)
         if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {          if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {
                 check_io(port, 4);                  check_io(port, 4);
         }          }
         check_ioport_break_point(port, 4);  
         return iocore_inp32(port);          return iocore_inp32(port);
 }  }
   
Line 125  cpu_out(UINT port, UINT8 data) Line 99  cpu_out(UINT port, UINT8 data)
         if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {          if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {
                 check_io(port, 1);                  check_io(port, 1);
         }          }
         check_ioport_break_point(port, 1);  
         iocore_out8(port, data);          iocore_out8(port, data);
 }  }
   
Line 136  cpu_out_w(UINT port, UINT16 data) Line 109  cpu_out_w(UINT port, UINT16 data)
         if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {          if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {
                 check_io(port, 2);                  check_io(port, 2);
         }          }
         check_ioport_break_point(port, 2);  
         iocore_out16(port, data);          iocore_out16(port, data);
 }  }
   
Line 147  cpu_out_d(UINT port, UINT32 data) Line 119  cpu_out_d(UINT port, UINT32 data)
         if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {          if (CPU_STAT_PM && (CPU_STAT_VM86 || (CPU_STAT_CPL > CPU_STAT_IOPL))) {
                 check_io(port, 4);                  check_io(port, 4);
         }          }
         check_ioport_break_point(port, 4);  
         iocore_out32(port, data);          iocore_out32(port, data);
 }  }
Removed from v.1.5  
changed lines
  Added in v.1.10

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