| version 1.10, 2004/02/05 16:41:32 | version 1.14, 2004/03/12 13:34:08 | 
| Line 36 | Line 36 | 
 | * memory access check | * memory access check | 
 | */ | */ | 
 | void | void | 
| cpu_memoryread_check(descriptor_t* sd, DWORD offset, DWORD length, int e) | cpu_memoryread_check(descriptor_t *sd, UINT32 offset, UINT length, int e) | 
 | { | { | 
| DWORD uplimit; | UINT32 uplimit; | 
 |  |  | 
 | if (CPU_STAT_PM) { | if (CPU_STAT_PM) { | 
 | /* invalid */ | /* invalid */ | 
| Line 52  cpu_memoryread_check(descriptor_t* sd, D | Line 52  cpu_memoryread_check(descriptor_t* sd, D | 
 | VERBOSE(("cpu_memoryread_check: not present")); | VERBOSE(("cpu_memoryread_check: not present")); | 
 | EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
 | } | } | 
 |  | } | 
 |  |  | 
| switch (sd->type) { | switch (sd->type) { | 
| case 0:  case 1:        /* ro */ | case 0:  case 1:        /* ro */ | 
| case 2:  case 3:        /* rw */ | case 2:  case 3:        /* rw */ | 
| case 10: case 11:       /* rx */ | case 10: case 11:       /* rx */ | 
| case 14: case 15:       /* rxc */ | case 14: case 15:       /* rxc */ | 
| if (offset > sd->u.seg.limit - length + 1) { | if (offset > sd->u.seg.limit - length + 1) { | 
| VERBOSE(("cpu_memoryread_check: offset(%08x) > sd->u.seg.limit(%08x) - length(%08x) + 1", offset, sd->u.seg.limit, length)); | VERBOSE(("cpu_memoryread_check: offset(%08x) > sd->u.seg.limit(%08x) - length(%08x) + 1", offset, sd->u.seg.limit, length)); | 
| EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
| } | } | 
| if (length - 1 > sd->u.seg.limit) { | if (length - 1 > sd->u.seg.limit) { | 
| VERBOSE(("cpu_memoryread_check: length(%08x) - 1 > sd->u.seg.limit(%08x)", length, sd->u.seg.limit)); | VERBOSE(("cpu_memoryread_check: length(%08x) - 1 > sd->u.seg.limit(%08x)", length, sd->u.seg.limit)); | 
| EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
| } | } | 
| break; | break; | 
|  |  | 
| case 4:  case 5:        /* ro (expand down) */ |  | 
| case 6:  case 7:        /* rw (expand down) */ |  | 
| uplimit = sd->d ? 0xffffffff : 0x0000ffff; |  | 
| if (offset <= sd->u.seg.limit) { |  | 
| VERBOSE(("cpu_memoryread_check: offset(%08x) <= sd->u.seg.limit(%08x)", offset, sd->u.seg.limit)); |  | 
| EXCEPTION(e, 0); |  | 
| } |  | 
| if (offset > uplimit) { |  | 
| VERBOSE(("cpu_memoryread_check: offset(%08x) > uplimit(%08x)", offset, uplimit)); |  | 
| EXCEPTION(e, 0); |  | 
| } |  | 
| if (uplimit - offset < length - 1) { |  | 
| VERBOSE(("cpu_memoryread_check: uplimit(%08x) - offset(%08x) < length(%08x) - 1", uplimit, offset, length)); |  | 
| EXCEPTION(e, 0); |  | 
| } |  | 
| break; |  | 
 |  |  | 
| default: | case 4:  case 5:        /* ro (expand down) */ | 
| VERBOSE(("cpu_memoryread_check: invalid type (type = %d)", sd->type)); | case 6:  case 7:        /* rw (expand down) */ | 
|  | uplimit = sd->d ? 0xffffffff : 0x0000ffff; | 
|  | if (offset <= sd->u.seg.limit) { | 
|  | VERBOSE(("cpu_memoryread_check: offset(%08x) <= sd->u.seg.limit(%08x)", offset, sd->u.seg.limit)); | 
 | EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
 | break; |  | 
 | } | } | 
 |  | if (offset > uplimit) { | 
 |  | VERBOSE(("cpu_memoryread_check: offset(%08x) > uplimit(%08x)", offset, uplimit)); | 
 |  | EXCEPTION(e, 0); | 
 |  | } | 
 |  | if (uplimit - offset < length - 1) { | 
 |  | VERBOSE(("cpu_memoryread_check: uplimit(%08x) - offset(%08x) < length(%08x) - 1", uplimit, offset, length)); | 
 |  | EXCEPTION(e, 0); | 
 |  | } | 
 |  | break; | 
 |  |  | 
 |  | default: | 
 |  | VERBOSE(("cpu_memoryread_check: invalid type (type = %d)", sd->type)); | 
 |  | EXCEPTION(e, 0); | 
 |  | break; | 
 | } | } | 
 | sd->flag |= CPU_DESC_FLAG_READABLE; | sd->flag |= CPU_DESC_FLAG_READABLE; | 
 | } | } | 
 |  |  | 
 | void | void | 
| cpu_memorywrite_check(descriptor_t* sd, DWORD offset, DWORD length, int e) | cpu_memorywrite_check(descriptor_t *sd, UINT32 offset, UINT length, int e) | 
 | { | { | 
| DWORD uplimit; | UINT32 uplimit; | 
 |  |  | 
 | if (CPU_STAT_PM) { | if (CPU_STAT_PM) { | 
 | /* invalid */ | /* invalid */ | 
| Line 116  cpu_memorywrite_check(descriptor_t* sd, | Line 116  cpu_memorywrite_check(descriptor_t* sd, | 
 | VERBOSE(("cpu_memorywrite_check: system segment")); | VERBOSE(("cpu_memorywrite_check: system segment")); | 
 | EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
 | } | } | 
 |  | } | 
 |  |  | 
| switch (sd->type) { | switch (sd->type) { | 
| case 2: case 3: /* rw */ | case 2: case 3: /* rw */ | 
| if (offset > sd->u.seg.limit - length + 1) { | if (offset > sd->u.seg.limit - length + 1) { | 
| VERBOSE(("cpu_memorywrite_check: offset(%08x) > sd->u.seg.limit(%08x) - length(%08x) + 1", offset, sd->u.seg.limit, length)); | VERBOSE(("cpu_memorywrite_check: offset(%08x) > sd->u.seg.limit(%08x) - length(%08x) + 1", offset, sd->u.seg.limit, length)); | 
| EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
| } | } | 
| if (length - 1 > sd->u.seg.limit) { | if (length - 1 > sd->u.seg.limit) { | 
| VERBOSE(("cpu_memorywrite_check: length(%08x) - 1 > sd->u.seg.limit(%08x)", length, sd->u.seg.limit)); | VERBOSE(("cpu_memorywrite_check: length(%08x) - 1 > sd->u.seg.limit(%08x)", length, sd->u.seg.limit)); | 
| EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
| } | } | 
| break; | break; | 
|  |  | 
| case 6: case 7: /* rw (expand down) */ |  | 
| uplimit = sd->d ? 0xffffffff : 0x0000ffff; |  | 
| if (offset <= sd->u.seg.limit) { |  | 
| VERBOSE(("cpu_memorywrite_check: offset(%08x) <= sd->u.seg.limit(%08x)", offset, sd->u.seg.limit)); |  | 
| EXCEPTION(e, 0); |  | 
| } |  | 
| if (offset > uplimit) { |  | 
| VERBOSE(("cpu_memorywrite_check: offset(%08x) > uplimit(%08x)", offset, uplimit)); |  | 
| EXCEPTION(e, 0); |  | 
| } |  | 
| if (uplimit - offset < length - 1) { |  | 
| VERBOSE(("cpu_memorywrite_check: uplimit(%08x) - offset(%08x) < length(%08x) - 1", uplimit, offset, length)); |  | 
| EXCEPTION(e, 0); |  | 
| } |  | 
| break; |  | 
 |  |  | 
| default: | case 6: case 7: /* rw (expand down) */ | 
| VERBOSE(("cpu_memorywrite_check: invalid type (type = %d)", sd->type)); | uplimit = sd->d ? 0xffffffff : 0x0000ffff; | 
|  | if (offset <= sd->u.seg.limit) { | 
|  | VERBOSE(("cpu_memorywrite_check: offset(%08x) <= sd->u.seg.limit(%08x)", offset, sd->u.seg.limit)); | 
|  | EXCEPTION(e, 0); | 
|  | } | 
|  | if (offset > uplimit) { | 
|  | VERBOSE(("cpu_memorywrite_check: offset(%08x) > uplimit(%08x)", offset, uplimit)); | 
|  | EXCEPTION(e, 0); | 
|  | } | 
|  | if (uplimit - offset < length - 1) { | 
|  | VERBOSE(("cpu_memorywrite_check: uplimit(%08x) - offset(%08x) < length(%08x) - 1", uplimit, offset, length)); | 
 | EXCEPTION(e, 0); | EXCEPTION(e, 0); | 
 | break; |  | 
 | } | } | 
 |  | break; | 
 |  |  | 
 |  | default: | 
 |  | VERBOSE(("cpu_memorywrite_check: invalid type (type = %d)", sd->type)); | 
 |  | EXCEPTION(e, 0); | 
 |  | break; | 
 | } | } | 
 | sd->flag |= CPU_DESC_FLAG_WRITABLE; | sd->flag |= CPU_DESC_FLAG_WRITABLE; | 
 | } | } | 
 |  |  | 
| BOOL | void | 
| cpu_stack_push_check(descriptor_t* sdp, DWORD esp, DWORD length) | cpu_stack_push_check(UINT16 s, descriptor_t *sd, UINT32 esp, UINT length) | 
 | { | { | 
| DWORD limit; | UINT32 limit; | 
 |  |  | 
| if (!CPU_STAT_PM) | if (CPU_STAT_PM) { | 
| return TRUE; | if (!sd->valid || !sd->p) { | 
|  | VERBOSE(("cpu_stack_push_check: valid = %d, present = %d", sd->valid, sd->p)); | 
|  | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
|  | } | 
|  | if (!sd->s || sd->u.seg.c || !sd->u.seg.wr) { | 
|  | VERBOSE(("cpu_stack_push_check: s = %d, c = %d, wr", sd->s, sd->u.seg.c, sd->u.seg.wr)); | 
|  | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
|  | } | 
 |  |  | 
| if (!sdp->valid || !sdp->p) | if (!sd->d) { | 
| return FALSE; | limit = 0xffff; | 
| if (!sdp->s || sdp->u.seg.c || !sdp->u.seg.wr) | } else { | 
| return FALSE; | limit = 0xffffffff; | 
|  | } | 
| if (!sdp->d) { | if (sd->u.seg.ec) { | 
| esp &= 0xffff; | /* expand-down stack */ | 
| limit = 0xffff; | if ((esp == 0) | 
| } else { | || (esp < length) | 
| limit = 0xffffffff; | || (esp - length <= sd->u.seg.limit) | 
| } | || (esp > limit)) { | 
| if (sdp->u.seg.ec) { | VERBOSE(("cpu_stack_push_check: expand-down, esp = %08x, length = %08x", esp, length)); | 
| /* expand-down stack */ | VERBOSE(("cpu_stack_push_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit)); | 
| if ((esp == 0) | VERBOSE(("cpu_stack_push_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend)); | 
| || (esp < length) | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
| || (esp - length <= sdp->u.seg.limit) | } | 
| || (esp > limit)) |  | 
| return FALSE; |  | 
| } else { |  | 
| /* expand-up stack */ |  | 
| if (esp == 0) { |  | 
| if ((sdp->d && (sdp->u.seg.segend != 0xffffffff)) |  | 
| || (!sdp->d && (sdp->u.seg.segend != 0xffff))) |  | 
| return FALSE; |  | 
 | } else { | } else { | 
| if ((esp < length) | /* expand-up stack */ | 
| || (esp - 1 > sdp->u.seg.limit)) | if (esp == 0) { | 
| return FALSE; | if ((sd->d && (sd->u.seg.segend != 0xffffffff)) | 
|  | || (!sd->d && (sd->u.seg.segend != 0xffff))) { | 
|  | VERBOSE(("cpu_stack_push_check: expand-up, esp = %08x, length = %08x", esp, length)); | 
|  | VERBOSE(("cpu_stack_push_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit)); | 
|  | VERBOSE(("cpu_stack_push_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend)); | 
|  | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
|  | } | 
|  | } else { | 
|  | if ((esp < length) | 
|  | || (esp - 1 > sd->u.seg.limit)) { | 
|  | VERBOSE(("cpu_stack_push_check: expand-up, esp = %08x, length = %08x", esp, length)); | 
|  | VERBOSE(("cpu_stack_push_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit)); | 
|  | VERBOSE(("cpu_stack_push_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend)); | 
|  | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
|  | } | 
|  | } | 
 | } | } | 
 | } | } | 
 | return TRUE; |  | 
 | } | } | 
 |  |  | 
| BOOL | void | 
| cpu_stack_pop_check(descriptor_t* sdp, DWORD esp, DWORD length) | cpu_stack_pop_check(UINT16 s, descriptor_t *sd, UINT32 esp, UINT length) | 
 | { | { | 
| DWORD limit; | UINT32 limit; | 
 |  |  | 
| if (!CPU_STAT_PM) | if (CPU_STAT_PM) { | 
| return TRUE; | if (!sd->valid || !sd->p) { | 
|  | VERBOSE(("cpu_stack_pop_check: valid = %d, present = %d", sd->valid, sd->p)); | 
|  | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
|  | } | 
|  | if (!sd->s || sd->u.seg.c || !sd->u.seg.wr) { | 
|  | VERBOSE(("cpu_stack_pop_check: s = %d, c = %d, wr", sd->s, sd->u.seg.c, sd->u.seg.wr)); | 
|  | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
|  | } | 
 |  |  | 
| if (!sdp->valid || !sdp->p) | if (!sd->d) { | 
| return FALSE; | limit = 0xffff; | 
| if (!sdp->s || sdp->u.seg.c || !sdp->u.seg.wr) | } else { | 
| return FALSE; | limit = 0xffffffff; | 
|  | } | 
| if (!sdp->d) { | if (sd->u.seg.ec) { | 
| esp &= 0xffff; | /* expand-down stack */ | 
| limit = 0xffff; | if ((esp == limit) | 
| } else { | || ((limit - esp) + 1 < length)) { | 
| limit = 0xffffffff; | VERBOSE(("cpu_stack_pop_check: expand-up, esp = %08x, length = %08x", esp, length)); | 
| } | VERBOSE(("cpu_stack_pop_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit)); | 
| if (sdp->u.seg.ec) { | VERBOSE(("cpu_stack_pop_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend)); | 
| /* expand-down stack */ | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
| if ((esp == limit) | } | 
| || ((limit - esp) + 1 < length)) | } else { | 
| return FALSE; | /* expand-up stack */ | 
| } else { | if ((esp == limit) | 
| /* expand-up stack */ | || (sd->u.seg.segend == 0) | 
| if ((esp == limit) | || (esp > sd->u.seg.limit) | 
| || (sdp->u.seg.segend == 0) | || ((sd->u.seg.limit - esp) + 1 < length)) { | 
| || (esp > sdp->u.seg.limit) | VERBOSE(("cpu_stack_pop_check: expand-up, esp = %08x, length = %08x", esp, length)); | 
| || ((sdp->u.seg.limit - esp) + 1 < length)) | VERBOSE(("cpu_stack_pop_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit)); | 
| return FALSE; | VERBOSE(("cpu_stack_pop_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend)); | 
|  | EXCEPTION(SS_EXCEPTION, s & 0xfffc); | 
|  | } | 
|  | } | 
 | } | } | 
 | return TRUE; |  | 
 | } | } | 
 |  |  | 
 |  |  | 
 |  | #if defined(IA32_SUPPORT_PREFETCH_QUEUE) | 
 |  | /* | 
 |  | * code prefetch | 
 |  | */ | 
 |  | #define CPU_PREFETCHQ_MASK      (CPU_PREFETCH_QUEUE_LENGTH - 1) | 
 |  |  | 
 |  | INLINE static MEMCALL void | 
 |  | cpu_prefetch(UINT32 address) | 
 |  | { | 
 |  | UINT offset = address & CPU_PREFETCHQ_MASK; | 
 |  | UINT length = CPU_PREFETCH_QUEUE_LENGTH - offset; | 
 |  |  | 
 |  | cpu_memory_access_la_region(address, length, CPU_PAGE_READ_CODE, CPU_STAT_USER_MODE, CPU_PREFETCHQ + offset); | 
 |  | CPU_PREFETCHQ_REMAIN = (SINT8)length; | 
 |  | } | 
 |  |  | 
 |  | INLINE static MEMCALL UINT8 | 
 |  | cpu_prefetchq(UINT32 address) | 
 |  | { | 
 |  | UINT8 v; | 
 |  |  | 
 |  | CPU_PREFETCHQ_REMAIN--; | 
 |  | v = CPU_PREFETCHQ[address & CPU_PREFETCHQ_MASK]; | 
 |  | return v; | 
 |  | } | 
 |  |  | 
 |  | INLINE static MEMCALL UINT16 | 
 |  | cpu_prefetchq_w(UINT32 address) | 
 |  | { | 
 |  | BYTE *p; | 
 |  | UINT16 v; | 
 |  |  | 
 |  | CPU_PREFETCHQ_REMAIN -= 2; | 
 |  | p = CPU_PREFETCHQ + (address & CPU_PREFETCHQ_MASK); | 
 |  | v = LOADINTELWORD(p); | 
 |  | return v; | 
 |  | } | 
 |  |  | 
 |  | INLINE static MEMCALL UINT32 | 
 |  | cpu_prefetchq_3(UINT32 address) | 
 |  | { | 
 |  | BYTE *p; | 
 |  | UINT32 v; | 
 |  |  | 
 |  | CPU_PREFETCHQ_REMAIN -= 3; | 
 |  | p = CPU_PREFETCHQ + (address & CPU_PREFETCHQ_MASK); | 
 |  | v = LOADINTELWORD(p); | 
 |  | v += ((UINT32)p[2]) << 16; | 
 |  | return v; | 
 |  | } | 
 |  |  | 
 |  | INLINE static MEMCALL UINT32 | 
 |  | cpu_prefetchq_d(UINT32 address) | 
 |  | { | 
 |  | BYTE *p; | 
 |  | UINT32 v; | 
 |  |  | 
 |  | CPU_PREFETCHQ_REMAIN -= 4; | 
 |  | p = CPU_PREFETCHQ + (address & CPU_PREFETCHQ_MASK); | 
 |  | v = LOADINTELDWORD(p); | 
 |  | return v; | 
 |  | } | 
 |  | #endif  /* IA32_SUPPORT_PREFETCH_QUEUE */ | 
 |  |  | 
 |  | #if defined(IA32_SUPPORT_DEBUG_REGISTER) | 
 |  | INLINE static void | 
 |  | check_memory_break_point(UINT32 address, UINT length, UINT rw) | 
 |  | { | 
 |  | int i; | 
 |  |  | 
 |  | if (CPU_STAT_BP && !(CPU_EFLAG & RF_FLAG)) { | 
 |  | for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) { | 
 |  | if ((CPU_STAT_BP & (1 << i)) | 
 |  | && (CPU_DR7_GET_RW(i) & rw) | 
 |  |  | 
 |  | && ((address <= CPU_DR(i) && address + length > CPU_DR(i)) | 
 |  | || (address > CPU_DR(i) && address < CPU_DR(i) + CPU_DR7_GET_LEN(i)))) { | 
 |  | CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_B(i); | 
 |  | } | 
 |  | } | 
 |  | } | 
 |  | } | 
 |  | #else | 
 |  | #define check_memory_break_point(address, length, rw) | 
 |  | #endif | 
 |  |  | 
 | /* | /* | 
 | * code fetch | * code fetch | 
 | */ | */ | 
| BYTE MEMCALL | UINT8 MEMCALL | 
| cpu_codefetch(DWORD offset) | cpu_codefetch(UINT32 offset) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
 |  |  | 
 | sd = &CPU_STAT_SREG(CPU_CS_INDEX); | sd = &CPU_STAT_SREG(CPU_CS_INDEX); | 
 | if (offset <= sd->u.seg.limit) { | if (offset <= sd->u.seg.limit) { | 
| addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | #if defined(IA32_SUPPORT_PREFETCH_QUEUE) | 
|  | if (CPU_PREFETCHQ_REMAIN <= 0) { | 
|  | cpu_prefetch(addr); | 
|  | } | 
|  | return cpu_prefetchq(addr); | 
|  | #else   /* !IA32_SUPPORT_PREFETCH_QUEUE */ | 
 | if (!CPU_STAT_PM) | if (!CPU_STAT_PM) | 
 | return cpu_memoryread(addr); | return cpu_memoryread(addr); | 
 | return cpu_lcmemoryread(addr); | return cpu_lcmemoryread(addr); | 
 |  | #endif  /* IA32_SUPPORT_PREFETCH_QUEUE */ | 
 | } | } | 
 | EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); | 
 | return 0;       /* compiler happy */ | return 0;       /* compiler happy */ | 
 | } | } | 
 |  |  | 
| WORD MEMCALL | UINT16 MEMCALL | 
| cpu_codefetch_w(DWORD offset) | cpu_codefetch_w(UINT32 offset) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
|  | #if defined(IA32_SUPPORT_PREFETCH_QUEUE) | 
|  | UINT16 v; | 
|  | #endif | 
 |  |  | 
 | sd = &CPU_STAT_SREG(CPU_CS_INDEX); | sd = &CPU_STAT_SREG(CPU_CS_INDEX); | 
 | if (offset <= sd->u.seg.limit - 1) { | if (offset <= sd->u.seg.limit - 1) { | 
| addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | #if defined(IA32_SUPPORT_PREFETCH_QUEUE) | 
|  | if (CPU_PREFETCHQ_REMAIN <= 0) { | 
|  | cpu_prefetch(addr); | 
|  | } | 
|  | if (CPU_PREFETCHQ_REMAIN >= 2) { | 
|  | return cpu_prefetchq_w(addr); | 
|  | } | 
|  |  | 
|  | v = cpu_prefetchq(addr); | 
|  | addr++; | 
|  | cpu_prefetch(addr); | 
|  | v += (UINT16)cpu_prefetchq(addr) << 8; | 
|  | return v; | 
|  | #else   /* !IA32_SUPPORT_PREFETCH_QUEUE */ | 
 | if (!CPU_STAT_PM) | if (!CPU_STAT_PM) | 
 | return cpu_memoryread_w(addr); | return cpu_memoryread_w(addr); | 
 | return cpu_lcmemoryread_w(addr); | return cpu_lcmemoryread_w(addr); | 
 |  | #endif  /* IA32_SUPPORT_PREFETCH_QUEUE */ | 
 | } | } | 
 | EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); | 
 | return 0;       /* compiler happy */ | return 0;       /* compiler happy */ | 
 | } | } | 
 |  |  | 
| DWORD MEMCALL | UINT32 MEMCALL | 
| cpu_codefetch_d(DWORD offset) | cpu_codefetch_d(UINT32 offset) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
|  | #if defined(IA32_SUPPORT_PREFETCH_QUEUE) | 
|  | UINT32 v; | 
|  | #endif | 
 |  |  | 
 | sd = &CPU_STAT_SREG(CPU_CS_INDEX); | sd = &CPU_STAT_SREG(CPU_CS_INDEX); | 
 | if (offset <= sd->u.seg.limit - 3) { | if (offset <= sd->u.seg.limit - 3) { | 
| addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | #if defined(IA32_SUPPORT_PREFETCH_QUEUE) | 
|  | if (CPU_PREFETCHQ_REMAIN <= 0) { | 
|  | cpu_prefetch(addr); | 
|  | } | 
|  | if (CPU_PREFETCHQ_REMAIN >= 4) { | 
|  | return cpu_prefetchq_d(addr); | 
|  | } else { | 
|  | switch (CPU_PREFETCHQ_REMAIN) { | 
|  | case 1: | 
|  | v = cpu_prefetchq(addr); | 
|  | addr++; | 
|  | cpu_prefetch(addr); | 
|  | v += (UINT32)cpu_prefetchq_3(addr) << 8; | 
|  | break; | 
|  |  | 
|  | case 2: | 
|  | v = cpu_prefetchq_w(addr); | 
|  | addr += 2; | 
|  | cpu_prefetch(addr); | 
|  | v += (UINT32)cpu_prefetchq_w(addr) << 16; | 
|  | break; | 
|  |  | 
|  | case 3: | 
|  | v = cpu_prefetchq_3(addr); | 
|  | addr += 3; | 
|  | cpu_prefetch(addr); | 
|  | v += (UINT32)cpu_prefetchq(addr) << 24; | 
|  | break; | 
|  | } | 
|  | return v; | 
|  | } | 
|  | #else   /* !IA32_SUPPORT_PREFETCH_QUEUE */ | 
 | if (!CPU_STAT_PM) | if (!CPU_STAT_PM) | 
 | return cpu_memoryread_d(addr); | return cpu_memoryread_d(addr); | 
 | return cpu_lcmemoryread_d(addr); | return cpu_lcmemoryread_d(addr); | 
 |  | #endif  /* IA32_SUPPORT_PREFETCH_QUEUE */ | 
 | } | } | 
 | EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); | 
 | return 0;       /* compiler happy */ | return 0;       /* compiler happy */ | 
| Line 289  cpu_codefetch_d(DWORD offset) | Line 458  cpu_codefetch_d(DWORD offset) | 
 | /* | /* | 
 | * virtual address -> linear address | * virtual address -> linear address | 
 | */ | */ | 
| BYTE MEMCALL | UINT8 MEMCALL | 
| cpu_vmemoryread(int idx, DWORD offset) | cpu_vmemoryread(int idx, UINT32 offset) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
 | int exc; | int exc; | 
 |  |  | 
 | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | 
| Line 310  cpu_vmemoryread(int idx, DWORD offset) | Line 479  cpu_vmemoryread(int idx, DWORD offset) | 
 | } else { | } else { | 
 | switch (sd->type) { | switch (sd->type) { | 
 | case 4: case 5: case 6: case 7: | case 4: case 5: case 6: case 7: | 
| if (offset <= sd->u.seg.limit) { | if (offset <= sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| if (offset > sd->u.seg.limit) { | if (offset > sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 | } | } | 
 | } | } | 
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | check_memory_break_point(addr, 1, CPU_DR7_RW_RO); | 
 | if (!CPU_STAT_PM) | if (!CPU_STAT_PM) | 
 | return cpu_memoryread(addr); | return cpu_memoryread(addr); | 
 | return cpu_lmemoryread(addr, CPU_STAT_USER_MODE); | return cpu_lmemoryread(addr, CPU_STAT_USER_MODE); | 
 |  |  | 
 |  | range_failure: | 
 |  | if (idx == CPU_SS_INDEX) { | 
 |  | exc = SS_EXCEPTION; | 
 |  | } else { | 
 |  | exc = GP_EXCEPTION; | 
 |  | } | 
 |  | VERBOSE(("cpu_vmemoryread: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit)); | 
 | err: | err: | 
 | EXCEPTION(exc, 0); | EXCEPTION(exc, 0); | 
 | return 0;       /* compiler happy */ | return 0;       /* compiler happy */ | 
 | } | } | 
 |  |  | 
| WORD MEMCALL | UINT16 MEMCALL | 
| cpu_vmemoryread_w(int idx, DWORD offset) | cpu_vmemoryread_w(int idx, UINT32 offset) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
 | int exc; | int exc; | 
 |  |  | 
 | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | 
| Line 361  cpu_vmemoryread_w(int idx, DWORD offset) | Line 528  cpu_vmemoryread_w(int idx, DWORD offset) | 
 | } else { | } else { | 
 | switch (sd->type) { | switch (sd->type) { | 
 | case 4: case 5: case 6: case 7: | case 4: case 5: case 6: case 7: | 
| if (offset - 1 <= sd->u.seg.limit) { | if (offset - 1 <= sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| if (offset > sd->u.seg.limit - 1) { | if (offset > sd->u.seg.limit - 1) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 | } | } | 
 | } | } | 
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | check_memory_break_point(addr, 2, CPU_DR7_RW_RO); | 
 | if (!CPU_STAT_PM) | if (!CPU_STAT_PM) | 
 | return cpu_memoryread_w(addr); | return cpu_memoryread_w(addr); | 
 | return cpu_lmemoryread_w(addr, CPU_STAT_USER_MODE); | return cpu_lmemoryread_w(addr, CPU_STAT_USER_MODE); | 
 |  |  | 
 |  | range_failure: | 
 |  | if (idx == CPU_SS_INDEX) { | 
 |  | exc = SS_EXCEPTION; | 
 |  | } else { | 
 |  | exc = GP_EXCEPTION; | 
 |  | } | 
 |  | VERBOSE(("cpu_vmemoryread_w: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit)); | 
 | err: | err: | 
 | EXCEPTION(exc, 0); | EXCEPTION(exc, 0); | 
 | return 0;       /* compiler happy */ | return 0;       /* compiler happy */ | 
 | } | } | 
 |  |  | 
| DWORD MEMCALL | UINT32 MEMCALL | 
| cpu_vmemoryread_d(int idx, DWORD offset) | cpu_vmemoryread_d(int idx, UINT32 offset) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
 | int exc; | int exc; | 
 |  |  | 
 | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | 
| Line 412  cpu_vmemoryread_d(int idx, DWORD offset) | Line 577  cpu_vmemoryread_d(int idx, DWORD offset) | 
 | } else { | } else { | 
 | switch (sd->type) { | switch (sd->type) { | 
 | case 4: case 5: case 6: case 7: | case 4: case 5: case 6: case 7: | 
| if (offset - 3 <= sd->u.seg.limit) { | if (offset - 3 <= sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| if (offset > sd->u.seg.limit - 3) { | if (offset > sd->u.seg.limit - 3) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 | } | } | 
 | } | } | 
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | check_memory_break_point(addr, 4, CPU_DR7_RW_RO); | 
 | if (!CPU_STAT_PM) | if (!CPU_STAT_PM) | 
 | return cpu_memoryread_d(addr); | return cpu_memoryread_d(addr); | 
 | return cpu_lmemoryread_d(addr, CPU_STAT_USER_MODE); | return cpu_lmemoryread_d(addr, CPU_STAT_USER_MODE); | 
 |  |  | 
 |  | range_failure: | 
 |  | if (idx == CPU_SS_INDEX) { | 
 |  | exc = SS_EXCEPTION; | 
 |  | } else { | 
 |  | exc = GP_EXCEPTION; | 
 |  | } | 
 |  | VERBOSE(("cpu_vmemoryread_d: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit)); | 
 | err: | err: | 
 | EXCEPTION(exc, 0); | EXCEPTION(exc, 0); | 
 | return 0;       /* compiler happy */ | return 0;       /* compiler happy */ | 
| Line 444  err: | Line 607  err: | 
 |  |  | 
 | /* vaddr memory write */ | /* vaddr memory write */ | 
 | void MEMCALL | void MEMCALL | 
| cpu_vmemorywrite(int idx, DWORD offset, BYTE val) | cpu_vmemorywrite(int idx, UINT32 offset, UINT8 val) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
 | int exc; | int exc; | 
 |  |  | 
 | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | 
| Line 464  cpu_vmemorywrite(int idx, DWORD offset, | Line 627  cpu_vmemorywrite(int idx, DWORD offset, | 
 | } else { | } else { | 
 | switch (sd->type) { | switch (sd->type) { | 
 | case 6: case 7: | case 6: case 7: | 
| if (offset <= sd->u.seg.limit) { | if (offset <= sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| if (offset > sd->u.seg.limit) { | if (offset > sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 | } | } | 
 | } | } | 
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | check_memory_break_point(addr, 1, CPU_DR7_RW_RW); | 
 | if (!CPU_STAT_PM) { | if (!CPU_STAT_PM) { | 
 | /* real mode */ | /* real mode */ | 
 | cpu_memorywrite(addr, val); | cpu_memorywrite(addr, val); | 
| Line 494  cpu_vmemorywrite(int idx, DWORD offset, | Line 648  cpu_vmemorywrite(int idx, DWORD offset, | 
 | } | } | 
 | return; | return; | 
 |  |  | 
 |  | range_failure: | 
 |  | if (idx == CPU_SS_INDEX) { | 
 |  | exc = SS_EXCEPTION; | 
 |  | } else { | 
 |  | exc = GP_EXCEPTION; | 
 |  | } | 
 |  | VERBOSE(("cpu_vmemorywrite: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit)); | 
 | err: | err: | 
 | EXCEPTION(exc, 0); | EXCEPTION(exc, 0); | 
 | } | } | 
 |  |  | 
 | void MEMCALL | void MEMCALL | 
| cpu_vmemorywrite_w(int idx, DWORD offset, WORD val) | cpu_vmemorywrite_w(int idx, UINT32 offset, UINT16 val) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
 | int exc; | int exc; | 
 |  |  | 
 | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | 
| Line 519  cpu_vmemorywrite_w(int idx, DWORD offset | Line 680  cpu_vmemorywrite_w(int idx, DWORD offset | 
 | } else { | } else { | 
 | switch (sd->type) { | switch (sd->type) { | 
 | case 6: case 7: | case 6: case 7: | 
| if (offset - 1 <= sd->u.seg.limit) { | if (offset - 1 <= sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| if (offset > sd->u.seg.limit - 1) { | if (offset > sd->u.seg.limit - 1) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 | } | } | 
 | } | } | 
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | check_memory_break_point(addr, 2, CPU_DR7_RW_RW); | 
 | if (!CPU_STAT_PM) { | if (!CPU_STAT_PM) { | 
 | /* real mode */ | /* real mode */ | 
 | cpu_memorywrite_w(addr, val); | cpu_memorywrite_w(addr, val); | 
| Line 549  cpu_vmemorywrite_w(int idx, DWORD offset | Line 701  cpu_vmemorywrite_w(int idx, DWORD offset | 
 | } | } | 
 | return; | return; | 
 |  |  | 
 |  | range_failure: | 
 |  | if (idx == CPU_SS_INDEX) { | 
 |  | exc = SS_EXCEPTION; | 
 |  | } else { | 
 |  | exc = GP_EXCEPTION; | 
 |  | } | 
 |  | VERBOSE(("cpu_vmemorywrite_w: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit)); | 
 | err: | err: | 
 | EXCEPTION(exc, 0); | EXCEPTION(exc, 0); | 
 | } | } | 
 |  |  | 
 | void MEMCALL | void MEMCALL | 
| cpu_vmemorywrite_d(int idx, DWORD offset, DWORD val) | cpu_vmemorywrite_d(int idx, UINT32 offset, UINT32 val) | 
 | { | { | 
 | descriptor_t *sd; | descriptor_t *sd; | 
| DWORD addr; | UINT32 addr; | 
 | int exc; | int exc; | 
 |  |  | 
 | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | __ASSERT((unsigned int)idx < CPU_SEGREG_NUM); | 
| Line 574  cpu_vmemorywrite_d(int idx, DWORD offset | Line 733  cpu_vmemorywrite_d(int idx, DWORD offset | 
 | } else { | } else { | 
 | switch (sd->type) { | switch (sd->type) { | 
 | case 6: case 7: | case 6: case 7: | 
| if (offset - 3 <= sd->u.seg.limit) { | if (offset - 3 <= sd->u.seg.limit) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| if (offset > sd->u.seg.limit - 3) { | if (offset > sd->u.seg.limit - 3) | 
| if (idx == CPU_SS_INDEX) | goto range_failure; | 
| exc = SS_EXCEPTION; |  | 
| else |  | 
| exc = GP_EXCEPTION; |  | 
| goto err; |  | 
| } |  | 
 | break; | break; | 
 | } | } | 
 | } | } | 
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = sd->u.seg.segbase + offset; | 
|  | check_memory_break_point(addr, 4, CPU_DR7_RW_RW); | 
 | if (!CPU_STAT_PM) { | if (!CPU_STAT_PM) { | 
 | /* real mode */ | /* real mode */ | 
 | cpu_memorywrite_d(addr, val); | cpu_memorywrite_d(addr, val); | 
| Line 604  cpu_vmemorywrite_d(int idx, DWORD offset | Line 754  cpu_vmemorywrite_d(int idx, DWORD offset | 
 | } | } | 
 | return; | return; | 
 |  |  | 
 |  | range_failure: | 
 |  | if (idx == CPU_SS_INDEX) { | 
 |  | exc = SS_EXCEPTION; | 
 |  | } else { | 
 |  | exc = GP_EXCEPTION; | 
 |  | } | 
 |  | VERBOSE(("cpu_vmemorywrite_d: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit)); | 
 | err: | err: | 
 | EXCEPTION(exc, 0); | EXCEPTION(exc, 0); | 
 | } | } |