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| version 1.22, 2008/03/22 04:03:07 | version 1.30, 2012/01/08 11:36:47 |
|---|---|
| Line 1 | Line 1 |
| /* $Id$ */ | |
| /* | /* |
| * Copyright (c) 2002-2004 NONAKA Kimihiro | * Copyright (c) 2002-2004 NONAKA Kimihiro |
| * All rights reserved. | * All rights reserved. |
| Line 66 check_limit_upstairs(descriptor_t *sdp, | Line 64 check_limit_upstairs(descriptor_t *sdp, |
| if (!SEG_IS_32BIT(sdp)) { | if (!SEG_IS_32BIT(sdp)) { |
| if ((len > limit) /* len check */ | if ((len > limit) /* len check */ |
| || (end > limit)) { /* [1] */ | || (end > limit)) { /* [1] */ |
| return 0; | goto exc; |
| } | } |
| } else { | } else { |
| sdp->flag |= CPU_DESC_FLAG_WHOLEADR; | sdp->flag |= CPU_DESC_FLAG_WHOLEADR; |
| Line 90 check_limit_upstairs(descriptor_t *sdp, | Line 88 check_limit_upstairs(descriptor_t *sdp, |
| || (end < offset) /* wrap check */ | || (end < offset) /* wrap check */ |
| || (offset < sdp->u.seg.limit) /* [1] */ | || (offset < sdp->u.seg.limit) /* [1] */ |
| || (end > limit)) { /* [2] */ | || (end > limit)) { /* [2] */ |
| return 0; | goto exc; |
| } | } |
| } | } |
| } else { | } else { |
| Line 109 check_limit_upstairs(descriptor_t *sdp, | Line 107 check_limit_upstairs(descriptor_t *sdp, |
| if (!SEG_IS_32BIT(sdp)) { | if (!SEG_IS_32BIT(sdp)) { |
| if ((len > limit) /* len check */ | if ((len > limit) /* len check */ |
| || (offset + len > limit)) { /* [1] */ | || (offset + len > limit)) { /* [1] */ |
| return 0; | goto exc; |
| } | } |
| } else { | } else { |
| sdp->flag |= CPU_DESC_FLAG_WHOLEADR; | sdp->flag |= CPU_DESC_FLAG_WHOLEADR; |
| Line 129 check_limit_upstairs(descriptor_t *sdp, | Line 127 check_limit_upstairs(descriptor_t *sdp, |
| */ | */ |
| if ((len > sdp->u.seg.limit) /* len check */ | if ((len > sdp->u.seg.limit) /* len check */ |
| || (end < offset) /* wrap check */ | || (end < offset) /* wrap check */ |
| || (end > sdp->u.seg.limit)) { /* [1] */ | || (end > sdp->u.seg.limit + 1)) { /* [1] */ |
| return 0; | goto exc; |
| } | } |
| } | } |
| } | } |
| return 1; /* Ok! */ | return 1; /* Ok! */ |
| exc: | |
| VERBOSE(("check_limit_upstairs: check failure: offset = 0x%08x, len = %d", offset, len + 1)); | |
| #if defined(DEBUG) | |
| segdesc_dump(sdp); | |
| #endif | |
| return 0; | |
| } | } |
| static void MEMCALL | static void MEMCALL |
| Line 172 cpu_memoryread_check(descriptor_t *sdp, | Line 177 cpu_memoryread_check(descriptor_t *sdp, |
| return; | return; |
| exc: | exc: |
| VERBOSE(("cpu_memoryread_check: check failure.")); | VERBOSE(("cpu_memoryread_check: check failure: offset = 0x%08x, len = %d", offset, len)); |
| VERBOSE(("offset = 0x%08x, len = %d", offset, len)); | |
| #if defined(DEBUG) | #if defined(DEBUG) |
| segdesc_dump(sdp); | segdesc_dump(sdp); |
| #endif | #endif |
| Line 212 cpu_memorywrite_check(descriptor_t *sdp, | Line 216 cpu_memorywrite_check(descriptor_t *sdp, |
| return; | return; |
| exc: | exc: |
| VERBOSE(("cpu_memorywrite_check: check failure.")); | VERBOSE(("cpu_memorywrite_check: check failure: offset = 0x%08x, len = %d", offset, len)); |
| VERBOSE(("offset = 0x%08x, len = %d", offset, len)); | |
| #if defined(DEBUG) | #if defined(DEBUG) |
| segdesc_dump(sdp); | segdesc_dump(sdp); |
| #endif | #endif |
| EXCEPTION(e, 0); | EXCEPTION(e, 0); |
| } | } |
| void | void MEMCALL |
| cpu_stack_push_check(UINT16 s, descriptor_t *sdp, UINT32 sp, UINT len) | cpu_stack_push_check(UINT16 s, descriptor_t *sdp, UINT32 sp, UINT len) |
| { | { |
| UINT32 limit; | UINT32 limit; |
| Line 229 cpu_stack_push_check(UINT16 s, descripto | Line 232 cpu_stack_push_check(UINT16 s, descripto |
| __ASSERT(sdp != NULL); | __ASSERT(sdp != NULL); |
| __ASSERT(len > 0); | __ASSERT(len > 0); |
| len--; | |
| if (!SEG_IS_VALID(sdp) | if (!SEG_IS_VALID(sdp) |
| || !SEG_IS_PRESENT(sdp) | || !SEG_IS_PRESENT(sdp) |
| || SEG_IS_SYSTEM(sdp) | || SEG_IS_SYSTEM(sdp) |
| Line 237 cpu_stack_push_check(UINT16 s, descripto | Line 242 cpu_stack_push_check(UINT16 s, descripto |
| goto exc; | goto exc; |
| } | } |
| len--; | |
| start = sp - len; | start = sp - len; |
| limit = SEG_IS_32BIT(sdp) ? 0xffffffff : 0x0000ffff; | limit = SEG_IS_32BIT(sdp) ? 0xffffffff : 0x0000ffff; |
| Line 322 cpu_stack_push_check(UINT16 s, descripto | Line 326 cpu_stack_push_check(UINT16 s, descripto |
| */ | */ |
| if ((len > sdp->u.seg.limit) /* len check */ | if ((len > sdp->u.seg.limit) /* len check */ |
| || (start > sp) /* wrap check */ | || (start > sp) /* wrap check */ |
| || (sp > sdp->u.seg.limit)) { /* [1] */ | || (sp > sdp->u.seg.limit + 1)) { /* [1] */ |
| goto exc; | goto exc; |
| } | } |
| } | } |
| Line 330 cpu_stack_push_check(UINT16 s, descripto | Line 334 cpu_stack_push_check(UINT16 s, descripto |
| return; | return; |
| exc: | exc: |
| VERBOSE(("cpu_stack_push_check: check failure.")); | VERBOSE(("cpu_stack_push_check: check failure: selector = %04x, sp = 0x%08x, len = %d", s, sp, len)); |
| VERBOSE(("s = 0x%04x, sp = 0x%08x, len = %d", s, sp, len)); | |
| #if defined(DEBUG) | #if defined(DEBUG) |
| segdesc_dump(sdp); | segdesc_dump(sdp); |
| #endif | #endif |
| EXCEPTION(SS_EXCEPTION, s & 0xfffc); | EXCEPTION(SS_EXCEPTION, s & 0xfffc); |
| } | } |
| void | void MEMCALL |
| cpu_stack_pop_check(UINT16 s, descriptor_t *sdp, UINT32 sp, UINT len) | cpu_stack_pop_check(UINT16 s, descriptor_t *sdp, UINT32 sp, UINT len) |
| { | { |
| Line 358 cpu_stack_pop_check(UINT16 s, descriptor | Line 361 cpu_stack_pop_check(UINT16 s, descriptor |
| return; | return; |
| exc: | exc: |
| VERBOSE(("cpu_stack_pop_check: check failure.")); | VERBOSE(("cpu_stack_pop_check: check failure: selector = %04x, sp = 0x%08x, len = %d", s, sp, len)); |
| VERBOSE(("s = 0x%04x, sp = 0x%08x, len = %d", s, sp, len)); | |
| #if defined(DEBUG) | #if defined(DEBUG) |
| segdesc_dump(sdp); | segdesc_dump(sdp); |
| #endif | #endif |
| EXCEPTION(SS_EXCEPTION, s & 0xfffc); | EXCEPTION(SS_EXCEPTION, s & 0xfffc); |
| } | } |
| #if defined(IA32_SUPPORT_DEBUG_REGISTER) | |
| static INLINE void | |
| check_memory_break_point(UINT32 address, UINT length, UINT rw) | |
| { | |
| int i; | |
| if (CPU_STAT_BP && !(CPU_EFLAG & RF_FLAG)) { | |
| for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) { | |
| if ((CPU_STAT_BP & (1 << i)) | |
| && (CPU_DR7_GET_RW(i) & rw) | |
| && ((address <= CPU_DR(i) && address + length > CPU_DR(i)) | |
| || (address > CPU_DR(i) && address < CPU_DR(i) + CPU_DR7_GET_LEN(i)))) { | |
| CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_B(i); | |
| } | |
| } | |
| } | |
| } | |
| #else | |
| #define check_memory_break_point(address, length, rw) | |
| #endif | |
| /* | /* |
| * code fetch | * code fetch |
| Line 399 cpu_codefetch(UINT32 offset) | Line 379 cpu_codefetch(UINT32 offset) |
| { | { |
| descriptor_t *sdp; | descriptor_t *sdp; |
| UINT32 addr; | UINT32 addr; |
| #if defined(IA32_SUPPORT_TLB) | |
| TLB_ENTRY_T *ep; | TLB_ENTRY_T *ep; |
| #endif | |
| sdp = &CPU_CS_DESC; | sdp = &CPU_CS_DESC; |
| if (offset <= sdp->u.seg.limit) { | if (offset <= sdp->u.seg.limit) { |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread(addr); | return cpu_memoryread(addr); |
| #if defined(IA32_SUPPORT_TLB) | |
| ep = tlb_lookup(addr, ucrw); | ep = tlb_lookup(addr, ucrw); |
| if (ep != NULL && ep->memp != NULL) { | if (ep != NULL && ep->memp != NULL) { |
| return ep->memp[addr & 0xfff]; | return ep->memp[addr & 0xfff]; |
| } | } |
| #endif | |
| return cpu_linear_memory_read_b(addr, ucrw); | return cpu_linear_memory_read_b(addr, ucrw); |
| } | } |
| EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); |
| Line 425 cpu_codefetch_w(UINT32 offset) | Line 401 cpu_codefetch_w(UINT32 offset) |
| { | { |
| descriptor_t *sdp; | descriptor_t *sdp; |
| UINT32 addr; | UINT32 addr; |
| #if defined(IA32_SUPPORT_TLB) | |
| TLB_ENTRY_T *ep; | TLB_ENTRY_T *ep; |
| UINT16 value; | UINT16 value; |
| #endif | |
| sdp = &CPU_CS_DESC; | sdp = &CPU_CS_DESC; |
| if (offset <= sdp->u.seg.limit - 1) { | if (offset <= sdp->u.seg.limit - 1) { |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread_w(addr); | return cpu_memoryread_w(addr); |
| #if defined(IA32_SUPPORT_TLB) | |
| ep = tlb_lookup(addr, ucrw); | ep = tlb_lookup(addr, ucrw); |
| if (ep != NULL && ep->memp != NULL) { | if (ep != NULL && ep->memp != NULL) { |
| if ((addr + 1) & 0x00000fff) { | if ((addr + 1) & 0x00000fff) { |
| Line 448 cpu_codefetch_w(UINT32 offset) | Line 421 cpu_codefetch_w(UINT32 offset) |
| return value; | return value; |
| } | } |
| } | } |
| #endif | |
| return cpu_linear_memory_read_w(addr, ucrw); | return cpu_linear_memory_read_w(addr, ucrw); |
| } | } |
| EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); |
| Line 460 cpu_codefetch_d(UINT32 offset) | Line 432 cpu_codefetch_d(UINT32 offset) |
| { | { |
| descriptor_t *sdp; | descriptor_t *sdp; |
| UINT32 addr; | UINT32 addr; |
| #if defined(IA32_SUPPORT_TLB) | |
| TLB_ENTRY_T *ep[2]; | TLB_ENTRY_T *ep[2]; |
| UINT32 value; | UINT32 value; |
| UINT remain; | UINT remain; |
| #endif | |
| sdp = &CPU_CS_DESC; | sdp = &CPU_CS_DESC; |
| if (offset <= sdp->u.seg.limit - 3) { | if (offset <= sdp->u.seg.limit - 3) { |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread_d(addr); | return cpu_memoryread_d(addr); |
| #if defined(IA32_SUPPORT_TLB) | |
| ep[0] = tlb_lookup(addr, ucrw); | ep[0] = tlb_lookup(addr, ucrw); |
| if (ep[0] != NULL && ep[0]->memp != NULL) { | if (ep[0] != NULL && ep[0]->memp != NULL) { |
| remain = 0x1000 - (addr & 0xfff); | remain = 0x1000 - (addr & 0xfff); |
| Line 505 cpu_codefetch_d(UINT32 offset) | Line 474 cpu_codefetch_d(UINT32 offset) |
| return value; | return value; |
| } | } |
| } | } |
| #endif | |
| return cpu_linear_memory_read_d(addr, ucrw); | return cpu_linear_memory_read_d(addr, ucrw); |
| } | } |
| EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); |
| Line 590 cpu_vmemoryread_q(int idx, UINT32 offset | Line 558 cpu_vmemoryread_q(int idx, UINT32 offset |
| goto range_failure; | goto range_failure; |
| } | } |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| check_memory_break_point(addr, 8, CPU_DR7_RW_RO); | |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread_q(addr); | return cpu_memoryread_q(addr); |
| return cpu_linear_memory_read_q(addr, CPU_PAGE_READ_DATA | CPU_STAT_USER_MODE); | return cpu_linear_memory_read_q(addr, CPU_PAGE_READ_DATA | CPU_STAT_USER_MODE); |
| Line 626 cpu_vmemorywrite_q(int idx, UINT32 offse | Line 593 cpu_vmemorywrite_q(int idx, UINT32 offse |
| goto range_failure; | goto range_failure; |
| } | } |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| check_memory_break_point(addr, 8, CPU_DR7_RW_RW); | |
| if (!CPU_STAT_PAGING) { | if (!CPU_STAT_PAGING) { |
| cpu_memorywrite_q(addr, value); | cpu_memorywrite_q(addr, value); |
| } else { | } else { |
| Line 664 cpu_vmemoryread_f(int idx, UINT32 offset | Line 630 cpu_vmemoryread_f(int idx, UINT32 offset |
| goto range_failure; | goto range_failure; |
| } | } |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| check_memory_break_point(addr, 10, CPU_DR7_RW_RO); | |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread_f(addr); | return cpu_memoryread_f(addr); |
| return cpu_linear_memory_read_f(addr, CPU_PAGE_READ_DATA | CPU_PAGE_READ_DATA | CPU_STAT_USER_MODE); | return cpu_linear_memory_read_f(addr, CPU_PAGE_READ_DATA | CPU_PAGE_READ_DATA | CPU_STAT_USER_MODE); |
| Line 704 cpu_vmemorywrite_f(int idx, UINT32 offse | Line 669 cpu_vmemorywrite_f(int idx, UINT32 offse |
| goto range_failure; | goto range_failure; |
| } | } |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| check_memory_break_point(addr, 10, CPU_DR7_RW_RW); | |
| if (!CPU_STAT_PAGING) { | if (!CPU_STAT_PAGING) { |
| cpu_memorywrite_f(addr, value); | cpu_memorywrite_f(addr, value); |
| } else { | } else { |