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| version 1.23, 2011/01/15 17:17:23 | version 1.25, 2012/01/08 08:02:50 |
|---|---|
| Line 238 cpu_stack_push_check(UINT16 s, descripto | Line 238 cpu_stack_push_check(UINT16 s, descripto |
| len--; | len--; |
| start = sp - len; | start = sp - len; |
| limit = SEG_IS_32BIT(sdp) ? 0xffffffff : 0x0000ffff; | limit = SEG_IS_32BIT(sdp) ? 0xffffffff : 0x0000ffff; |
| VERBOSE(("cpu_stack_push_check: start=0x%08x, limit=0x%08x", start, limit)); | |
| if (SEG_IS_EXPANDDOWN_DATA(sdp)) { | if (SEG_IS_EXPANDDOWN_DATA(sdp)) { |
| /* expand-down stack */ | /* expand-down stack */ |
| VERBOSE(("cpu_stack_push_check: expand-down stack")); | |
| if (!SEG_IS_32BIT(sdp)) { | if (!SEG_IS_32BIT(sdp)) { |
| if (sp > limit) { /* [*] */ | if (sp > limit) { /* [*] */ |
| goto exc; | goto exc; |
| Line 285 cpu_stack_push_check(UINT16 s, descripto | Line 287 cpu_stack_push_check(UINT16 s, descripto |
| } | } |
| } else { | } else { |
| /* expand-up stack */ | /* expand-up stack */ |
| VERBOSE(("cpu_stack_push_check: expand-up stack")); | |
| if (sdp->u.seg.limit == limit) { | if (sdp->u.seg.limit == limit) { |
| /* | /* |
| * 32bit 16bit | * 32bit 16bit |
| Line 329 cpu_stack_push_check(UINT16 s, descripto | Line 332 cpu_stack_push_check(UINT16 s, descripto |
| exc: | exc: |
| VERBOSE(("cpu_stack_push_check: check failure.")); | VERBOSE(("cpu_stack_push_check: check failure.")); |
| VERBOSE(("s = 0x%04x, sp = 0x%08x, len = %d", s, sp, len)); | VERBOSE(("cpu_stack_push_check: selector = %04x, sp = 0x%08x, len = %d", s, sp, len + 1)); |
| #if defined(DEBUG) | #if defined(DEBUG) |
| segdesc_dump(sdp); | segdesc_dump(sdp); |
| #endif | #endif |
| Line 397 cpu_codefetch(UINT32 offset) | Line 400 cpu_codefetch(UINT32 offset) |
| { | { |
| descriptor_t *sdp; | descriptor_t *sdp; |
| UINT32 addr; | UINT32 addr; |
| #if defined(IA32_SUPPORT_TLB) | |
| TLB_ENTRY_T *ep; | TLB_ENTRY_T *ep; |
| #endif | |
| sdp = &CPU_CS_DESC; | sdp = &CPU_CS_DESC; |
| if (offset <= sdp->u.seg.limit) { | if (offset <= sdp->u.seg.limit) { |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread(addr); | return cpu_memoryread(addr); |
| #if defined(IA32_SUPPORT_TLB) | |
| ep = tlb_lookup(addr, ucrw); | ep = tlb_lookup(addr, ucrw); |
| if (ep != NULL && ep->memp != NULL) { | if (ep != NULL && ep->memp != NULL) { |
| return ep->memp[addr & 0xfff]; | return ep->memp[addr & 0xfff]; |
| } | } |
| #endif | |
| return cpu_linear_memory_read_b(addr, ucrw); | return cpu_linear_memory_read_b(addr, ucrw); |
| } | } |
| EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); |
| Line 423 cpu_codefetch_w(UINT32 offset) | Line 422 cpu_codefetch_w(UINT32 offset) |
| { | { |
| descriptor_t *sdp; | descriptor_t *sdp; |
| UINT32 addr; | UINT32 addr; |
| #if defined(IA32_SUPPORT_TLB) | |
| TLB_ENTRY_T *ep; | TLB_ENTRY_T *ep; |
| UINT16 value; | UINT16 value; |
| #endif | |
| sdp = &CPU_CS_DESC; | sdp = &CPU_CS_DESC; |
| if (offset <= sdp->u.seg.limit - 1) { | if (offset <= sdp->u.seg.limit - 1) { |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread_w(addr); | return cpu_memoryread_w(addr); |
| #if defined(IA32_SUPPORT_TLB) | |
| ep = tlb_lookup(addr, ucrw); | ep = tlb_lookup(addr, ucrw); |
| if (ep != NULL && ep->memp != NULL) { | if (ep != NULL && ep->memp != NULL) { |
| if ((addr + 1) & 0x00000fff) { | if ((addr + 1) & 0x00000fff) { |
| Line 446 cpu_codefetch_w(UINT32 offset) | Line 442 cpu_codefetch_w(UINT32 offset) |
| return value; | return value; |
| } | } |
| } | } |
| #endif | |
| return cpu_linear_memory_read_w(addr, ucrw); | return cpu_linear_memory_read_w(addr, ucrw); |
| } | } |
| EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); |
| Line 458 cpu_codefetch_d(UINT32 offset) | Line 453 cpu_codefetch_d(UINT32 offset) |
| { | { |
| descriptor_t *sdp; | descriptor_t *sdp; |
| UINT32 addr; | UINT32 addr; |
| #if defined(IA32_SUPPORT_TLB) | |
| TLB_ENTRY_T *ep[2]; | TLB_ENTRY_T *ep[2]; |
| UINT32 value; | UINT32 value; |
| UINT remain; | UINT remain; |
| #endif | |
| sdp = &CPU_CS_DESC; | sdp = &CPU_CS_DESC; |
| if (offset <= sdp->u.seg.limit - 3) { | if (offset <= sdp->u.seg.limit - 3) { |
| addr = sdp->u.seg.segbase + offset; | addr = sdp->u.seg.segbase + offset; |
| if (!CPU_STAT_PAGING) | if (!CPU_STAT_PAGING) |
| return cpu_memoryread_d(addr); | return cpu_memoryread_d(addr); |
| #if defined(IA32_SUPPORT_TLB) | |
| ep[0] = tlb_lookup(addr, ucrw); | ep[0] = tlb_lookup(addr, ucrw); |
| if (ep[0] != NULL && ep[0]->memp != NULL) { | if (ep[0] != NULL && ep[0]->memp != NULL) { |
| remain = 0x1000 - (addr & 0xfff); | remain = 0x1000 - (addr & 0xfff); |
| Line 503 cpu_codefetch_d(UINT32 offset) | Line 495 cpu_codefetch_d(UINT32 offset) |
| return value; | return value; |
| } | } |
| } | } |
| #endif | |
| return cpu_linear_memory_read_d(addr, ucrw); | return cpu_linear_memory_read_d(addr, ucrw); |
| } | } |
| EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); |