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| version 1.7, 2004/01/25 07:53:08 | version 1.9, 2004/02/04 13:24:35 |
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| Line 31 | Line 31 |
| #include "cpu.h" | #include "cpu.h" |
| #include "memory.h" | #include "memory.h" |
| // static BYTE *cpumem = 0; | |
| // static DWORD extmem_size = 0; | |
| #define cpumem i386core.e.ext | #define cpumem i386core.e.ext |
| #define extmem_size i386core.e.extsize | #define extmem_size i386core.e.extsize |
| Line 41 | Line 38 |
| /* | /* |
| * initialize 1MB-16MB memory | * initialize 1MB-16MB memory |
| */ | */ |
| int | int |
| init_cpumem(UINT8 usemem) | init_cpumem(UINT8 usemem) |
| { | { |
| Line 270 cpu_stack_pop_check(descriptor_t* sdp, D | Line 266 cpu_stack_pop_check(descriptor_t* sdp, D |
| } | } |
| #define AS32_NOCHECK | |
| #undef OVERRUN_CHECK | #undef OVERRUN_CHECK |
| #if defined(OVERRUN_CHECK) | #if defined(OVERRUN_CHECK) |
| Line 289 cpu_codefetch(DWORD offset) | Line 284 cpu_codefetch(DWORD offset) |
| DWORD addr; | DWORD addr; |
| sd = &CPU_STAT_SREG(CPU_CS_INDEX); | sd = &CPU_STAT_SREG(CPU_CS_INDEX); |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (offset <= sd->u.seg.limit) { | if (offset <= sd->u.seg.limit) { |
| addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; | addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; |
| if (!CPU_STAT_PM) | if (!CPU_STAT_PM) |
| Line 310 cpu_codefetch_w(DWORD offset) | Line 301 cpu_codefetch_w(DWORD offset) |
| DWORD addr; | DWORD addr; |
| sd = &CPU_STAT_SREG(CPU_CS_INDEX); | sd = &CPU_STAT_SREG(CPU_CS_INDEX); |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (offset <= sd->u.seg.limit - 1) { | if (offset <= sd->u.seg.limit - 1) { |
| addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; | addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; |
| if (!CPU_STAT_PM) | if (!CPU_STAT_PM) |
| Line 331 cpu_codefetch_d(DWORD offset) | Line 318 cpu_codefetch_d(DWORD offset) |
| DWORD addr; | DWORD addr; |
| sd = &CPU_STAT_SREG(CPU_CS_INDEX); | sd = &CPU_STAT_SREG(CPU_CS_INDEX); |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (offset <= sd->u.seg.limit - 3) { | if (offset <= sd->u.seg.limit - 3) { |
| addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; | addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset; |
| if (!CPU_STAT_PM) | if (!CPU_STAT_PM) |
| Line 364 cpu_vmemoryread(int idx, DWORD offset) | Line 347 cpu_vmemoryread(int idx, DWORD offset) |
| goto err; | goto err; |
| } | } |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (!(sd->flag & CPU_DESC_FLAG_READABLE)) { | if (!(sd->flag & CPU_DESC_FLAG_READABLE)) { |
| cpu_memoryread_check(sd, offset, 1, | cpu_memoryread_check(sd, offset, 1, |
| (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); | (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); |
| Line 397 cpu_vmemoryread(int idx, DWORD offset) | Line 376 cpu_vmemoryread(int idx, DWORD offset) |
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = CPU_STAT_SREGBASE(idx) + offset; |
| if (!CPU_STAT_PM) | if (!CPU_STAT_PM) |
| return cpu_memoryread(addr); | return cpu_memoryread(addr); |
| return cpu_lmemoryread(addr); | return cpu_lmemoryread(addr, CPU_IS_USER_MODE()); |
| err: | err: |
| EXCEPTION(exc, 0); | EXCEPTION(exc, 0); |
| Line 419 cpu_vmemoryread_w(int idx, DWORD offset) | Line 398 cpu_vmemoryread_w(int idx, DWORD offset) |
| goto err; | goto err; |
| } | } |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (!(sd->flag & CPU_DESC_FLAG_READABLE)) { | if (!(sd->flag & CPU_DESC_FLAG_READABLE)) { |
| cpu_memoryread_check(sd, offset, 2, | cpu_memoryread_check(sd, offset, 2, |
| (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); | (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); |
| Line 452 cpu_vmemoryread_w(int idx, DWORD offset) | Line 427 cpu_vmemoryread_w(int idx, DWORD offset) |
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = CPU_STAT_SREGBASE(idx) + offset; |
| if (!CPU_STAT_PM) | if (!CPU_STAT_PM) |
| return cpu_memoryread_w(addr); | return cpu_memoryread_w(addr); |
| return cpu_lmemoryread_w(addr); | return cpu_lmemoryread_w(addr, CPU_IS_USER_MODE()); |
| err: | err: |
| EXCEPTION(exc, 0); | EXCEPTION(exc, 0); |
| Line 474 cpu_vmemoryread_d(int idx, DWORD offset) | Line 449 cpu_vmemoryread_d(int idx, DWORD offset) |
| goto err; | goto err; |
| } | } |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (!(sd->flag & CPU_DESC_FLAG_READABLE)) { | if (!(sd->flag & CPU_DESC_FLAG_READABLE)) { |
| cpu_memoryread_check(sd, offset, 4, | cpu_memoryread_check(sd, offset, 4, |
| (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); | (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); |
| Line 507 cpu_vmemoryread_d(int idx, DWORD offset) | Line 478 cpu_vmemoryread_d(int idx, DWORD offset) |
| addr = CPU_STAT_SREGBASE(idx) + offset; | addr = CPU_STAT_SREGBASE(idx) + offset; |
| if (!CPU_STAT_PM) | if (!CPU_STAT_PM) |
| return cpu_memoryread_d(addr); | return cpu_memoryread_d(addr); |
| return cpu_lmemoryread_d(addr); | return cpu_lmemoryread_d(addr, CPU_IS_USER_MODE()); |
| err: | err: |
| EXCEPTION(exc, 0); | EXCEPTION(exc, 0); |
| Line 530 cpu_vmemorywrite(int idx, DWORD offset, | Line 501 cpu_vmemorywrite(int idx, DWORD offset, |
| goto err; | goto err; |
| } | } |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (!(sd->flag & CPU_DESC_FLAG_WRITABLE)) { | if (!(sd->flag & CPU_DESC_FLAG_WRITABLE)) { |
| cpu_memorywrite_check(sd, offset, 1, | cpu_memorywrite_check(sd, offset, 1, |
| (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); | (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); |
| Line 566 cpu_vmemorywrite(int idx, DWORD offset, | Line 533 cpu_vmemorywrite(int idx, DWORD offset, |
| cpu_memorywrite(addr, val); | cpu_memorywrite(addr, val); |
| } else { | } else { |
| /* protected mode */ | /* protected mode */ |
| cpu_lmemorywrite(addr, val); | cpu_lmemorywrite(addr, val, CPU_IS_USER_MODE()); |
| } | } |
| return; | return; |
| Line 589 cpu_vmemorywrite_w(int idx, DWORD offset | Line 556 cpu_vmemorywrite_w(int idx, DWORD offset |
| goto err; | goto err; |
| } | } |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (!(sd->flag & CPU_DESC_FLAG_WRITABLE)) { | if (!(sd->flag & CPU_DESC_FLAG_WRITABLE)) { |
| cpu_memorywrite_check(sd, offset, 2, | cpu_memorywrite_check(sd, offset, 2, |
| (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); | (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); |
| Line 625 cpu_vmemorywrite_w(int idx, DWORD offset | Line 588 cpu_vmemorywrite_w(int idx, DWORD offset |
| cpu_memorywrite_w(addr, val); | cpu_memorywrite_w(addr, val); |
| } else { | } else { |
| /* protected mode */ | /* protected mode */ |
| cpu_lmemorywrite_w(addr, val); | cpu_lmemorywrite_w(addr, val, CPU_IS_USER_MODE()); |
| } | } |
| return; | return; |
| Line 648 cpu_vmemorywrite_d(int idx, DWORD offset | Line 611 cpu_vmemorywrite_d(int idx, DWORD offset |
| goto err; | goto err; |
| } | } |
| #ifndef AS32_NOCHECK | |
| if (!CPU_INST_AS32) | |
| offset &= 0xffff; | |
| #endif | |
| if (!(sd->flag & CPU_DESC_FLAG_WRITABLE)) { | if (!(sd->flag & CPU_DESC_FLAG_WRITABLE)) { |
| cpu_memorywrite_check(sd, offset, 4, | cpu_memorywrite_check(sd, offset, 4, |
| (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); | (idx == CPU_SS_INDEX) ? SS_EXCEPTION : GP_EXCEPTION); |
| Line 684 cpu_vmemorywrite_d(int idx, DWORD offset | Line 643 cpu_vmemorywrite_d(int idx, DWORD offset |
| cpu_memorywrite_d(addr, val); | cpu_memorywrite_d(addr, val); |
| } else { | } else { |
| /* protected mode */ | /* protected mode */ |
| cpu_lmemorywrite_d(addr, val); | cpu_lmemorywrite_d(addr, val, CPU_IS_USER_MODE()); |
| } | } |
| return; | return; |
| Line 736 cpu_memorywrite_d(DWORD address, DWORD v | Line 695 cpu_memorywrite_d(DWORD address, DWORD v |
| switch (4 - diff) { | switch (4 - diff) { |
| case 3: | case 3: |
| cpumem[off++] = value & 0xff; | cpumem[off++] = value & 0xff; |
| value >>= 8; | |
| if (off >= extmem_size) { | if (off >= extmem_size) { |
| OVERRUN_EXCEPTION(); | OVERRUN_EXCEPTION(); |
| break; | break; |
| } | } |
| value >>= 8; | |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| case 2: | case 2: |
| cpumem[off++] = value & 0xff; | cpumem[off++] = value & 0xff; |
| Line 763 cpu_memorywrite_d(DWORD address, DWORD v | Line 722 cpu_memorywrite_d(DWORD address, DWORD v |
| STOREINTELDWORD(cpumem + adr, value); | STOREINTELDWORD(cpumem + adr, value); |
| } else if (adr < extmem_size) { | } else if (adr < extmem_size) { |
| diff = extmem_size - adr; | diff = extmem_size - adr; |
| value >>= (8 * (4 - diff)); | |
| switch (diff) { | switch (diff) { |
| default: | default: |
| Line 771 cpu_memorywrite_d(DWORD address, DWORD v | Line 729 cpu_memorywrite_d(DWORD address, DWORD v |
| break; | break; |
| case 3: | case 3: |
| cpumem[extmem_size - 3] = value & 0xff; | cpumem[adr] = value & 0xff; |
| value >>= 8; | value >>= 8; |
| adr++; | |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| case 2: | case 2: |
| cpumem[extmem_size - 2] = value & 0xff; | cpumem[adr] = value & 0xff; |
| value >>= 8; | value >>= 8; |
| adr++; | |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| case 1: | case 1: |
| cpumem[extmem_size - 1] = value & 0xff; | cpumem[adr] = value & 0xff; |
| break; | break; |
| } | } |
| OVERRUN_EXCEPTION(); | OVERRUN_EXCEPTION(); |
| Line 800 cpu_memorywrite_w(DWORD address, WORD va | Line 760 cpu_memorywrite_w(DWORD address, WORD va |
| __i286_memorywrite_w(adr, value); | __i286_memorywrite_w(adr, value); |
| } else if (adr < LOWMEM) { | } else if (adr < LOWMEM) { |
| __i286_memorywrite(adr, value & 0xff); | __i286_memorywrite(adr, value & 0xff); |
| cpumem[adr - (LOWMEM - 1)] = (value >> 8) & 0xff; | if (extmem_size > 0) { |
| cpumem[0] = (value >> 8) & 0xff; | |
| } else { | |
| OVERRUN_EXCEPTION(); | |
| } | |
| } else if (extmem_size > 0) { | } else if (extmem_size > 0) { |
| adr -= LOWMEM; | adr -= LOWMEM; |
| if (adr < extmem_size - 1) { | if (adr < extmem_size - 1) { |
| Line 841 cpu_memoryread_d(DWORD address) | Line 805 cpu_memoryread_d(DWORD address) |
| DWORD adr = address & CPU_STAT_ADRSMASK; | DWORD adr = address & CPU_STAT_ADRSMASK; |
| DWORD val; | DWORD val; |
| DWORD diff; | DWORD diff; |
| int shift; | |
| if (adr < LOWMEM - 3) { | if (adr < LOWMEM - 3) { |
| val = __i286_memoryread_d(adr); | val = __i286_memoryread_d(adr); |
| Line 855 cpu_memoryread_d(DWORD address) | Line 820 cpu_memoryread_d(DWORD address) |
| case 3: | case 3: |
| val = __i286_memoryread_w(adr); | val = __i286_memoryread_w(adr); |
| val |= __i286_memoryread(adr + 2); | val |= (DWORD)__i286_memoryread(adr + 2) << 16; |
| if (extmem_size > 0) { | if (extmem_size > 0) { |
| val |= cpumem[0] << 24; | val |= (DWORD)cpumem[0] << 24; |
| } else { | } else { |
| val |= 0xff000000; | val |= 0xff000000; |
| OVERRUN_EXCEPTION(); | OVERRUN_EXCEPTION(); |
| Line 867 cpu_memoryread_d(DWORD address) | Line 832 cpu_memoryread_d(DWORD address) |
| case 2: | case 2: |
| val = __i286_memoryread_w(adr); | val = __i286_memoryread_w(adr); |
| if (extmem_size > 1) { | if (extmem_size > 1) { |
| val |= (DWORD)LOADINTELWORD(cpumem) << 16; | val |= ((DWORD)LOADINTELWORD(cpumem)) << 16; |
| } else if (extmem_size > 0) { | |
| val |= 0xff000000 | ((DWORD)cpumem[0] << 16); | |
| OVERRUN_EXCEPTION(); | |
| } else { | } else { |
| val |= 0xffff0000; | val |= 0xffff0000; |
| OVERRUN_EXCEPTION(); | OVERRUN_EXCEPTION(); |
| Line 879 cpu_memoryread_d(DWORD address) | Line 847 cpu_memoryread_d(DWORD address) |
| if (extmem_size > 2) { | if (extmem_size > 2) { |
| val |= (DWORD)LOADINTELWORD(cpumem) << 8; | val |= (DWORD)LOADINTELWORD(cpumem) << 8; |
| val |= (DWORD)cpumem[2] << 24; | val |= (DWORD)cpumem[2] << 24; |
| } else if (extmem_size > 1) { | |
| val |= ((DWORD)LOADINTELWORD(cpumem)) << 8; | |
| val |= 0xff000000; | |
| OVERRUN_EXCEPTION(); | |
| } else if (extmem_size > 0) { | |
| val |= 0xffff0000 | ((DWORD)cpumem[0] << 8); | |
| OVERRUN_EXCEPTION(); | |
| } else { | } else { |
| val |= 0xffffff00; | val |= 0xffffff00; |
| OVERRUN_EXCEPTION(); | OVERRUN_EXCEPTION(); |
| Line 892 cpu_memoryread_d(DWORD address) | Line 867 cpu_memoryread_d(DWORD address) |
| } else if (adr < extmem_size) { | } else if (adr < extmem_size) { |
| diff = extmem_size - adr; | diff = extmem_size - adr; |
| val = 0; | val = 0; |
| shift = 0; | |
| switch (diff) { | switch (diff) { |
| default: | default: |
| Line 899 cpu_memoryread_d(DWORD address) | Line 875 cpu_memoryread_d(DWORD address) |
| break; | break; |
| case 3: | case 3: |
| val |= cpumem[extmem_size - 3]; | val |= (DWORD)cpumem[adr]; |
| shift += 8; | |
| adr++; | |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| case 2: | case 2: |
| val |= (cpumem[extmem_size - 2] << (8 * (diff - 2))); | val |= (DWORD)cpumem[adr] << shift; |
| shift += 8; | |
| adr++; | |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| case 1: | case 1: |
| val |= (cpumem[extmem_size - 1] << (8 * (diff - 1))); | val |= (DWORD)cpumem[adr] << shift; |
| shift += 8; | |
| break; | break; |
| } | } |
| val |= ((DWORD)-1) << (8 * diff); | val |= ((DWORD)-1) << shift; |
| OVERRUN_EXCEPTION(); | OVERRUN_EXCEPTION(); |
| } else { | } else { |
| val = (DWORD)-1; | val = (DWORD)-1; |
| Line 931 cpu_memoryread_w(DWORD address) | Line 912 cpu_memoryread_w(DWORD address) |
| val = __i286_memoryread_w(adr); | val = __i286_memoryread_w(adr); |
| } else if (adr < LOWMEM) { | } else if (adr < LOWMEM) { |
| val = __i286_memoryread(adr); | val = __i286_memoryread(adr); |
| val |= (WORD)cpumem[0] << 8; | if (extmem_size > 0) { |
| val |= (WORD)cpumem[0] << 8; | |
| } else { | |
| val |= 0xff00; | |
| OVERRUN_EXCEPTION(); | |
| } | |
| } else if (extmem_size > 0) { | } else if (extmem_size > 0) { |
| adr -= LOWMEM; | adr -= LOWMEM; |
| if (adr < extmem_size - 1) { | if (adr < extmem_size - 1) { |