--- np2/i386c/ia32/cpu_mem.c	2004/02/20 16:09:04	1.11
+++ np2/i386c/ia32/cpu_mem.c	2004/03/12 13:34:08	1.14
@@ -1,4 +1,4 @@
-/*	$Id: cpu_mem.c,v 1.11 2004/02/20 16:09:04 monaka Exp $	*/
+/*	$Id: cpu_mem.c,v 1.14 2004/03/12 13:34:08 monaka Exp $	*/
 
 /*
  * Copyright (c) 2002-2003 NONAKA Kimihiro
@@ -154,19 +154,22 @@ cpu_memorywrite_check(descriptor_t *sd, 
 	sd->flag |= CPU_DESC_FLAG_WRITABLE;
 }
 
-BOOL
-cpu_stack_push_check(descriptor_t *sd, UINT32 esp, UINT length)
+void
+cpu_stack_push_check(UINT16 s, descriptor_t *sd, UINT32 esp, UINT length)
 {
 	UINT32 limit;
 
 	if (CPU_STAT_PM) {
-		if (!sd->valid || !sd->p)
-			return FALSE;
-		if (!sd->s || sd->u.seg.c || !sd->u.seg.wr)
-			return FALSE;
+		if (!sd->valid || !sd->p) {
+			VERBOSE(("cpu_stack_push_check: valid = %d, present = %d", sd->valid, sd->p));
+			EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+		}
+		if (!sd->s || sd->u.seg.c || !sd->u.seg.wr) {
+			VERBOSE(("cpu_stack_push_check: s = %d, c = %d, wr", sd->s, sd->u.seg.c, sd->u.seg.wr));
+			EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+		}
 
 		if (!sd->d) {
-			esp &= 0xffff;
 			limit = 0xffff;
 		} else {
 			limit = 0xffffffff;
@@ -176,37 +179,51 @@ cpu_stack_push_check(descriptor_t *sd, U
 			if ((esp == 0)
 			 || (esp < length)
 			 || (esp - length <= sd->u.seg.limit)
-			 || (esp > limit))
-				return FALSE;
+			 || (esp > limit)) {
+				VERBOSE(("cpu_stack_push_check: expand-down, esp = %08x, length = %08x", esp, length));
+				VERBOSE(("cpu_stack_push_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit));
+				VERBOSE(("cpu_stack_push_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend));
+				EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+			}
 		} else {
 			/* expand-up stack */
 			if (esp == 0) {
 				if ((sd->d && (sd->u.seg.segend != 0xffffffff))
-				 || (!sd->d && (sd->u.seg.segend != 0xffff)))
-					return FALSE;
+				 || (!sd->d && (sd->u.seg.segend != 0xffff))) {
+					VERBOSE(("cpu_stack_push_check: expand-up, esp = %08x, length = %08x", esp, length));
+					VERBOSE(("cpu_stack_push_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit));
+					VERBOSE(("cpu_stack_push_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend));
+					EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+				}
 			} else {
 				if ((esp < length)
-				 || (esp - 1 > sd->u.seg.limit))
-					return FALSE;
+				 || (esp - 1 > sd->u.seg.limit)) {
+					VERBOSE(("cpu_stack_push_check: expand-up, esp = %08x, length = %08x", esp, length));
+					VERBOSE(("cpu_stack_push_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit));
+					VERBOSE(("cpu_stack_push_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend));
+					EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+				}
 			}
 		}
 	}
-	return TRUE;
 }
 
-BOOL
-cpu_stack_pop_check(descriptor_t *sd, UINT32 esp, UINT length)
+void
+cpu_stack_pop_check(UINT16 s, descriptor_t *sd, UINT32 esp, UINT length)
 {
 	UINT32 limit;
 
 	if (CPU_STAT_PM) {
-		if (!sd->valid || !sd->p)
-			return FALSE;
-		if (!sd->s || sd->u.seg.c || !sd->u.seg.wr)
-			return FALSE;
+		if (!sd->valid || !sd->p) {
+			VERBOSE(("cpu_stack_pop_check: valid = %d, present = %d", sd->valid, sd->p));
+			EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+		}
+		if (!sd->s || sd->u.seg.c || !sd->u.seg.wr) {
+			VERBOSE(("cpu_stack_pop_check: s = %d, c = %d, wr", sd->s, sd->u.seg.c, sd->u.seg.wr));
+			EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+		}
 
 		if (!sd->d) {
-			esp &= 0xffff;
 			limit = 0xffff;
 		} else {
 			limit = 0xffffffff;
@@ -214,21 +231,114 @@ cpu_stack_pop_check(descriptor_t *sd, UI
 		if (sd->u.seg.ec) {
 			/* expand-down stack */
 			if ((esp == limit)
-			 || ((limit - esp) + 1 < length))
-				return FALSE;
+			 || ((limit - esp) + 1 < length)) {
+				VERBOSE(("cpu_stack_pop_check: expand-up, esp = %08x, length = %08x", esp, length));
+				VERBOSE(("cpu_stack_pop_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit));
+				VERBOSE(("cpu_stack_pop_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend));
+				EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+			}
 		} else {
 			/* expand-up stack */
 			if ((esp == limit)
 			 || (sd->u.seg.segend == 0)
 			 || (esp > sd->u.seg.limit)
-			 || ((sd->u.seg.limit - esp) + 1 < length))
-				return FALSE;
+			 || ((sd->u.seg.limit - esp) + 1 < length)) {
+				VERBOSE(("cpu_stack_pop_check: expand-up, esp = %08x, length = %08x", esp, length));
+				VERBOSE(("cpu_stack_pop_check: limit = %08x, seglimit = %08x", limit, sd->u.seg.limit));
+				VERBOSE(("cpu_stack_pop_check: segbase = %08x, segend = %08x", sd->u.seg.segbase, sd->u.seg.segend));
+				EXCEPTION(SS_EXCEPTION, s & 0xfffc);
+			}
 		}
 	}
-	return TRUE;
 }
 
 
+#if defined(IA32_SUPPORT_PREFETCH_QUEUE)
+/*
+ * code prefetch
+ */
+#define	CPU_PREFETCHQ_MASK	(CPU_PREFETCH_QUEUE_LENGTH - 1)
+
+INLINE static MEMCALL void
+cpu_prefetch(UINT32 address)
+{
+	UINT offset = address & CPU_PREFETCHQ_MASK;
+	UINT length = CPU_PREFETCH_QUEUE_LENGTH - offset;
+
+	cpu_memory_access_la_region(address, length, CPU_PAGE_READ_CODE, CPU_STAT_USER_MODE, CPU_PREFETCHQ + offset);
+	CPU_PREFETCHQ_REMAIN = (SINT8)length;
+}
+
+INLINE static MEMCALL UINT8
+cpu_prefetchq(UINT32 address)
+{
+	UINT8 v;
+
+	CPU_PREFETCHQ_REMAIN--;
+	v = CPU_PREFETCHQ[address & CPU_PREFETCHQ_MASK];
+	return v;
+}
+
+INLINE static MEMCALL UINT16
+cpu_prefetchq_w(UINT32 address)
+{
+	BYTE *p;
+	UINT16 v;
+
+	CPU_PREFETCHQ_REMAIN -= 2;
+	p = CPU_PREFETCHQ + (address & CPU_PREFETCHQ_MASK);
+	v = LOADINTELWORD(p);
+	return v;
+}
+
+INLINE static MEMCALL UINT32
+cpu_prefetchq_3(UINT32 address)
+{
+	BYTE *p;
+	UINT32 v;
+
+	CPU_PREFETCHQ_REMAIN -= 3;
+	p = CPU_PREFETCHQ + (address & CPU_PREFETCHQ_MASK);
+	v = LOADINTELWORD(p);
+	v += ((UINT32)p[2]) << 16;
+	return v;
+}
+
+INLINE static MEMCALL UINT32
+cpu_prefetchq_d(UINT32 address)
+{
+	BYTE *p;
+	UINT32 v;
+
+	CPU_PREFETCHQ_REMAIN -= 4;
+	p = CPU_PREFETCHQ + (address & CPU_PREFETCHQ_MASK);
+	v = LOADINTELDWORD(p);
+	return v;
+}
+#endif	/* IA32_SUPPORT_PREFETCH_QUEUE */
+
+#if defined(IA32_SUPPORT_DEBUG_REGISTER)
+INLINE static void
+check_memory_break_point(UINT32 address, UINT length, UINT rw)
+{
+	int i;
+
+	if (CPU_STAT_BP && !(CPU_EFLAG & RF_FLAG)) {
+		for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
+			if ((CPU_STAT_BP & (1 << i))
+			 && (CPU_DR7_GET_RW(i) & rw)
+
+			 && ((address <= CPU_DR(i) && address + length > CPU_DR(i))
+			  || (address > CPU_DR(i) && address < CPU_DR(i) + CPU_DR7_GET_LEN(i)))) {
+				CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_B(i);
+			}
+		}
+	}
+}
+#else
+#define	check_memory_break_point(address, length, rw)
+#endif
+
 /*
  * code fetch
  */
@@ -240,10 +350,17 @@ cpu_codefetch(UINT32 offset)
 
 	sd = &CPU_STAT_SREG(CPU_CS_INDEX);
 	if (offset <= sd->u.seg.limit) {
-		addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset;
+		addr = sd->u.seg.segbase + offset;
+#if defined(IA32_SUPPORT_PREFETCH_QUEUE)
+		if (CPU_PREFETCHQ_REMAIN <= 0) {
+			cpu_prefetch(addr);
+		}
+		return cpu_prefetchq(addr);
+#else	/* !IA32_SUPPORT_PREFETCH_QUEUE */
 		if (!CPU_STAT_PM)
 			return cpu_memoryread(addr);
 		return cpu_lcmemoryread(addr);
+#endif	/* IA32_SUPPORT_PREFETCH_QUEUE */
 	}
 	EXCEPTION(GP_EXCEPTION, 0);
 	return 0;	/* compiler happy */
@@ -254,13 +371,31 @@ cpu_codefetch_w(UINT32 offset)
 {
 	descriptor_t *sd;
 	UINT32 addr;
+#if defined(IA32_SUPPORT_PREFETCH_QUEUE)
+	UINT16 v;
+#endif
 
 	sd = &CPU_STAT_SREG(CPU_CS_INDEX);
 	if (offset <= sd->u.seg.limit - 1) {
-		addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset;
+		addr = sd->u.seg.segbase + offset;
+#if defined(IA32_SUPPORT_PREFETCH_QUEUE)
+		if (CPU_PREFETCHQ_REMAIN <= 0) {
+			cpu_prefetch(addr);
+		}
+		if (CPU_PREFETCHQ_REMAIN >= 2) {
+			return cpu_prefetchq_w(addr);
+		}
+
+		v = cpu_prefetchq(addr);
+		addr++;
+		cpu_prefetch(addr);
+		v += (UINT16)cpu_prefetchq(addr) << 8;
+		return v;
+#else	/* !IA32_SUPPORT_PREFETCH_QUEUE */
 		if (!CPU_STAT_PM)
 			return cpu_memoryread_w(addr);
 		return cpu_lcmemoryread_w(addr);
+#endif	/* IA32_SUPPORT_PREFETCH_QUEUE */
 	}
 	EXCEPTION(GP_EXCEPTION, 0);
 	return 0;	/* compiler happy */
@@ -271,13 +406,49 @@ cpu_codefetch_d(UINT32 offset)
 {
 	descriptor_t *sd;
 	UINT32 addr;
+#if defined(IA32_SUPPORT_PREFETCH_QUEUE)
+	UINT32 v;
+#endif
 
 	sd = &CPU_STAT_SREG(CPU_CS_INDEX);
 	if (offset <= sd->u.seg.limit - 3) {
-		addr = CPU_STAT_SREGBASE(CPU_CS_INDEX) + offset;
+		addr = sd->u.seg.segbase + offset;
+#if defined(IA32_SUPPORT_PREFETCH_QUEUE)
+		if (CPU_PREFETCHQ_REMAIN <= 0) {
+			cpu_prefetch(addr);
+		}
+		if (CPU_PREFETCHQ_REMAIN >= 4) {
+			return cpu_prefetchq_d(addr);
+		} else {
+			switch (CPU_PREFETCHQ_REMAIN) {
+			case 1:
+				v = cpu_prefetchq(addr);
+				addr++;
+				cpu_prefetch(addr);
+				v += (UINT32)cpu_prefetchq_3(addr) << 8;
+				break;
+
+			case 2:
+				v = cpu_prefetchq_w(addr);
+				addr += 2;
+				cpu_prefetch(addr);
+				v += (UINT32)cpu_prefetchq_w(addr) << 16;
+				break;
+
+			case 3:
+				v = cpu_prefetchq_3(addr);
+				addr += 3;
+				cpu_prefetch(addr);
+				v += (UINT32)cpu_prefetchq(addr) << 24;
+				break;
+			}
+			return v;
+		}
+#else	/* !IA32_SUPPORT_PREFETCH_QUEUE */
 		if (!CPU_STAT_PM)
 			return cpu_memoryread_d(addr);
 		return cpu_lcmemoryread_d(addr);
+#endif	/* IA32_SUPPORT_PREFETCH_QUEUE */
 	}
 	EXCEPTION(GP_EXCEPTION, 0);
 	return 0;	/* compiler happy */
@@ -308,31 +479,29 @@ cpu_vmemoryread(int idx, UINT32 offset)
 	} else {
 		switch (sd->type) {
 		case 4: case 5: case 6: case 7:
-			if (offset <= sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset <= sd->u.seg.limit)
+				goto range_failure;
 			break;
 
 		default:
-			if (offset > sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset > sd->u.seg.limit)
+				goto range_failure;
 			break;
 		}
 	}
-	addr = CPU_STAT_SREGBASE(idx) + offset;
+	addr = sd->u.seg.segbase + offset;
+	check_memory_break_point(addr, 1, CPU_DR7_RW_RO);
 	if (!CPU_STAT_PM)
 		return cpu_memoryread(addr);
 	return cpu_lmemoryread(addr, CPU_STAT_USER_MODE);
 
+range_failure:
+	if (idx == CPU_SS_INDEX) {
+		exc = SS_EXCEPTION;
+	} else {
+		exc = GP_EXCEPTION;
+	}
+	VERBOSE(("cpu_vmemoryread: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit));
 err:
 	EXCEPTION(exc, 0);
 	return 0;	/* compiler happy */
@@ -359,31 +528,29 @@ cpu_vmemoryread_w(int idx, UINT32 offset
 	} else {
 		switch (sd->type) {
 		case 4: case 5: case 6: case 7:
-			if (offset - 1 <= sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset - 1 <= sd->u.seg.limit)
+				goto range_failure;
 			break;
 
 		default:
-			if (offset > sd->u.seg.limit - 1) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset > sd->u.seg.limit - 1)
+				goto range_failure;
 			break;
 		}
 	} 
-	addr = CPU_STAT_SREGBASE(idx) + offset;
+	addr = sd->u.seg.segbase + offset;
+	check_memory_break_point(addr, 2, CPU_DR7_RW_RO);
 	if (!CPU_STAT_PM)
 		return cpu_memoryread_w(addr);
 	return cpu_lmemoryread_w(addr, CPU_STAT_USER_MODE);
 
+range_failure:
+	if (idx == CPU_SS_INDEX) {
+		exc = SS_EXCEPTION;
+	} else {
+		exc = GP_EXCEPTION;
+	}
+	VERBOSE(("cpu_vmemoryread_w: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit));
 err:
 	EXCEPTION(exc, 0);
 	return 0;	/* compiler happy */
@@ -410,31 +577,29 @@ cpu_vmemoryread_d(int idx, UINT32 offset
 	} else {
 		switch (sd->type) {
 		case 4: case 5: case 6: case 7:
-			if (offset - 3 <= sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset - 3 <= sd->u.seg.limit)
+				goto range_failure;
 			break;
 
 		default:
-			if (offset > sd->u.seg.limit - 3) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset > sd->u.seg.limit - 3)
+				goto range_failure;
 			break;
 		}
 	}
-	addr = CPU_STAT_SREGBASE(idx) + offset;
+	addr = sd->u.seg.segbase + offset;
+	check_memory_break_point(addr, 4, CPU_DR7_RW_RO);
 	if (!CPU_STAT_PM)
 		return cpu_memoryread_d(addr);
 	return cpu_lmemoryread_d(addr, CPU_STAT_USER_MODE);
 
+range_failure:
+	if (idx == CPU_SS_INDEX) {
+		exc = SS_EXCEPTION;
+	} else {
+		exc = GP_EXCEPTION;
+	}
+	VERBOSE(("cpu_vmemoryread_d: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit));
 err:
 	EXCEPTION(exc, 0);
 	return 0;	/* compiler happy */
@@ -462,27 +627,18 @@ cpu_vmemorywrite(int idx, UINT32 offset,
 	} else {
 		switch (sd->type) {
 		case 6: case 7:
-			if (offset <= sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset <= sd->u.seg.limit)
+				goto range_failure;
 			break;
 
 		default:
-			if (offset > sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset > sd->u.seg.limit)
+				goto range_failure;
 			break;
 		}
 	}
-	addr = CPU_STAT_SREGBASE(idx) + offset;
+	addr = sd->u.seg.segbase + offset;
+	check_memory_break_point(addr, 1, CPU_DR7_RW_RW);
 	if (!CPU_STAT_PM) {
 		/* real mode */
 		cpu_memorywrite(addr, val);
@@ -492,6 +648,13 @@ cpu_vmemorywrite(int idx, UINT32 offset,
 	}
 	return;
 
+range_failure:
+	if (idx == CPU_SS_INDEX) {
+		exc = SS_EXCEPTION;
+	} else {
+		exc = GP_EXCEPTION;
+	}
+	VERBOSE(("cpu_vmemorywrite: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit));
 err:
 	EXCEPTION(exc, 0);
 }
@@ -517,27 +680,18 @@ cpu_vmemorywrite_w(int idx, UINT32 offse
 	} else {
 		switch (sd->type) {
 		case 6: case 7:
-			if (offset - 1 <= sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset - 1 <= sd->u.seg.limit)
+				goto range_failure;
 			break;
 
 		default:
-			if (offset > sd->u.seg.limit - 1) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset > sd->u.seg.limit - 1)
+				goto range_failure;
 			break;
 		}
 	}
-	addr = CPU_STAT_SREGBASE(idx) + offset;
+	addr = sd->u.seg.segbase + offset;
+	check_memory_break_point(addr, 2, CPU_DR7_RW_RW);
 	if (!CPU_STAT_PM) {
 		/* real mode */
 		cpu_memorywrite_w(addr, val);
@@ -547,6 +701,13 @@ cpu_vmemorywrite_w(int idx, UINT32 offse
 	}
 	return;
 
+range_failure:
+	if (idx == CPU_SS_INDEX) {
+		exc = SS_EXCEPTION;
+	} else {
+		exc = GP_EXCEPTION;
+	}
+	VERBOSE(("cpu_vmemorywrite_w: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit));
 err:
 	EXCEPTION(exc, 0);
 }
@@ -572,27 +733,18 @@ cpu_vmemorywrite_d(int idx, UINT32 offse
 	} else {
 		switch (sd->type) {
 		case 6: case 7:
-			if (offset - 3 <= sd->u.seg.limit) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset - 3 <= sd->u.seg.limit)
+				goto range_failure;
 			break;
 
 		default:
-			if (offset > sd->u.seg.limit - 3) {
-				if (idx == CPU_SS_INDEX)
-					exc = SS_EXCEPTION;
-				else
-					exc = GP_EXCEPTION;
-				goto err;
-			}
+			if (offset > sd->u.seg.limit - 3)
+				goto range_failure;
 			break;
 		}
 	}
-	addr = CPU_STAT_SREGBASE(idx) + offset;
+	addr = sd->u.seg.segbase + offset;
+	check_memory_break_point(addr, 4, CPU_DR7_RW_RW);
 	if (!CPU_STAT_PM) {
 		/* real mode */
 		cpu_memorywrite_d(addr, val);
@@ -602,6 +754,13 @@ cpu_vmemorywrite_d(int idx, UINT32 offse
 	}
 	return;
 
+range_failure:
+	if (idx == CPU_SS_INDEX) {
+		exc = SS_EXCEPTION;
+	} else {
+		exc = GP_EXCEPTION;
+	}
+	VERBOSE(("cpu_vmemorywrite_d: type = %d, offset = %08x, limit = %08x", sd->type, offset, sd->u.seg.limit));
 err:
 	EXCEPTION(exc, 0);
 }