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| version 1.4, 2004/01/26 15:23:21 | version 1.5, 2004/01/27 15:55:49 |
|---|---|
| Line 34 | Line 34 |
| #include "ctrlxfer.h" | #include "ctrlxfer.h" |
| static void check_segreg(void); | |
| /*------------------------------------------------------------------------------ | /*------------------------------------------------------------------------------ |
| * JMPfar_pm | * JMPfar_pm |
| */ | */ |
| Line 840 CALLfar_pm_tss(selector_t *tss_sel) | Line 838 CALLfar_pm_tss(selector_t *tss_sel) |
| void | void |
| RETfar_pm(DWORD nbytes) | RETfar_pm(DWORD nbytes) |
| { | { |
| selector_t ret_sel, ss_sel; | selector_t ret_sel, ss_sel, temp_sel; |
| DWORD sp; | DWORD sp; |
| DWORD new_ip, new_sp; | DWORD new_ip, new_sp; |
| WORD new_cs, new_ss; | WORD new_cs, new_ss; |
| int rv; | int rv; |
| int i; | |
| VERBOSE(("RETfar_pm: old EIP = %04x:%08x, ESP = %04x:%08x, nbytes = %d", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP, nbytes)); | VERBOSE(("RETfar_pm: old EIP = %04x:%08x, ESP = %04x:%08x, nbytes = %d", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP, nbytes)); |
| Line 984 RETfar_pm(DWORD nbytes) | Line 983 RETfar_pm(DWORD nbytes) |
| CPU_ESP = new_sp + nbytes; | CPU_ESP = new_sp + nbytes; |
| /* check segment register */ | /* check segment register */ |
| check_segreg(); | for (i = 0; i < CPU_SEGREG_NUM; i++) { |
| descriptor_t *dp; | |
| BOOL valid; | |
| dp = &CPU_STAT_SREG(i); | |
| if ((!dp->u.seg.c || !dp->u.seg.ec) | |
| && (CPU_STAT_SREG(i).dpl < CPU_STAT_CPL)) { | |
| /* segment register is invalid */ | |
| CPU_REGS_SREG(i) = 0; | |
| CPU_STAT_SREG_CLEAR(i); | |
| continue; | |
| } | |
| rv = parse_selector(&temp_sel, CPU_REGS_SREG(i)); | |
| if (rv < 0) { | |
| /* segment register is invalid */ | |
| CPU_REGS_SREG(i) = 0; | |
| CPU_STAT_SREG_CLEAR(i); | |
| continue; | |
| } | |
| valid = TRUE; | |
| if (!temp_sel.desc.s) { | |
| /* system segment */ | |
| valid = FALSE; | |
| } | |
| if (temp_sel.desc.u.seg.c && !temp_sel.desc.u.seg.wr) { | |
| /* execute-only code segment */ | |
| valid = FALSE; | |
| } | |
| if (!temp_sel.desc.u.seg.c || !temp_sel.desc.u.seg.ec) { | |
| if (CPU_STAT_CPL > temp_sel.desc.dpl) { | |
| valid = FALSE; | |
| } | |
| } | |
| if (!valid) { | |
| /* segment register is invalid */ | |
| CPU_REGS_SREG(i) = 0; | |
| CPU_STAT_SREG(i).valid = 0; | |
| } | |
| } | |
| } | } |
| VERBOSE(("RETfar_pm: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("RETfar_pm: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); |
| Line 995 RETfar_pm(DWORD nbytes) | Line 1035 RETfar_pm(DWORD nbytes) |
| * IRET_pm | * IRET_pm |
| */ | */ |
| #undef IA32_RETURN_FROM_VM86 | #define IA32_RETURN_FROM_VM86 |
| static void IRET_pm_nested_task(void); | static void IRET_pm_nested_task(void); |
| static void IRET_pm_return_to_vm86(DWORD new_ip, DWORD new_cs, DWORD new_flags); | static void IRET_pm_return_to_vm86(DWORD new_ip, DWORD new_cs, DWORD new_flags); |
| Line 1007 void | Line 1047 void |
| IRET_pm(void) | IRET_pm(void) |
| { | { |
| selector_t iret_sel, ss_sel; | selector_t iret_sel, ss_sel; |
| descriptor_t *dp; | |
| DWORD sp; | DWORD sp; |
| DWORD stacksize; /* for RETURN-TO-SAME-PRIVILEGE-LEVEL */ | DWORD stacksize; /* for RETURN-TO-SAME-PRIVILEGE-LEVEL */ |
| DWORD mask = 0; | DWORD mask = 0; |
| Line 1014 IRET_pm(void) | Line 1055 IRET_pm(void) |
| WORD new_cs, new_ss; | WORD new_cs, new_ss; |
| int old_cpl; | int old_cpl; |
| int rv; | int rv; |
| int i; | |
| VERBOSE(("IRET_pm: old EIP = %04x:%08x, old ESP = %04x:%08x", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("IRET_pm: old EIP = %04x:%08x, old ESP = %04x:%08x", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP)); |
| if (CPU_EFLAG & NT_FLAG) { | if (!(CPU_EFLAG & VM_FLAG) && (CPU_EFLAG & NT_FLAG)) { |
| /* TASK-RETURN: PE=1, VM=0, NT=1 */ | /* TASK-RETURN: PE=1, VM=0, NT=1 */ |
| IRET_pm_nested_task(); | IRET_pm_nested_task(); |
| VERBOSE(("IRET_pm: new EIP = %04x:%08x, new ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("IRET_pm: new EIP = %04x:%08x, new ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); |
| Line 1189 IRET_pm(void) | Line 1231 IRET_pm(void) |
| if (iret_sel.rpl > old_cpl) { | if (iret_sel.rpl > old_cpl) { |
| /* RETURN-OUTER-PRIVILEGE-LEVEL */ | /* RETURN-OUTER-PRIVILEGE-LEVEL */ |
| load_ss(ss_sel.selector, &ss_sel.desc, iret_sel.rpl); | load_ss(ss_sel.selector, &ss_sel.desc, iret_sel.rpl); |
| CPU_ESP = new_sp; | CPU_ESP = new_sp; |
| /* check segment register */ | /* check segment register */ |
| check_segreg(); | for (i = 0; i < CPU_SEGREG_NUM; i++) { |
| if ((i != CPU_CS_INDEX) && (i != CPU_SS_INDEX)) { | |
| dp = &CPU_STAT_SREG(i); | |
| if ((!dp->u.seg.c || !dp->u.seg.ec) | |
| && (CPU_STAT_SREG(i).dpl < CPU_STAT_CPL)) { | |
| /* segment register is invalid */ | |
| CPU_REGS_SREG(i) = 0; | |
| CPU_STAT_SREG_CLEAR(i); | |
| continue; | |
| } | |
| } | |
| } | |
| } else { | } else { |
| /* RETURN-TO-SAME-PRIVILEGE-LEVEL */ | /* RETURN-TO-SAME-PRIVILEGE-LEVEL */ |
| if (CPU_STAT_SS32) { | if (CPU_STAT_SS32) { |
| Line 1219 IRET_pm_nested_task(void) | Line 1273 IRET_pm_nested_task(void) |
| VERBOSE(("IRET_pm: TASK-RETURN: PE=1, VM=0, NT=1")); | VERBOSE(("IRET_pm: TASK-RETURN: PE=1, VM=0, NT=1")); |
| if (CPU_STAT_VM86) { | |
| ia32_panic("IRET_pm: VM86"); | |
| } | |
| new_cs = get_link_selector_from_tss(); | new_cs = get_link_selector_from_tss(); |
| rv = parse_selector(&iret_sel, new_cs); | rv = parse_selector(&iret_sel, new_cs); |
| if (rv < 0 || iret_sel.ldt) { | if (rv < 0 || iret_sel.ldt) { |
| Line 1339 IRET_pm_return_from_vm86(DWORD new_ip, D | Line 1389 IRET_pm_return_from_vm86(DWORD new_ip, D |
| EXCEPTION(GP_EXCEPTION, 0); | EXCEPTION(GP_EXCEPTION, 0); |
| } | } |
| #endif /* IA32_RETURN_FROM_VM86 */ | #endif /* IA32_RETURN_FROM_VM86 */ |
| /*----- | |
| * Misc. | |
| */ | |
| static void | |
| check_segreg(void) | |
| { | |
| selector_t temp_sel; | |
| BOOL valid; | |
| int rv; | |
| int i; | |
| /* check segment register */ | |
| for (i = 0; i < CPU_SEGREG_NUM; i++) { | |
| if (i == CPU_CS_INDEX || i == CPU_SS_INDEX) | |
| continue; | |
| rv = parse_selector(&temp_sel, CPU_REGS_SREG(i)); | |
| if (rv < 0) { | |
| /* segment register is invalid */ | |
| CPU_REGS_SREG(i) = 0; | |
| CPU_STAT_SREG(i).valid = 0; | |
| continue; | |
| } | |
| valid = TRUE; | |
| if (!temp_sel.desc.s) { | |
| /* system segment */ | |
| valid = FALSE; | |
| } | |
| if (temp_sel.desc.u.seg.c && !temp_sel.desc.u.seg.wr) { | |
| /* execute-only code segment */ | |
| valid = FALSE; | |
| } | |
| if (!temp_sel.desc.u.seg.c || !temp_sel.desc.u.seg.ec) { | |
| if (CPU_STAT_CPL > temp_sel.desc.dpl) { | |
| valid = FALSE; | |
| } | |
| } | |
| if (!valid) { | |
| /* segment register is invalid */ | |
| CPU_REGS_SREG(i) = 0; | |
| CPU_STAT_SREG(i).valid = 0; | |
| } | |
| } | |
| } |