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| version 1.11, 2004/07/29 13:06:08 | version 1.17, 2011/12/20 01:16:25 |
|---|---|
| Line 1 | Line 1 |
| /* $Id$ */ | |
| /* | /* |
| * Copyright (c) 2002-2003 NONAKA Kimihiro | * Copyright (c) 2002-2003 NONAKA Kimihiro |
| * All rights reserved. | * All rights reserved. |
| Line 12 | Line 10 |
| * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. | * documentation and/or other materials provided with the distribution. |
| * 3. The name of the author may not be used to endorse or promote products | |
| * derived from this software without specific prior written permission. | |
| * | * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| Line 31 | Line 27 |
| #include "cpu.h" | #include "cpu.h" |
| #include "memory.h" | #include "memory.h" |
| #ifdef USE_FPU | #if defined(USE_FPU) |
| #include "instructions/fpu/fpu.h" | #include "instructions/fpu/fp.h" |
| #endif | #endif |
| Line 82 cpu_reg2str(void) | Line 78 cpu_reg2str(void) |
| return buf; | return buf; |
| } | } |
| #ifdef USE_FPU | |
| char * | |
| fpu_reg2str(void) | |
| { | |
| static char buf[512]; | |
| char tmp[128]; | |
| int i; | |
| int no; | |
| strcpy(buf, "st=\n"); | |
| for (no = 0; no < 8; no++) { | |
| for (i = 9; i >= 0; i--) { | |
| snprintf(tmp, sizeof(tmp), "%02x", FPU_ST[no][i]); | |
| strcat(buf, tmp); | |
| } | |
| strcat(buf, "\n"); | |
| } | |
| snprintf(tmp, sizeof(tmp), | |
| "ctrl=%04x status=%04x tag=%04x\n" | |
| "inst=%08x%04x data=%08x%04x op=%03x\n", | |
| FPU_CTRLWORD, | |
| FPU_STATUSWORD, | |
| FPU_TAGWORD, | |
| FPU_INSTPTR_OFFSET, FPU_INSTPTR_SEG, | |
| FPU_DATAPTR_OFFSET, FPU_DATAPTR_SEG, | |
| FPU_LASTINSTOP); | |
| strcat(buf, tmp); | |
| return buf; | |
| } | |
| #endif | |
| static char * | static char * |
| a20str(void) | a20str(void) |
| { | { |
| Line 132 put_cpuinfo(void) | Line 95 put_cpuinfo(void) |
| strcpy(buf, cpu_reg2str()); | strcpy(buf, cpu_reg2str()); |
| strcat(buf, "\n"); | strcat(buf, "\n"); |
| #ifdef USE_FPU | #if defined(USE_FPU) |
| strcat(buf, fpu_reg2str()); | strcat(buf, fpu_reg2str()); |
| strcat(buf, "\n"); | strcat(buf, "\n"); |
| #endif | #endif |
| Line 171 memory_dump(int idx, UINT32 madr) | Line 134 memory_dump(int idx, UINT32 madr) |
| size = 0x100; | size = 0x100; |
| addr = madr - 0x80; | addr = madr - 0x80; |
| } | } |
| VERBOSE(("memory dump\n-- \n")); | VERBOSE(("memory dump\n--")); |
| for (s = 0; s < size; s++) { | for (s = 0; s < size; s++) { |
| if ((s % 16) == 0) { | if ((s % 16) == 0) { |
| VERBOSE(("%08x: ", addr + s)); | VERBOSE(("%08x: ", addr + s)); |
| Line 243 tr_dump(UINT16 selector, UINT32 base, UI | Line 206 tr_dump(UINT16 selector, UINT32 base, UI |
| UINT32 v; | UINT32 v; |
| UINT i; | UINT i; |
| (void)selector; | |
| VERBOSE(("TR_DUMP: selector = %04x", selector)); | VERBOSE(("TR_DUMP: selector = %04x", selector)); |
| for (i = 0; i < limit; i += 4) { | for (i = 0; i < limit; i += 4) { |
| Line 275 pde_dump(UINT32 base, int idx) | Line 236 pde_dump(UINT32 base, int idx) |
| v = cpu_memoryread_d(paddr); | v = cpu_memoryread_d(paddr); |
| VERBOSE(("PDE_DUMP: 0x%08x: %08x", paddr, v)); | VERBOSE(("PDE_DUMP: 0x%08x: %08x", paddr, v)); |
| } else { | } else { |
| VERBOSE(("PDE_DUMP: invalid idx (%d)", idx)); | |
| paddr = 0; | paddr = 0; |
| } | } |
| return paddr; | return paddr; |
| } | } |
| void | |
| segdesc_dump(descriptor_t *sdp) | |
| { | |
| #if defined(DEBUG) | |
| const char *s; | |
| __ASSERT(sdp != NULL); | |
| VERBOSE(("\ndump descriptor", sdp)); | |
| VERBOSE(("valid : %s", SEG_IS_VALID(sdp) ? "true" : "false")); | |
| VERBOSE(("present : %s", SEG_IS_PRESENT(sdp) ? "true" : "false")); | |
| VERBOSE(("DPL : %d", sdp->dpl)); | |
| VERBOSE(("kind : %s", SEG_IS_SYSTEM(sdp) ? "system" : "code/data")); | |
| if (!SEG_IS_SYSTEM(sdp)) { | |
| if (SEG_IS_CODE(sdp)) { | |
| VERBOSE(("type : %sconforming code", | |
| SEG_IS_CONFORMING_CODE(sdp) ? "" : "non-")); | |
| VERBOSE(("access : execute%s", | |
| SEG_IS_READABLE_CODE(sdp) ? "/read" : "")); | |
| } else { | |
| VERBOSE(("type : expand-%s data", | |
| SEG_IS_EXPANDDOWN_DATA(sdp) ? "down" : "up")); | |
| VERBOSE(("access : read%s", | |
| SEG_IS_WRITABLE_DATA(sdp) ? "/write" : "")); | |
| } | |
| VERBOSE(("4k scale : %s", sdp->u.seg.g ? "true" : "false")); | |
| VERBOSE(("baseadr : 0x%08x", sdp->u.seg.segbase)); | |
| VERBOSE(("limit : 0x%08x", sdp->u.seg.limit)); | |
| } else { | |
| switch (sdp->type) { | |
| case CPU_SYSDESC_TYPE_LDT: /* LDT */ | |
| VERBOSE(("type : LDT")); | |
| VERBOSE(("4k scale : %s", sdp->u.seg.g ? "true" : "false")); | |
| VERBOSE(("baseadr : 0x%08x", sdp->u.seg.segbase)); | |
| VERBOSE(("limit : 0x%08x", sdp->u.seg.limit)); | |
| break; | |
| case CPU_SYSDESC_TYPE_TASK: /* task gate */ | |
| VERBOSE(("type : task gate")); | |
| VERBOSE(("selector : 0x%04x", sdp->u.gate.selector)); | |
| break; | |
| case CPU_SYSDESC_TYPE_TSS_16: /* 286 TSS */ | |
| case CPU_SYSDESC_TYPE_TSS_BUSY_16: /* 286 Busy TSS */ | |
| case CPU_SYSDESC_TYPE_TSS_32: /* 386 TSS */ | |
| case CPU_SYSDESC_TYPE_TSS_BUSY_32: /* 386 Busy TSS */ | |
| VERBOSE(("type : %dbit %sTSS", | |
| (sdp->type & CPU_SYSDESC_TYPE_32BIT) ? 32 : 16, | |
| (sdp->type & CPU_SYSDESC_TYPE_TSS_BUSY_IND) ? | |
| "Busy " : "")); | |
| VERBOSE(("4k scale : %s", sdp->u.seg.g ? "true" : "false")); | |
| VERBOSE(("baseadr : 0x%08x", sdp->u.seg.segbase)); | |
| VERBOSE(("limit : 0x%08x", sdp->u.seg.limit)); | |
| break; | |
| case CPU_SYSDESC_TYPE_CALL_16: /* 286 call gate */ | |
| case CPU_SYSDESC_TYPE_INTR_16: /* 286 interrupt gate */ | |
| case CPU_SYSDESC_TYPE_TRAP_16: /* 286 trap gate */ | |
| case CPU_SYSDESC_TYPE_CALL_32: /* 386 call gate */ | |
| case CPU_SYSDESC_TYPE_INTR_32: /* 386 interrupt gate */ | |
| case CPU_SYSDESC_TYPE_TRAP_32: /* 386 trap gate */ | |
| switch (sdp->type & CPU_SYSDESC_TYPE_MASKBIT) { | |
| case CPU_SYSDESC_TYPE_CALL: | |
| s = "call"; | |
| break; | |
| case CPU_SYSDESC_TYPE_INTR: | |
| s = "interrupt"; | |
| break; | |
| case CPU_SYSDESC_TYPE_TRAP: | |
| s = "trap"; | |
| break; | |
| default: | |
| s = "unknown"; | |
| break; | |
| } | |
| VERBOSE(("type : %c86 %s gate", | |
| (sdp->type & CPU_SYSDESC_TYPE_32BIT) ? '3':'2', s)); | |
| VERBOSE(("selector : 0x%04x", sdp->u.gate.selector)); | |
| VERBOSE(("offset : 0x%08x", sdp->u.gate.offset)); | |
| VERBOSE(("count : %d", sdp->u.gate.count)); | |
| break; | |
| case 0: case 8: case 10: case 13: /* reserved */ | |
| default: | |
| VERBOSE(("type : unknown descriptor")); | |
| break; | |
| } | |
| } | |
| #endif | |
| } | |
| UINT32 | UINT32 |
| convert_laddr_to_paddr(UINT32 laddr) | convert_laddr_to_paddr(UINT32 laddr) |
| { | { |
| Line 313 convert_vaddr_to_paddr(unsigned int idx, | Line 370 convert_vaddr_to_paddr(unsigned int idx, |
| if (idx < CPU_SEGREG_NUM) { | if (idx < CPU_SEGREG_NUM) { |
| sdp = &CPU_STAT_SREG(idx); | sdp = &CPU_STAT_SREG(idx); |
| if (sdp->valid) { | if (SEG_IS_VALID(sdp)) { |
| laddr = CPU_STAT_SREGBASE(idx) + offset; | laddr = CPU_STAT_SREGBASE(idx) + offset; |
| return convert_laddr_to_paddr(laddr); | return convert_laddr_to_paddr(laddr); |
| } | } |