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| version 1.7, 2004/02/19 03:04:01 | version 1.13, 2005/03/12 12:32:54 |
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| Line 12 | Line 12 |
| * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. | * documentation and/or other materials provided with the distribution. |
| * 3. The name of the author may not be used to endorse or promote products | |
| * derived from this software without specific prior written permission. | |
| * | * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| Line 31 | Line 29 |
| #include "cpu.h" | #include "cpu.h" |
| #include "memory.h" | #include "memory.h" |
| #ifdef USE_FPU | #if defined(USE_FPU) |
| #include "instructions/fpu/fpu.h" | #include "instructions/fpu/fp.h" |
| #endif | #endif |
| Line 41 cpu_reg2str(void) | Line 39 cpu_reg2str(void) |
| { | { |
| static char buf[512]; | static char buf[512]; |
| sprintf(buf, | snprintf(buf, sizeof(buf), |
| "eax=%08lx ebx=%08lx ecx=%08lx edx=%08lx\n" | "eax=%08x ecx=%08x edx=%08x ebx=%08x\n" |
| "esp=%08lx ebp=%08lx esi=%08lx edi=%08lx\n" | "esp=%08x ebp=%08x esi=%08x edi=%08x\n" |
| "eip=%08lx prev_eip=%08lx\n" | "eip=%08x prev_eip=%08x\n" |
| "cs=%04x ss=%04x ds=%04x es=%04x fs=%04x gs=%04x\n" | "es=%04x cs=%04x ss=%04x ds=%04x fs=%04x gs=%04x\n" |
| "eflag=%08lx " | "eflag=%08x " |
| /* ID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CF */ | /* ID VIP VIF AC VM RF NT IOPL OF DF IF TF SF ZF AF PF CF */ |
| "[ ID=%d VIP=%d VIF=%d AC=%d VM=%d RF=%d NT=%d IOPL=%d %s %s %s TF=%d %s %s %s %s %s ]\n" | "[ ID=%d VIP=%d VIF=%d AC=%d VM=%d RF=%d NT=%d IOPL=%d %s %s %s TF=%d %s %s %s %s %s ]\n" |
| "gdtr=%08lx:%04x idtr=%08lx:%04x\n" | "gdtr=%08x:%04x idtr=%08x:%04x\n" |
| "ldtr=%04x(%08lx:%04lx) tr=%04x(%08lx:%04lx)\n" | "ldtr=%04x(%08x:%04x) tr=%04x(%08x:%04x)\n" |
| "cr0=%08lx cr1=%08lx cr2=%08lx cr3=%08lx cr4=%08lx mxcsr=%08lx", | "cr0=%08x cr1=%08x cr2=%08x cr3=%08x cr4=%08x mxcsr=%08x", |
| CPU_EAX, CPU_EBX, CPU_ECX, CPU_EDX, | CPU_EAX, CPU_ECX, CPU_EDX, CPU_EBX, |
| CPU_ESP, CPU_EBP,CPU_ESI, CPU_EDI, | CPU_ESP, CPU_EBP,CPU_ESI, CPU_EDI, |
| CPU_EIP, CPU_PREV_EIP, | CPU_EIP, CPU_PREV_EIP, |
| CPU_CS, CPU_SS, CPU_DS, CPU_ES, CPU_FS, CPU_GS, | CPU_CS, CPU_SS, CPU_DS, CPU_ES, CPU_FS, CPU_GS, |
| Line 82 cpu_reg2str(void) | Line 80 cpu_reg2str(void) |
| return buf; | return buf; |
| } | } |
| #ifdef USE_FPU | |
| char * | |
| fpu_reg2str(void) | |
| { | |
| static char buf[512]; | |
| char tmp[128]; | |
| int i; | |
| int no; | |
| strcpy(buf, "st=\n"); | |
| for (no = 0; no < 8; no++) { | |
| for (i = 9; i >= 0; i--) { | |
| sprintf(tmp, "%02x", FPU_ST[no][i]); | |
| strcat(buf, tmp); | |
| } | |
| strcat(buf, "\n"); | |
| } | |
| sprintf(tmp, | |
| "ctrl=%04x status=%04x tag=%04x\n" | |
| "inst=%08x%04x data=%08x%04x op=%03x\n", | |
| FPU_CTRLWORD, | |
| FPU_STATUSWORD, | |
| FPU_TAGWORD, | |
| FPU_INSTPTR_OFFSET, FPU_INSTPTR_SEG, | |
| FPU_DATAPTR_OFFSET, FPU_DATAPTR_SEG, | |
| FPU_LASTINSTOP); | |
| strcat(buf, tmp); | |
| return buf; | |
| } | |
| #endif | |
| static char * | static char * |
| a20str(void) | a20str(void) |
| { | { |
| static char buf[32]; | static char buf[32]; |
| sprintf(buf, "a20line=%s\n", CPU_STAT_ADRSMASK == 0xffffffff ? "enable" : "disable"); | snprintf(buf, sizeof(buf), "a20line=%s\n", |
| (CPU_STAT_ADRSMASK == 0xffffffff) ? "enable" : "disable"); | |
| return buf; | return buf; |
| } | } |
| Line 131 put_cpuinfo(void) | Line 97 put_cpuinfo(void) |
| strcpy(buf, cpu_reg2str()); | strcpy(buf, cpu_reg2str()); |
| strcat(buf, "\n"); | strcat(buf, "\n"); |
| #ifdef USE_FPU | #if defined(USE_FPU) |
| strcat(buf, fpu_reg2str()); | strcat(buf, fpu_reg2str()); |
| strcat(buf, "\n"); | strcat(buf, "\n"); |
| #endif | #endif |
| Line 155 dbg_printf(const char *str, ...) | Line 121 dbg_printf(const char *str, ...) |
| } | } |
| void | void |
| memory_dump(int idx, DWORD madr) | memory_dump(int idx, UINT32 madr) |
| { | { |
| DWORD addr; | UINT32 addr; |
| size_t size; | size_t size; |
| unsigned char buf[16]; | |
| size_t s, i; | size_t s, i; |
| BYTE p; | UINT8 buf[16]; |
| UINT8 c; | |
| if (madr < 0x80) { | if (madr < 0x80) { |
| size = madr + 0x80; | size = madr + 0x80; |
| Line 177 memory_dump(int idx, DWORD madr) | Line 143 memory_dump(int idx, DWORD madr) |
| memset(buf, '.', sizeof(buf)); | memset(buf, '.', sizeof(buf)); |
| } | } |
| p = cpu_vmemoryread(idx, addr + s); | c = cpu_vmemoryread(idx, addr + s); |
| VERBOSE(("%02x ", p)); | VERBOSE(("%02x ", c)); |
| if (p >= 0x20 && p <= 0x7e) | if (c >= 0x20 && c <= 0x7e) |
| buf[s % 16] = p; | buf[s % 16] = c; |
| if ((s % 16) == 15) { | if ((s % 16) == 15) { |
| VERBOSE(("| ")); | VERBOSE(("| ")); |
| Line 192 memory_dump(int idx, DWORD madr) | Line 158 memory_dump(int idx, DWORD madr) |
| } | } |
| void | void |
| gdtr_dump(DWORD base, DWORD limit) | gdtr_dump(UINT32 base, UINT limit) |
| { | { |
| DWORD v[2]; | UINT32 v[2]; |
| DWORD i; | UINT i; |
| VERBOSE(("GDTR_DUMP: GDTR_BASE = 0x%08x, GDTR_LIMIT = 0x%04x",base,limit)); | VERBOSE(("GDTR_DUMP: GDTR_BASE = 0x%08x, GDTR_LIMIT = 0x%04x", base, limit)); |
| for (i = 0; i < limit; i += 8) { | for (i = 0; i < limit; i += 8) { |
| v[0] = cpu_kmemoryread_d(base + i); | v[0] = cpu_kmemoryread_d(base + i); |
| Line 207 gdtr_dump(DWORD base, DWORD limit) | Line 173 gdtr_dump(DWORD base, DWORD limit) |
| } | } |
| void | void |
| ldtr_dump(DWORD base, DWORD limit) | ldtr_dump(UINT32 base, UINT limit) |
| { | { |
| DWORD v[2]; | UINT32 v[2]; |
| DWORD i; | UINT i; |
| VERBOSE(("LDTR_DUMP: LDTR_BASE = 0x%08x, LDTR_LIMIT = 0x%04x",base,limit)); | VERBOSE(("LDTR_DUMP: LDTR_BASE = 0x%08x, LDTR_LIMIT = 0x%04x", base, limit)); |
| for (i = 0; i < limit; i += 8) { | for (i = 0; i < limit; i += 8) { |
| v[0] = cpu_kmemoryread_d(base + i); | v[0] = cpu_kmemoryread_d(base + i); |
| Line 222 ldtr_dump(DWORD base, DWORD limit) | Line 188 ldtr_dump(DWORD base, DWORD limit) |
| } | } |
| void | void |
| idtr_dump(DWORD base, DWORD limit) | idtr_dump(UINT32 base, UINT limit) |
| { | { |
| DWORD v[2]; | UINT32 v[2]; |
| DWORD i; | UINT i; |
| VERBOSE(("IDTR_DUMP: IDTR_BASE = 0x%08x, IDTR_LIMIT = 0x%04x",base,limit)); | VERBOSE(("IDTR_DUMP: IDTR_BASE = 0x%08x, IDTR_LIMIT = 0x%04x", base, limit)); |
| for (i = 0; i < limit; i += 8) { | for (i = 0; i < limit; i += 8) { |
| v[0] = cpu_kmemoryread_d(base + i); | v[0] = cpu_kmemoryread_d(base + i); |
| Line 237 idtr_dump(DWORD base, DWORD limit) | Line 203 idtr_dump(DWORD base, DWORD limit) |
| } | } |
| void | void |
| tr_dump(WORD selector, DWORD base, DWORD limit) | tr_dump(UINT16 selector, UINT32 base, UINT limit) |
| { | { |
| DWORD v; | UINT32 v; |
| DWORD i; | UINT i; |
| (void)selector; | |
| VERBOSE(("TR_DUMP: selector = %04x", selector)); | VERBOSE(("TR_DUMP: selector = %04x", selector)); |
| Line 250 tr_dump(WORD selector, DWORD base, DWORD | Line 218 tr_dump(WORD selector, DWORD base, DWORD |
| } | } |
| } | } |
| DWORD | UINT32 |
| pde_dump(DWORD base, int idx) | pde_dump(UINT32 base, int idx) |
| { | { |
| DWORD paddr; | UINT32 paddr; |
| DWORD v; | UINT32 v; |
| int i; | int i; |
| if (idx < 0 && idx > -8192) { | if (idx < 0 && idx > -8192) { |
| Line 278 pde_dump(DWORD base, int idx) | Line 246 pde_dump(DWORD base, int idx) |
| return paddr; | return paddr; |
| } | } |
| DWORD | UINT32 |
| convert_laddr_to_paddr(DWORD laddr) | convert_laddr_to_paddr(UINT32 laddr) |
| { | { |
| DWORD paddr; /* physical address */ | UINT32 paddr; /* physical address */ |
| DWORD pde_addr; /* page directory entry address */ | UINT32 pde_addr; /* page directory entry address */ |
| DWORD pde; /* page directory entry */ | UINT32 pde; /* page directory entry */ |
| DWORD pte_addr; /* page table entry address */ | UINT32 pte_addr; /* page table entry address */ |
| DWORD pte; /* page table entry */ | UINT32 pte; /* page table entry */ |
| pde_addr = (CPU_CR3 & CPU_CR3_PD_MASK) | ((laddr >> 20) & 0xffc); | pde_addr = (CPU_CR3 & CPU_CR3_PD_MASK) | ((laddr >> 20) & 0xffc); |
| pde = cpu_memoryread_d(pde_addr); | pde = cpu_memoryread_d(pde_addr); |
| Line 302 convert_laddr_to_paddr(DWORD laddr) | Line 270 convert_laddr_to_paddr(DWORD laddr) |
| return paddr; | return paddr; |
| } | } |
| DWORD | UINT32 |
| convert_vaddr_to_paddr(unsigned int idx, DWORD offset) | convert_vaddr_to_paddr(unsigned int idx, UINT32 offset) |
| { | { |
| descriptor_t *sdp; | descriptor_t *sdp; |
| DWORD laddr; | UINT32 laddr; |
| if (idx < CPU_SEGREG_NUM) { | if (idx < CPU_SEGREG_NUM) { |
| sdp = &CPU_STAT_SREG(idx); | sdp = &CPU_STAT_SREG(idx); |