| version 1.1, 2003/12/08 00:55:31 | version 1.28, 2011/12/21 16:25:52 | 
| Line 1 | Line 1 | 
 | /*      $Id$    */ |  | 
 |  |  | 
 | /* | /* | 
 | * Copyright (c) 2003 NONAKA Kimihiro | * Copyright (c) 2003 NONAKA Kimihiro | 
 | * All rights reserved. | * All rights reserved. | 
| Line 12 | Line 10 | 
 | * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright | 
 | *    notice, this list of conditions and the following disclaimer in the | *    notice, this list of conditions and the following disclaimer in the | 
 | *    documentation and/or other materials provided with the distribution. | *    documentation and/or other materials provided with the distribution. | 
 | * 3. The name of the author may not be used to endorse or promote products |  | 
 | *    derived from this software without specific prior written permission. |  | 
 | * | * | 
 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 
 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 
| Line 31 | Line 27 | 
 | #include "cpu.h" | #include "cpu.h" | 
 | #include "ia32.mcr" | #include "ia32.mcr" | 
 |  |  | 
| void | const char *exception_str[EXCEPTION_NUM] = { | 
| memory_dump(int idx, DWORD madr) | "DE_EXCEPTION", | 
| { | "DB_EXCEPTION", | 
| DWORD addr; | "NMI_EXCEPTION", | 
| size_t size; | "BP_EXCEPTION", | 
| unsigned char buf[16]; | "OF_EXCEPTION", | 
| size_t s, i; | "BR_EXCEPTION", | 
| BYTE p; | "UD_EXCEPTION", | 
|  | "NM_EXCEPTION", | 
| if (madr < 0x80) { | "DF_EXCEPTION", | 
| size = madr + 0x80; | "CoProcesser Segment Overrun", | 
| addr = 0; | "TS_EXCEPTION", | 
| } else { | "NP_EXCEPTION", | 
| size = 0x100; | "SS_EXCEPTION", | 
| addr = madr - 0x80; | "GP_EXCEPTION", | 
| } | "PF_EXCEPTION", | 
| printf("memory dump\n-- \n"); | "Reserved", | 
| for (s = 0; s < size; s++) { | "MF_EXCEPTION", | 
| if ((s % 16) == 0) { | "AC_EXCEPTION", | 
| printf("%08x: ", addr + s); | "MC_EXCEPTION", | 
| memset(buf, '.', sizeof(buf)); | "XF_EXCEPTION", | 
| } | }; | 
|  |  | 
| p = cpu_vmemoryread(idx, addr + s); |  | 
| printf("%02x ", p); |  | 
| if (p >= 0x20 && p <= 0x7e) |  | 
| buf[s % 16] = p; |  | 
|  |  | 
| if ((s % 16) == 15) { |  | 
| printf("| "); |  | 
| for (i = 0; i < sizeof(buf); i++) |  | 
| printf("%c", buf[i]); |  | 
| printf("\n"); |  | 
| } |  | 
| } |  | 
| } |  | 
 |  |  | 
 | static const int exctype[EXCEPTION_NUM] = { | static const int exctype[EXCEPTION_NUM] = { | 
 | 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, 1, 1, 1, 1, 2, 0, 0, 0, 0, 0, | 1, 0, 0, 0, 0, 0, 0, 0, 3, 0, 1, 1, 1, 1, 2, 0, 0, 0, 0, 0, | 
| Line 84  exception(int num, int error_code) | Line 66  exception(int num, int error_code) | 
 | { | { | 
 | int errorp = 0; | int errorp = 0; | 
 |  |  | 
| VERBOSE(("exception: num = 0x%02x, error_code = %x", num, error_code)); | __ASSERT((unsigned int)num < EXCEPTION_NUM); | 
 |  |  | 
| CPU_STAT_NERROR++; | #if 0 | 
| if ((CPU_STAT_NERROR >= 3) | iptrace_out(); | 
| || (CPU_STAT_NERROR == 2 && CPU_STAT_PREV_EXCEPTION == DF_EXCEPTION)) { | debugwriteseg("execption.bin", &CPU_CS_DESC, CPU_PREV_EIP & 0xffff0000, 0x10000); | 
|  | #endif | 
|  |  | 
|  | VERBOSE(("exception: -------------------------------------------------------------- start")); | 
|  | VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); | 
|  | VERBOSE(("%s", cpu_reg2str())); | 
|  |  | 
|  | CPU_STAT_EXCEPTION_COUNTER_INC(); | 
|  | if ((CPU_STAT_EXCEPTION_COUNTER >= 3) | 
|  | || (CPU_STAT_EXCEPTION_COUNTER == 2 && CPU_STAT_PREV_EXCEPTION == DF_EXCEPTION)) { | 
 | /* Triple fault */ | /* Triple fault */ | 
 | ia32_panic("exception: catch triple fault!"); | ia32_panic("exception: catch triple fault!"); | 
 | } | } | 
 |  |  | 
 | switch (num) { | switch (num) { | 
 | case DE_EXCEPTION:      /* (F) 除算エラー */ | case DE_EXCEPTION:      /* (F) 除算エラー */ | 
 |  | case DB_EXCEPTION:      /* (F/T) デバッグ */ | 
 | case BR_EXCEPTION:      /* (F) BOUND の範囲外 */ | case BR_EXCEPTION:      /* (F) BOUND の範囲外 */ | 
 | case UD_EXCEPTION:      /* (F) 無効オペコード */ | case UD_EXCEPTION:      /* (F) 無効オペコード */ | 
 | case NM_EXCEPTION:      /* (F) デバイス使用不可 (FPU が無い) */ | case NM_EXCEPTION:      /* (F) デバイス使用不可 (FPU が無い) */ | 
 |  | case MF_EXCEPTION:      /* (F) 浮動小数点エラー */ | 
 | CPU_EIP = CPU_PREV_EIP; | CPU_EIP = CPU_PREV_EIP; | 
 |  | if (CPU_STATSAVE.cpu_stat.backout_sp) | 
 |  | CPU_ESP = CPU_PREV_ESP; | 
 | /*FALLTHROUGH*/ | /*FALLTHROUGH*/ | 
 | case DB_EXCEPTION:      /* (F/T) デバッグ */ |  | 
 | case NMI_EXCEPTION:     /* (I) NMI 割り込み */ | case NMI_EXCEPTION:     /* (I) NMI 割り込み */ | 
 | case BP_EXCEPTION:      /* (T) ブレークポイント */ | case BP_EXCEPTION:      /* (T) ブレークポイント */ | 
 | case OF_EXCEPTION:      /* (T) オーバーフロー */ | case OF_EXCEPTION:      /* (T) オーバーフロー */ | 
| Line 121  exception(int num, int error_code) | Line 115  exception(int num, int error_code) | 
 | case GP_EXCEPTION:      /* (F) 一般保護例外 (errcode) */ | case GP_EXCEPTION:      /* (F) 一般保護例外 (errcode) */ | 
 | case PF_EXCEPTION:      /* (F) ページフォルト (errcode) */ | case PF_EXCEPTION:      /* (F) ページフォルト (errcode) */ | 
 | CPU_EIP = CPU_PREV_EIP; | CPU_EIP = CPU_PREV_EIP; | 
 |  | if (CPU_STATSAVE.cpu_stat.backout_sp) | 
 |  | CPU_ESP = CPU_PREV_ESP; | 
 | errorp = 1; | errorp = 1; | 
 | break; | break; | 
 |  |  | 
 | case MF_EXCEPTION:      /* (F) 浮動小数点エラー */ |  | 
 | CPU_EIP = CPU_PREV_EIP; |  | 
 | errorp = 0; |  | 
 | break; |  | 
 |  |  | 
 | case MC_EXCEPTION:      /* (A) マシンチェック */ |  | 
 | CPU_EIP = CPU_PREV_EIP; |  | 
 | errorp = 0; |  | 
 | break; |  | 
 |  |  | 
 | case XF_EXCEPTION:      /* (F) ストリーミング SIMD 拡張命令 */ |  | 
 | CPU_EIP = CPU_PREV_EIP; |  | 
 | errorp = 0; |  | 
 | break; |  | 
 |  |  | 
 | default: | default: | 
| ia32_panic("exception(): unknown exception (%d)", num); | ia32_panic("exception: unknown exception (%d)", num); | 
 | break; | break; | 
 | } | } | 
 |  |  | 
| if (CPU_STAT_NERROR >= 2) { | if (CPU_STAT_EXCEPTION_COUNTER >= 2) { | 
 | if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { | if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { | 
 | num = DF_EXCEPTION; | num = DF_EXCEPTION; | 
 |  | errorp = 1; | 
 |  | error_code = 0; | 
 | } | } | 
 | } | } | 
 | CPU_STAT_PREV_EXCEPTION = num; | CPU_STAT_PREV_EXCEPTION = num; | 
 |  |  | 
| INTERRUPT(num, FALSE, errorp, error_code); | VERBOSE(("exception: ---------------------------------------------------------------- end")); | 
| CPU_STAT_NERROR = 0; |  | 
|  | interrupt(num, INTR_TYPE_EXTINTR, errorp, error_code); | 
|  | #if defined(IA32_SUPPORT_DEBUG_REGISTER) | 
|  | if (num != BP_EXCEPTION) { | 
|  | if (CPU_INST_OP32) { | 
|  | set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG); | 
|  | } | 
|  | } | 
|  | #endif | 
|  | CPU_STAT_EXCEPTION_COUNTER_CLEAR(); | 
 | siglongjmp(exec_1step_jmpbuf, 1); | siglongjmp(exec_1step_jmpbuf, 1); | 
 | } | } | 
 |  |  | 
| Line 161  exception(int num, int error_code) | Line 153  exception(int num, int error_code) | 
 | * | * | 
 | *  31                                16 15 14 13 12       8 7   5 4       0 | *  31                                16 15 14 13 12       8 7   5 4       0 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
| * |         オフセット 31..16          | P| DPL | 0 1 1 0 0|0 0 0|カウント | 4 | * |         オフセット 31..16          | P| DPL | 0 D 1 0 0|0 0 0|カウント | 4 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
 | *  31                                16 15                                0 | *  31                                16 15                                0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
| Line 176  exception(int num, int error_code) | Line 168  exception(int num, int error_code) | 
 | * | * | 
 | *  31                                16 15 14 13 12       8 7             0 | *  31                                16 15 14 13 12       8 7             0 | 
 | * +------------------------------------+--+-----+----------+---------------+ | * +------------------------------------+--+-----+----------+---------------+ | 
| * |              Reserved              | P| DPL | 0 D 1 0 1|   Reserved    | 4 | * |              Reserved              | P| DPL | 0 0 1 0 1|   Reserved    | 4 | 
 | * +------------------------------------+--+-----+----------+---------------+ | * +------------------------------------+--+-----+----------+---------------+ | 
 | *  31                                16 15                                0 | *  31                                16 15                                0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
| Line 212  exception(int num, int error_code) | Line 204  exception(int num, int error_code) | 
 | * D          : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | * D          : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | 
 | */ | */ | 
 |  |  | 
 |  | static void interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | 
 |  | static void interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | 
 |  |  | 
 | void | void | 
| interrupt(int num, int softintp, int errorp, int error_code) | interrupt(int num, int intrtype, int errorp, int error_code) | 
 | { | { | 
| DWORD idt_idx; | descriptor_t gsd; | 
|  | UINT idt_idx; | 
|  | UINT32 new_ip; | 
|  | UINT16 new_cs; | 
|  | int exc_errcode; | 
|  |  | 
|  | VERBOSE(("interrupt: num = 0x%02x, intrtype = %s, errorp = %s, error_code = %08x", num, intrtype ? "on" : "off", errorp ? "on" : "off", error_code)); | 
 |  |  | 
| VERBOSE(("interrupt: num = 0x%02x, softintp = %s, errorp = %s, error_code = %02x", num, softintp ? "on" : "off", errorp ? "on" : "off", error_code)); | CPU_SET_PREV_ESP(); | 
 |  |  | 
 | if (!CPU_STAT_PM) { | if (!CPU_STAT_PM) { | 
 | /* real mode */ | /* real mode */ | 
 |  | CPU_WORKCLOCK(20); | 
 |  |  | 
 | idt_idx = num * 4; | idt_idx = num * 4; | 
 | if (idt_idx + 3 > CPU_IDTR_LIMIT) { | if (idt_idx + 3 > CPU_IDTR_LIMIT) { | 
| EXCEPTION(GP_EXCEPTION, num * 4 | 2); | VERBOSE(("interrupt: real-mode IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT)); | 
|  | EXCEPTION(GP_EXCEPTION, idt_idx + 2); | 
 | } | } | 
 |  |  | 
| if (!softintp) { | if ((intrtype == INTR_TYPE_EXTINTR) && CPU_STAT_HLT) { | 
| BYTE op = cpu_codefetch(CPU_EIP); | VERBOSE(("interrupt: reset HTL in real mode")); | 
| if (op == 0xf4) {       /* hlt */ | CPU_EIP++; | 
| CPU_EIP++; | CPU_STAT_HLT = 0; | 
| } |  | 
 | } | } | 
 |  |  | 
 | REGPUSH0(REAL_FLAGREG); | REGPUSH0(REAL_FLAGREG); | 
 | REGPUSH0(CPU_CS); | REGPUSH0(CPU_CS); | 
 | REGPUSH0(CPU_IP); | REGPUSH0(CPU_IP); | 
 |  |  | 
| if (softintp) { | CPU_EFLAG &= ~(T_FLAG | I_FLAG | AC_FLAG | RF_FLAG); | 
| CPU_EFLAG &= ~(T_FLAG | I_FLAG | AC_FLAG); | CPU_TRAP = 0; | 
| CPU_TRAP = 0; |  | 
| } |  | 
 |  |  | 
| CPU_EIP = cpu_memoryread_w(CPU_IDTR_BASE + num * 4); | new_ip = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx); | 
| CPU_CS = cpu_memoryread_w(CPU_IDTR_BASE + num * 4 + 2); | new_cs = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx + 2); | 
| CPU_SET_SEGREG(CPU_CS_INDEX, CPU_CS); | LOAD_SEGREG(CPU_CS_INDEX, new_cs); | 
| CPU_WORKCLOCK(20); | CPU_EIP = new_ip; | 
 | } else { | } else { | 
 | /* protected mode */ | /* protected mode */ | 
| selector_t task_sel, intr_sel, ss_sel; | CPU_WORKCLOCK(200); | 
| descriptor_t gd; |  | 
| int rv; |  | 
| DWORD flags = REAL_EFLAGREG; |  | 
| DWORD mask = 0; |  | 
| DWORD new_ip, new_sp; |  | 
| DWORD old_ip, old_sp; |  | 
| WORD new_ss; |  | 
| WORD old_cs, old_ss; |  | 
 |  |  | 
| /* VM86 && IOPL < 3 && interrupt cause == INTn */ | VERBOSE(("interrupt: -------------------------------------------------------------- start")); | 
| if (CPU_STAT_VM86 && (CPU_STAT_IOPL < CPU_IOPL3) && (softintp == -1)) { | VERBOSE(("interrupt: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | 
| EXCEPTION(GP_EXCEPTION, 0); |  | 
|  | #if defined(DEBUG) | 
|  | if (num == 0x80) { | 
|  | /* Linux, FreeBSD, NetBSD, OpenBSD system call */ | 
|  | VERBOSE(("interrupt: syscall# = %d\n%s", CPU_EAX, cpu_reg2str())); | 
 | } | } | 
 |  | #endif | 
 |  |  | 
 | idt_idx = num * 8; | idt_idx = num * 8; | 
 |  | exc_errcode = idt_idx + 2; | 
 |  | if (intrtype == INTR_TYPE_EXTINTR) | 
 |  | exc_errcode++; | 
 |  |  | 
 | if (idt_idx + 7 > CPU_IDTR_LIMIT) { | if (idt_idx + 7 > CPU_IDTR_LIMIT) { | 
| EXCEPTION(GP_EXCEPTION, num * 8 | 2 | !softintp); | VERBOSE(("interrupt: IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT)); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  |  | 
| CPU_SET_GATEDESC(&gd, CPU_IDTR_BASE + idt_idx); | /* load a gate descriptor from interrupt descriptor table */ | 
| if (!gd.valid || !gd.p) { | memset(&gsd, 0, sizeof(gsd)); | 
| EXCEPTION(GP_EXCEPTION, num * 8 | 2 | !softintp); | load_descriptor(&gsd, CPU_IDTR_BASE + idt_idx); | 
|  | if (!SEG_IS_VALID(&gsd)) { | 
|  | VERBOSE(("interrupt: gate descripter is invalid.")); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
|  | } | 
|  | if (!SEG_IS_SYSTEM(&gsd)) { | 
|  | VERBOSE(("interrupt: gate descriptor is not system segment.")); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  |  | 
| switch (gd.type) { | switch (gsd.type) { | 
 | case CPU_SYSDESC_TYPE_TASK: | case CPU_SYSDESC_TYPE_TASK: | 
 | case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: | 
 | case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: | 
| Line 282  interrupt(int num, int softintp, int err | Line 292  interrupt(int num, int softintp, int err | 
 | break; | break; | 
 |  |  | 
 | default: | default: | 
| EXCEPTION(GP_EXCEPTION, num * 8 | 2 | !softintp); | VERBOSE(("interrupt: invalid gate type (%d)", gsd.type)); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
 | break; | break; | 
 | } | } | 
 |  |  | 
 | /* 5.10.1.1. 例外/割り込みハンドラ・プロシージャの保護 */ | /* 5.10.1.1. 例外/割り込みハンドラ・プロシージャの保護 */ | 
| if (softintp && (gd.dpl < CPU_STAT_CPL)) { | if ((intrtype != INTR_TYPE_EXTINTR) && (gsd.dpl < CPU_STAT_CPL)) { | 
| EXCEPTION(GP_EXCEPTION, num * 8 | 2); | VERBOSE(("interrupt: intrtype(%d) && DPL(%d) < CPL(%d)", intrtype, gsd.dpl, CPU_STAT_CPL)); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  |  | 
| switch (gd.type) { | if (!SEG_IS_PRESENT(&gsd)) { | 
| case CPU_SYSDESC_TYPE_TASK: | VERBOSE(("interrupt: gate descriptor is not present.")); | 
| rv = parse_selector(&task_sel, gd.u.gate.selector); | EXCEPTION(NP_EXCEPTION, exc_errcode); | 
| if (rv < 0 || task_sel.ldt) { | } | 
| EXCEPTION(TS_EXCEPTION, task_sel.idx); |  | 
| } |  | 
|  |  | 
| /* check gate type */ |  | 
| switch (task_sel.desc.type) { |  | 
| case CPU_SYSDESC_TYPE_TSS_16: |  | 
| case CPU_SYSDESC_TYPE_TSS_32: |  | 
| break; |  | 
|  |  | 
| case CPU_SYSDESC_TYPE_TSS_BUSY_16: |  | 
| case CPU_SYSDESC_TYPE_TSS_BUSY_32: |  | 
| VERBOSE(("interrupt: task is busy.")); |  | 
| /*FALLTHROUGH*/ |  | 
| default: |  | 
| EXCEPTION(TS_EXCEPTION, task_sel.idx); |  | 
| break; |  | 
| } |  | 
|  |  | 
| /* not present */ |  | 
| if (selector_is_not_present(&task_sel)) { |  | 
| EXCEPTION(NP_EXCEPTION, task_sel.idx); |  | 
| } |  | 
|  |  | 
| task_switch(&task_sel, TASK_SWITCH_INTR); |  | 
 |  |  | 
| if (errorp) { | if ((intrtype == INTR_TYPE_EXTINTR) && CPU_STAT_HLT) { | 
| if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_32) { | VERBOSE(("interrupt: reset HTL in protected mode")); | 
| CHECK_STACK_PUSH(&CPU_STAT_SREG(CPU_SS_INDEX), CPU_ESP, 4); | CPU_EIP++; | 
| PUSH0_32(error_code); | CPU_STAT_HLT = 0; | 
| } else { | } | 
| CHECK_STACK_PUSH(&CPU_STAT_SREG(CPU_SS_INDEX), CPU_ESP, 2); |  | 
| PUSH0_16(error_code); |  | 
| } |  | 
| } |  | 
 |  |  | 
| /* out of range */ | switch (gsd.type) { | 
| if (CPU_EIP > CPU_STAT_CS_LIMIT) { | case CPU_SYSDESC_TYPE_TASK: | 
| EXCEPTION(GP_EXCEPTION, 0); | interrupt_task_gate(&gsd, intrtype, errorp, error_code); | 
| } |  | 
 | break; | break; | 
 |  |  | 
 | case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: | 
 | case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: | 
 | flags &= I_FLAG; |  | 
 | mask |= I_FLAG; |  | 
 | /*FALLTHROUGH*/ |  | 
 | case CPU_SYSDESC_TYPE_TRAP_16: | case CPU_SYSDESC_TYPE_TRAP_16: | 
 | case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: | 
| flags &= ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); | interrupt_intr_or_trap(&gsd, intrtype, errorp, error_code); | 
| mask |= T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; | break; | 
 |  |  | 
| new_ip = intr_sel.desc.u.seg.segbase; | default: | 
| old_ss = CPU_SS; | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
| old_cs = CPU_CS; | break; | 
| old_ip = CPU_EIP; | } | 
| old_sp = CPU_ESP; |  | 
|  |  | 
| VERBOSE(("TRAP-OR-INTERRUPT-GATE")); |  | 
|  |  | 
| rv = parse_selector(&intr_sel, gd.u.gate.selector); |  | 
| if (rv < 0) { |  | 
| EXCEPTION(GP_EXCEPTION, intr_sel.idx | !softintp); |  | 
| } |  | 
 |  |  | 
| if (!intr_sel.desc.s | VERBOSE(("interrupt: ---------------------------------------------------------------- end")); | 
| || !intr_sel.desc.u.seg.c | } | 
| || (intr_sel.desc.dpl > CPU_STAT_CPL)) { |  | 
| EXCEPTION(GP_EXCEPTION, intr_sel.idx | !softintp); | CPU_CLEAR_PREV_ESP(); | 
| } | } | 
|  |  | 
|  | static void | 
|  | interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | 
|  | { | 
|  | selector_t task_sel; | 
|  | int rv; | 
|  |  | 
|  | VERBOSE(("interrupt: TASK-GATE")); | 
|  |  | 
|  | rv = parse_selector(&task_sel, gsdp->u.gate.selector); | 
|  | if (rv < 0 || task_sel.ldt || !SEG_IS_SYSTEM(&task_sel.desc)) { | 
|  | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT, type = %s)", gsdp->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G', task_sel.desc.s ? "code/data" : "system")); | 
|  | EXCEPTION(TS_EXCEPTION, task_sel.idx); | 
|  | } | 
|  |  | 
|  | /* check gate type */ | 
|  | switch (task_sel.desc.type) { | 
|  | case CPU_SYSDESC_TYPE_TSS_16: | 
|  | case CPU_SYSDESC_TYPE_TSS_32: | 
|  | break; | 
 |  |  | 
| /* not present */ | case CPU_SYSDESC_TYPE_TSS_BUSY_16: | 
| if (selector_is_not_present(&intr_sel)) { | case CPU_SYSDESC_TYPE_TSS_BUSY_32: | 
| EXCEPTION(NP_EXCEPTION, intr_sel.idx | !softintp); | VERBOSE(("interrupt: task is busy.")); | 
|  | /*FALLTHROUGH*/ | 
|  | default: | 
|  | VERBOSE(("interrupt: invalid gate type (%d)", task_sel.desc.type)); | 
|  | EXCEPTION(TS_EXCEPTION, task_sel.idx); | 
|  | break; | 
|  | } | 
|  |  | 
|  | /* not present */ | 
|  | if (selector_is_not_present(&task_sel)) { | 
|  | VERBOSE(("interrupt: selector is not present")); | 
|  | EXCEPTION(NP_EXCEPTION, task_sel.idx); | 
|  | } | 
|  |  | 
|  | task_switch(&task_sel, TASK_SWITCH_INTR); | 
|  |  | 
|  | CPU_SET_PREV_ESP(); | 
|  |  | 
|  | if (errorp) { | 
|  | XPUSH0(error_code); | 
|  | } | 
|  |  | 
|  | /* out of range */ | 
|  | if (CPU_EIP > CPU_STAT_CS_LIMIT) { | 
|  | VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", CPU_EIP, CPU_STAT_CS_LIMIT)); | 
|  | EXCEPTION(GP_EXCEPTION, 0); | 
|  | } | 
|  | } | 
|  |  | 
|  | static void | 
|  | interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | 
|  | { | 
|  | selector_t cs_sel, ss_sel; | 
|  | UINT stacksize; | 
|  | UINT32 old_flags; | 
|  | UINT32 new_flags; | 
|  | UINT32 mask; | 
|  | UINT32 sp; | 
|  | UINT32 new_ip, new_sp; | 
|  | UINT32 old_ip, old_sp; | 
|  | UINT16 old_cs, old_ss, new_ss; | 
|  | int exc_errcode; | 
|  | int rv; | 
|  |  | 
|  | new_ip = gsdp->u.gate.offset; | 
|  | old_ss = CPU_SS; | 
|  | old_cs = CPU_CS; | 
|  | old_ip = CPU_EIP; | 
|  | old_sp = CPU_ESP; | 
|  | old_flags = REAL_EFLAGREG; | 
|  | new_flags = REAL_EFLAGREG & ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); | 
|  | mask = T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; | 
|  |  | 
|  | switch (gsdp->type) { | 
|  | case CPU_SYSDESC_TYPE_INTR_16: | 
|  | case CPU_SYSDESC_TYPE_INTR_32: | 
|  | VERBOSE(("interrupt: INTERRUPT-GATE")); | 
|  | new_flags &= ~I_FLAG; | 
|  | mask |= I_FLAG; | 
|  | break; | 
|  |  | 
|  | case CPU_SYSDESC_TYPE_TRAP_16: | 
|  | case CPU_SYSDESC_TYPE_TRAP_32: | 
|  | VERBOSE(("interrupt: TRAP-GATE")); | 
|  | break; | 
|  |  | 
|  | default: | 
|  | ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gsdp->type); | 
|  | break; | 
|  | } | 
|  |  | 
|  | exc_errcode = gsdp->u.gate.selector & ~3; | 
|  | if (intrtype == INTR_TYPE_EXTINTR) | 
|  | exc_errcode++; | 
|  |  | 
|  | rv = parse_selector(&cs_sel, gsdp->u.gate.selector); | 
|  | if (rv < 0) { | 
|  | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gsdp->u.gate.selector, rv)); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
|  | } | 
|  |  | 
|  | /* check segment type */ | 
|  | if (SEG_IS_SYSTEM(&cs_sel.desc)) { | 
|  | VERBOSE(("interrupt: code segment is system segment")); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
|  | } | 
|  | if (SEG_IS_DATA(&cs_sel.desc)) { | 
|  | VERBOSE(("interrupt: code segment is data segment")); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
|  | } | 
|  |  | 
|  | /* check privilege level */ | 
|  | if (cs_sel.desc.dpl > CPU_STAT_CPL) { | 
|  | VERBOSE(("interrupt: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL)); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
|  | } | 
|  |  | 
|  | /* not present */ | 
|  | if (selector_is_not_present(&cs_sel)) { | 
|  | VERBOSE(("interrupt: selector is not present")); | 
|  | EXCEPTION(NP_EXCEPTION, exc_errcode); | 
|  | } | 
|  |  | 
|  | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) { | 
|  | stacksize = errorp ? 12 : 10; | 
|  | if (!CPU_STAT_VM86) { | 
|  | VERBOSE(("interrupt: INTER-PRIVILEGE-LEVEL-INTERRUPT")); | 
|  | } else { | 
|  | /* VM86 */ | 
|  | VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE")); | 
|  | if (cs_sel.desc.dpl != 0) { | 
|  | /* 16.3.1.1 */ | 
|  | VERBOSE(("interrupt: DPL[CS](%d) != 0", cs_sel.desc.dpl)); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  | stacksize += 8; | 
 |  | } | 
 |  | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | 
 |  | stacksize *= 2; | 
 |  | } | 
 |  |  | 
| if (!intr_sel.desc.u.seg.ec && (intr_sel.desc.dpl < CPU_STAT_CPL)) { | /* get stack pointer from TSS */ | 
| DWORD stacksize; | get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp); | 
 |  |  | 
| if (CPU_STAT_VM86) { | /* parse stack segment descriptor */ | 
| VERBOSE(("INTER-PRIVILEGE-LEVEL-INTERRUPT")); | rv = parse_selector(&ss_sel, new_ss); | 
| stacksize = errorp ? 12 : 10; |  | 
| } else { | /* update exception error code */ | 
| if (intr_sel.desc.dpl != 0) { | exc_errcode = ss_sel.idx; | 
| EXCEPTION(GP_EXCEPTION, intr_sel.idx); | if (intrtype == INTR_TYPE_EXTINTR) | 
| } | exc_errcode++; | 
| VERBOSE(("INTERRUPT-FROM-VIRTUAL-8086-MODE")); |  | 
| stacksize = errorp ? 20 : 18; | if (rv < 0) { | 
| } | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", new_ss, rv)); | 
|  | EXCEPTION(TS_EXCEPTION, exc_errcode); | 
| get_stack_from_tss(intr_sel.desc.dpl, &new_ss, &new_sp); | } | 
| rv = parse_selector(&ss_sel, new_ss); |  | 
| if (rv < 0) { | /* check privilege level */ | 
| EXCEPTION(TS_EXCEPTION, ss_sel.idx | !softintp); | if (ss_sel.rpl != cs_sel.desc.dpl) { | 
| } | VERBOSE(("interrupt: selector RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel.desc.dpl)); | 
|  | EXCEPTION(TS_EXCEPTION, exc_errcode); | 
| if ((ss_sel.rpl != intr_sel.desc.dpl) | } | 
| || (ss_sel.desc.dpl != intr_sel.desc.dpl) | if (ss_sel.desc.dpl != cs_sel.desc.dpl) { | 
| || !ss_sel.desc.s | VERBOSE(("interrupt: descriptor DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel.desc.dpl)); | 
| || ss_sel.desc.u.seg.c | EXCEPTION(TS_EXCEPTION, exc_errcode); | 
| || !ss_sel.desc.u.seg.wr) { | } | 
| EXCEPTION(TS_EXCEPTION, ss_sel.idx | !softintp); |  | 
| } | /* stack segment must be writable data segment. */ | 
|  | if (SEG_IS_SYSTEM(&ss_sel.desc)) { | 
| /* not present */ | VERBOSE(("interrupt: stack segment is system segment")); | 
| if (selector_is_not_present(&ss_sel)) { | EXCEPTION(TS_EXCEPTION, exc_errcode); | 
| EXCEPTION(SS_EXCEPTION, ss_sel.idx | !softintp); | } | 
| } | if (SEG_IS_CODE(&ss_sel.desc)) { | 
|  | VERBOSE(("interrupt: stack segment is code segment")); | 
| switch (gd.type) { | EXCEPTION(TS_EXCEPTION, exc_errcode); | 
| case CPU_SYSDESC_TYPE_INTR_32: | } | 
| case CPU_SYSDESC_TYPE_TRAP_32: | if (!SEG_IS_WRITABLE_DATA(&ss_sel.desc)) { | 
| CHECK_STACK_PUSH(&ss_sel.desc, new_sp, stacksize * 2); | VERBOSE(("interrupt: stack segment is read-only data segment")); | 
| break; | EXCEPTION(TS_EXCEPTION, exc_errcode); | 
|  | } | 
| case CPU_SYSDESC_TYPE_INTR_16: |  | 
| case CPU_SYSDESC_TYPE_TRAP_16: | /* not present */ | 
| CHECK_STACK_PUSH(&ss_sel.desc, new_sp, stacksize); | if (selector_is_not_present(&ss_sel)) { | 
| new_ip &= 0xffff; | VERBOSE(("interrupt: selector is not present")); | 
| break; | EXCEPTION(SS_EXCEPTION, exc_errcode); | 
| } | } | 
|  |  | 
| /* out of range */ | /* check stack room size */ | 
| if (new_ip > intr_sel.desc.u.seg.limit) { | cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize); | 
| EXCEPTION(GP_EXCEPTION, 0); |  | 
| } | /* out of range */ | 
|  | if (new_ip > cs_sel.desc.u.seg.limit) { | 
| load_ss(new_ss, &ss_sel.desc, intr_sel.desc.dpl); | VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit)); | 
| CPU_ESP = new_sp; | EXCEPTION(GP_EXCEPTION, 0); | 
|  | } | 
| if (!CPU_STAT_VM86) { |  | 
| switch (gd.type) { | load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.desc.dpl); | 
| case CPU_SYSDESC_TYPE_INTR_32: | CPU_ESP = new_sp; | 
| case CPU_SYSDESC_TYPE_TRAP_32: |  | 
| PUSH0_32(CPU_GS); | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); | 
| PUSH0_32(CPU_FS); | CPU_EIP = new_ip; | 
| PUSH0_32(CPU_DS); |  | 
| PUSH0_32(CPU_ES); | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | 
| break; | if (CPU_STAT_VM86) { | 
|  | PUSH0_32(CPU_GS); | 
| case CPU_SYSDESC_TYPE_INTR_16: | PUSH0_32(CPU_FS); | 
| case CPU_SYSDESC_TYPE_TRAP_16: | PUSH0_32(CPU_DS); | 
| PUSH0_16(CPU_GS); | PUSH0_32(CPU_ES); | 
| PUSH0_16(CPU_FS); |  | 
| PUSH0_16(CPU_DS); | LOAD_SEGREG(CPU_GS_INDEX, 0); | 
| PUSH0_16(CPU_ES); | CPU_STAT_SREG(CPU_GS_INDEX).valid = 0; | 
| break; | LOAD_SEGREG(CPU_FS_INDEX, 0); | 
| } | CPU_STAT_SREG(CPU_FS_INDEX).valid = 0; | 
|  | LOAD_SEGREG(CPU_DS_INDEX, 0); | 
| CPU_SET_SEGREG(CPU_GS_INDEX, 0); | CPU_STAT_SREG(CPU_DS_INDEX).valid = 0; | 
| CPU_SET_SEGREG(CPU_FS_INDEX, 0); | LOAD_SEGREG(CPU_ES_INDEX, 0); | 
| CPU_SET_SEGREG(CPU_DS_INDEX, 0); | CPU_STAT_SREG(CPU_ES_INDEX).valid = 0; | 
| CPU_SET_SEGREG(CPU_ES_INDEX, 0); |  | 
| } |  | 
|  |  | 
| switch (gd.type) { |  | 
| case CPU_SYSDESC_TYPE_INTR_32: |  | 
| case CPU_SYSDESC_TYPE_TRAP_32: |  | 
| PUSH0_32(old_ss); |  | 
| PUSH0_32(old_sp); |  | 
| PUSH0_32(REAL_EFLAGREG); |  | 
| PUSH0_32(old_cs); |  | 
| PUSH0_32(old_ip); |  | 
| if (errorp) { |  | 
| PUSH0_32(error_code); |  | 
| } |  | 
| break; |  | 
|  |  | 
| case CPU_SYSDESC_TYPE_INTR_16: |  | 
| case CPU_SYSDESC_TYPE_TRAP_16: |  | 
| PUSH0_16(old_ss); |  | 
| PUSH0_16(old_sp); |  | 
| PUSH0_16(REAL_FLAGREG); |  | 
| PUSH0_16(old_cs); |  | 
| PUSH0_16(old_ip); |  | 
| if (errorp) { |  | 
| PUSH0_16(error_code); |  | 
| } |  | 
| break; |  | 
| } |  | 
|  |  | 
| load_cs(intr_sel.selector, &intr_sel.desc, intr_sel.desc.dpl); |  | 
| SET_EIP(new_ip); |  | 
| set_eflags(flags, mask); |  | 
| } else { |  | 
| if (CPU_STAT_VM86 |  | 
| || (!intr_sel.desc.u.seg.ec && (intr_sel.desc.dpl != CPU_STAT_CPL))) { |  | 
| EXCEPTION(GP_EXCEPTION, intr_sel.idx); |  | 
| } |  | 
| VERBOSE(("INTRA-PRIVILEGE-LEVEL-INTERRUPT")); |  | 
|  |  | 
| switch (gd.type) { |  | 
| case CPU_SYSDESC_TYPE_INTR_32: |  | 
| case CPU_SYSDESC_TYPE_TRAP_32: |  | 
| CHECK_STACK_PUSH(&ss_sel.desc, new_sp, errorp ? 16 : 12); |  | 
| break; |  | 
|  |  | 
| case CPU_SYSDESC_TYPE_INTR_16: |  | 
| case CPU_SYSDESC_TYPE_TRAP_16: |  | 
| CHECK_STACK_PUSH(&ss_sel.desc, new_sp, errorp ? 8 : 6); |  | 
| new_ip &= 0xffff; |  | 
| break; |  | 
| } |  | 
|  |  | 
| /* out of range */ |  | 
| if (new_ip > intr_sel.desc.u.seg.limit) { |  | 
| EXCEPTION(GP_EXCEPTION, 0); |  | 
| } |  | 
|  |  | 
| switch (gd.type) { |  | 
| case CPU_SYSDESC_TYPE_INTR_32: |  | 
| case CPU_SYSDESC_TYPE_TRAP_32: |  | 
| PUSH0_32(REAL_EFLAGREG); |  | 
| PUSH0_32(CPU_CS); |  | 
| PUSH0_32(CPU_EIP); |  | 
| if (errorp) { |  | 
| PUSH0_32(error_code); |  | 
| } |  | 
| break; |  | 
|  |  | 
| case CPU_SYSDESC_TYPE_INTR_16: |  | 
| case CPU_SYSDESC_TYPE_TRAP_16: |  | 
| PUSH0_16(REAL_FLAGREG); |  | 
| PUSH0_16(CPU_CS); |  | 
| PUSH0_16(CPU_IP); |  | 
| if (errorp) { |  | 
| PUSH0_16(error_code); |  | 
| } |  | 
| break; |  | 
| } |  | 
|  |  | 
| load_cs(intr_sel.selector, &intr_sel.desc, CPU_STAT_CPL); |  | 
| SET_EIP(new_ip); |  | 
| set_eflags(flags, mask); |  | 
 | } | } | 
| break; | PUSH0_32(old_ss); | 
|  | PUSH0_32(old_sp); | 
|  | PUSH0_32(old_flags); | 
|  | PUSH0_32(old_cs); | 
|  | PUSH0_32(old_ip); | 
|  | if (errorp) { | 
|  | PUSH0_32(error_code); | 
|  | } | 
|  | } else { | 
|  | if (CPU_STAT_VM86) { | 
|  | ia32_panic("interrupt: 16bit gate && VM86"); | 
|  | } | 
|  | PUSH0_16(old_ss); | 
|  | PUSH0_16(old_sp); | 
|  | PUSH0_16(old_flags); | 
|  | PUSH0_16(old_cs); | 
|  | PUSH0_16(old_ip); | 
|  | if (errorp) { | 
|  | PUSH0_16(error_code); | 
|  | } | 
|  | } | 
|  | } else { | 
|  | if (CPU_STAT_VM86) { | 
|  | VERBOSE(("interrupt: VM86")); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
|  | } | 
|  | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl != CPU_STAT_CPL)) { | 
|  | VERBOSE(("interrupt: %sCONFORMING-CODE-SEGMENT(%s) && DPL[CS](%d) != CPL", SEG_IS_CONFORMING_CODE(&cs_sel.desc) ? "" : "NON-", cs_sel.desc.dpl, CPU_STAT_CPL)); | 
|  | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
|  | } | 
 |  |  | 
| default: | VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); | 
| EXCEPTION(GP_EXCEPTION, num * 8 | 2 | !softintp); |  | 
| break; | stacksize = errorp ? 8 : 6; | 
|  | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | 
|  | stacksize *= 2; | 
|  | } | 
|  |  | 
|  | /* check stack room size */ | 
|  | if (CPU_STAT_SS32) { | 
|  | sp = CPU_ESP; | 
|  | } else { | 
|  | sp = CPU_SP; | 
|  | } | 
|  | SS_PUSH_CHECK(sp, stacksize); | 
|  |  | 
|  | /* out of range */ | 
|  | if (new_ip > cs_sel.desc.u.seg.limit) { | 
|  | VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit)); | 
|  | EXCEPTION(GP_EXCEPTION, 0); | 
|  | } | 
|  |  | 
|  | load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); | 
|  | CPU_EIP = new_ip; | 
|  |  | 
|  | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | 
|  | PUSH0_32(old_flags); | 
|  | PUSH0_32(old_cs); | 
|  | PUSH0_32(old_ip); | 
|  | if (errorp) { | 
|  | PUSH0_32(error_code); | 
|  | } | 
|  | } else { | 
|  | PUSH0_16(old_flags); | 
|  | PUSH0_16(old_cs); | 
|  | PUSH0_16(old_ip); | 
|  | if (errorp) { | 
|  | PUSH0_16(error_code); | 
|  | } | 
 | } | } | 
 | } | } | 
 |  | set_eflags(new_flags, mask); | 
 |  |  | 
 |  | VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | 
 | } | } |