| version 1.14, 2004/03/08 12:56:22 | version 1.16, 2004/03/23 15:29:34 | 
| Line 143  exception(int num, int error_code) | Line 143  exception(int num, int error_code) | 
 | #if defined(IA32_SUPPORT_DEBUG_REGISTER) | #if defined(IA32_SUPPORT_DEBUG_REGISTER) | 
 | if (num != BP_EXCEPTION) { | if (num != BP_EXCEPTION) { | 
 | if (CPU_INST_OP32) { | if (CPU_INST_OP32) { | 
 |  | #if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) | 
 |  | CPU_EFLAG |= RF_FLAG; | 
 |  | #else | 
 | set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG); | set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG); | 
 |  | #endif | 
 | } | } | 
 | } | } | 
 | #endif | #endif | 
| Line 387  interrupt_intr_or_trap(descriptor_t *gd, | Line 391  interrupt_intr_or_trap(descriptor_t *gd, | 
 | old_cs = CPU_CS; | old_cs = CPU_CS; | 
 | old_ip = CPU_EIP; | old_ip = CPU_EIP; | 
 | old_sp = CPU_ESP; | old_sp = CPU_ESP; | 
| new_flags = old_flags = REAL_EFLAGREG; | old_flags = REAL_EFLAGREG; | 
|  | new_flags = REAL_EFLAGREG & ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); | 
|  | mask = T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; | 
 |  |  | 
 | switch (gd->type) { | switch (gd->type) { | 
 | case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: | 
 | case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: | 
 | VERBOSE(("interrupt: INTERRUPT-GATE")); | VERBOSE(("interrupt: INTERRUPT-GATE")); | 
 | new_flags &= ~I_FLAG; | new_flags &= ~I_FLAG; | 
| mask = I_FLAG; | mask |= I_FLAG; | 
 | break; | break; | 
 |  |  | 
 | case CPU_SYSDESC_TYPE_TRAP_16: | case CPU_SYSDESC_TYPE_TRAP_16: | 
 | case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: | 
 | VERBOSE(("interrupt: TRAP-GATE")); | VERBOSE(("interrupt: TRAP-GATE")); | 
 |  | break; | 
 |  |  | 
 | default: | default: | 
| mask = 0; | ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gd->type); | 
 | break; | break; | 
 | } | } | 
 | new_flags &= ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); |  | 
 | mask |= T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; |  | 
 |  |  | 
 | rv = parse_selector(&cs_sel, gd->u.gate.selector); | rv = parse_selector(&cs_sel, gd->u.gate.selector); | 
 | if (rv < 0) { | if (rv < 0) { | 
| Line 497  interrupt_intr_or_trap(descriptor_t *gd, | Line 502  interrupt_intr_or_trap(descriptor_t *gd, | 
 | } | } | 
 |  |  | 
 | /* check stack room size */ | /* check stack room size */ | 
| CHECK_STACK_PUSH(&ss_sel.desc, new_sp, stacksize); | STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_sp, stacksize); | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
 | if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { | 
| Line 554  interrupt_intr_or_trap(descriptor_t *gd, | Line 559  interrupt_intr_or_trap(descriptor_t *gd, | 
 | } | } | 
 | break; | break; | 
 | } | } | 
 |  |  | 
 | set_eflags(new_flags, mask); |  | 
 | } else { | } else { | 
 | if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { | 
 | VERBOSE(("interrupt: VM86")); | VERBOSE(("interrupt: VM86")); | 
| Line 580  interrupt_intr_or_trap(descriptor_t *gd, | Line 583  interrupt_intr_or_trap(descriptor_t *gd, | 
 | } else { | } else { | 
 | sp = CPU_SP; | sp = CPU_SP; | 
 | } | } | 
| CHECK_STACK_PUSH(&CPU_STAT_SREG(CPU_SS_INDEX), sp, stacksize); | STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, stacksize); | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
 | if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { | 
| Line 612  interrupt_intr_or_trap(descriptor_t *gd, | Line 615  interrupt_intr_or_trap(descriptor_t *gd, | 
 | } | } | 
 | break; | break; | 
 | } | } | 
 |  |  | 
 | set_eflags(new_flags, mask); |  | 
 | } | } | 
 |  | #if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) | 
 |  | CPU_EFLAG = new_flags; | 
 |  | CPU_OV = CPU_FLAG & O_FLAG; | 
 |  | CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG); | 
 |  | if ((old_flags ^ CPU_EFLAG) & VM_FLAG) { | 
 |  | if (CPU_EFLAG & VM_FLAG) { | 
 |  | change_vm(1); | 
 |  | } else { | 
 |  | change_vm(0); | 
 |  | } | 
 |  | } | 
 |  | #else | 
 |  | set_eflags(new_flags, mask); | 
 |  | #endif | 
 |  |  | 
 | VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | 
 | } | } |