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Diff for /np2/i386c/ia32/exception.c between versions 1.17 and 1.20

version 1.17, 2004/03/23 22:39:40 version 1.20, 2008/01/25 17:49:46
Line 12 Line 12
  * 2. Redistributions in binary form must reproduce the above copyright   * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the   *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.   *    documentation and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products  
  *    derived from this software without specific prior written permission.  
  *   *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR   * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES   * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
Line 72  exception(int num, int error_code) Line 70  exception(int num, int error_code)
   
         __ASSERT((unsigned int)num < EXCEPTION_NUM);          __ASSERT((unsigned int)num < EXCEPTION_NUM);
   
   #if 0
           iptrace_out();
           debugwriteseg("execption.bin", &CPU_STAT_SREG(CPU_CS_INDEX), CPU_PREV_EIP & 0xffff0000, 0x10000);
   #endif
   
         VERBOSE(("exception: -------------------------------------------------------------- start"));          VERBOSE(("exception: -------------------------------------------------------------- start"));
         VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP));          VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP));
         VERBOSE(("%s", cpu_reg2str()));          VERBOSE(("%s", cpu_reg2str()));
Line 143  exception(int num, int error_code) Line 146  exception(int num, int error_code)
 #if defined(IA32_SUPPORT_DEBUG_REGISTER)  #if defined(IA32_SUPPORT_DEBUG_REGISTER)
         if (num != BP_EXCEPTION) {          if (num != BP_EXCEPTION) {
                 if (CPU_INST_OP32) {                  if (CPU_INST_OP32) {
 #if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION)  
                         CPU_EFLAG |= RF_FLAG;  
 #else  
                         set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG);                          set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG);
 #endif  
                 }                  }
         }          }
 #endif  #endif
Line 616  interrupt_intr_or_trap(const descriptor_ Line 615  interrupt_intr_or_trap(const descriptor_
                         break;                          break;
                 }                  }
         }          }
 #if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION)  
         CPU_EFLAG = new_flags;  
         CPU_OV = CPU_FLAG & O_FLAG;  
         CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG);  
         if ((old_flags ^ CPU_EFLAG) & VM_FLAG) {  
                 if (CPU_EFLAG & VM_FLAG) {  
                         change_vm(1);  
                 } else {  
                         change_vm(0);  
                 }  
         }  
 #else  
         set_eflags(new_flags, mask);          set_eflags(new_flags, mask);
 #endif  
   
         VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));          VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));
 }  }
Removed from v.1.17  
changed lines
  Added in v.1.20

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