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| version 1.10, 2004/02/09 16:12:07 | version 1.19, 2005/03/12 12:32:54 |
|---|---|
| Line 12 | Line 12 |
| * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. | * documentation and/or other materials provided with the distribution. |
| * 3. The name of the author may not be used to endorse or promote products | |
| * derived from this software without specific prior written permission. | |
| * | * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| Line 72 exception(int num, int error_code) | Line 70 exception(int num, int error_code) |
| __ASSERT((unsigned int)num < EXCEPTION_NUM); | __ASSERT((unsigned int)num < EXCEPTION_NUM); |
| #if 0 | |
| iptrace_out(); | |
| debugwriteseg("execption.bin", &CPU_STAT_SREG(CPU_CS_INDEX), CPU_PREV_EIP & 0xffff0000, 0x10000); | |
| #endif | |
| VERBOSE(("exception: -------------------------------------------------------------- start")); | VERBOSE(("exception: -------------------------------------------------------------- start")); |
| VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); | VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); |
| VERBOSE(("%s", cpu_reg2str())); | VERBOSE(("%s", cpu_reg2str())); |
| Line 85 exception(int num, int error_code) | Line 88 exception(int num, int error_code) |
| switch (num) { | switch (num) { |
| case DE_EXCEPTION: /* (F) 除算エラー */ | case DE_EXCEPTION: /* (F) 除算エラー */ |
| case DB_EXCEPTION: /* (F/T) デバッグ */ | |
| case BR_EXCEPTION: /* (F) BOUND の範囲外 */ | case BR_EXCEPTION: /* (F) BOUND の範囲外 */ |
| case UD_EXCEPTION: /* (F) 無効オペコード */ | case UD_EXCEPTION: /* (F) 無効オペコード */ |
| case NM_EXCEPTION: /* (F) デバイス使用不可 (FPU が無い) */ | case NM_EXCEPTION: /* (F) デバイス使用不可 (FPU が無い) */ |
| case MF_EXCEPTION: /* (F) 浮動小数点エラー */ | |
| #if CPU_FAMILY >= 5 | |
| case MC_EXCEPTION: /* (A) マシンチェック */ | |
| #endif | |
| #if CPU_FAMILY >= 6 | |
| case XF_EXCEPTION: /* (F) ストリーミング SIMD 拡張命令 */ | |
| #endif | |
| CPU_EIP = CPU_PREV_EIP; | CPU_EIP = CPU_PREV_EIP; |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| case DB_EXCEPTION: /* (F/T) デバッグ */ | |
| case NMI_EXCEPTION: /* (I) NMI 割り込み */ | case NMI_EXCEPTION: /* (I) NMI 割り込み */ |
| case BP_EXCEPTION: /* (T) ブレークポイント */ | case BP_EXCEPTION: /* (T) ブレークポイント */ |
| case OF_EXCEPTION: /* (T) オーバーフロー */ | case OF_EXCEPTION: /* (T) オーバーフロー */ |
| Line 116 exception(int num, int error_code) | Line 126 exception(int num, int error_code) |
| errorp = 1; | errorp = 1; |
| break; | break; |
| case MF_EXCEPTION: /* (F) 浮動小数点エラー */ | |
| CPU_EIP = CPU_PREV_EIP; | |
| errorp = 0; | |
| break; | |
| #if CPU_FAMILY >= 5 | |
| case MC_EXCEPTION: /* (A) マシンチェック */ | |
| CPU_EIP = CPU_PREV_EIP; | |
| errorp = 0; | |
| break; | |
| #endif | |
| #if CPU_FAMILY >= 6 | |
| case XF_EXCEPTION: /* (F) ストリーミング SIMD 拡張命令 */ | |
| CPU_EIP = CPU_PREV_EIP; | |
| errorp = 0; | |
| break; | |
| #endif | |
| default: | default: |
| ia32_panic("exception: unknown exception (%d)", num); | ia32_panic("exception: unknown exception (%d)", num); |
| break; | break; |
| Line 143 exception(int num, int error_code) | Line 134 exception(int num, int error_code) |
| if (CPU_STAT_EXCEPTION_COUNTER >= 2) { | if (CPU_STAT_EXCEPTION_COUNTER >= 2) { |
| if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { | if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { |
| num = DF_EXCEPTION; | num = DF_EXCEPTION; |
| errorp = 1; | |
| error_code = 0; | |
| } | } |
| } | } |
| CPU_STAT_PREV_EXCEPTION = num; | CPU_STAT_PREV_EXCEPTION = num; |
| Line 150 exception(int num, int error_code) | Line 143 exception(int num, int error_code) |
| VERBOSE(("exception: ---------------------------------------------------------------- end")); | VERBOSE(("exception: ---------------------------------------------------------------- end")); |
| INTERRUPT(num, 0, errorp, error_code); | INTERRUPT(num, 0, errorp, error_code); |
| #if defined(IA32_SUPPORT_DEBUG_REGISTER) | |
| if (num != BP_EXCEPTION) { | |
| if (CPU_INST_OP32) { | |
| #if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) | |
| CPU_EFLAG |= RF_FLAG; | |
| #else | |
| set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG); | |
| #endif | |
| } | |
| } | |
| #endif | |
| CPU_STAT_EXCEPTION_COUNTER_CLEAR(); | CPU_STAT_EXCEPTION_COUNTER_CLEAR(); |
| siglongjmp(exec_1step_jmpbuf, 1); | siglongjmp(exec_1step_jmpbuf, 1); |
| } | } |
| Line 210 exception(int num, int error_code) | Line 214 exception(int num, int error_code) |
| * D : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | * D : ゲートのサイズ.0 = 16 bit, 1 = 32 bit |
| */ | */ |
| static void interrupt_task_gate(descriptor_t *gdp, int softintp, int errorp, int error_code); | static void interrupt_task_gate(const descriptor_t *gd, int softintp, int errorp, int error_code); |
| static void interrupt_intr_or_trap(descriptor_t *gdp, int softintp, int errorp, int error_code); | static void interrupt_intr_or_trap(const descriptor_t *gd, int softintp, int errorp, int error_code); |
| void | void |
| interrupt(int num, int softintp, int errorp, int error_code) | interrupt(int num, int softintp, int errorp, int error_code) |
| { | { |
| descriptor_t gd; | descriptor_t gd; |
| DWORD idt_idx; | UINT idt_idx; |
| DWORD new_ip; | UINT32 new_ip; |
| WORD new_cs; | UINT16 new_cs; |
| VERBOSE(("interrupt: num = 0x%02x, softintp = %s, errorp = %s, error_code = %08x", num, softintp ? "on" : "off", errorp ? "on" : "off", error_code)); | VERBOSE(("interrupt: num = 0x%02x, softintp = %s, errorp = %s, error_code = %08x", num, softintp ? "on" : "off", errorp ? "on" : "off", error_code)); |
| Line 327 interrupt(int num, int softintp, int err | Line 331 interrupt(int num, int softintp, int err |
| } | } |
| static void | static void |
| interrupt_task_gate(descriptor_t *gdp, int softintp, int errorp, int error_code) | interrupt_task_gate(const descriptor_t *gd, int softintp, int errorp, int error_code) |
| { | { |
| selector_t task_sel; | selector_t task_sel; |
| int rv; | int rv; |
| Line 336 interrupt_task_gate(descriptor_t *gdp, i | Line 340 interrupt_task_gate(descriptor_t *gdp, i |
| (void)softintp; | (void)softintp; |
| rv = parse_selector(&task_sel, gdp->u.gate.selector); | rv = parse_selector(&task_sel, gd->u.gate.selector); |
| if (rv < 0 || task_sel.ldt) { | if (rv < 0 || task_sel.ldt) { |
| VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT)", gdp->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G')); | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT)", gd->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G')); |
| EXCEPTION(TS_EXCEPTION, task_sel.idx); | EXCEPTION(TS_EXCEPTION, task_sel.idx); |
| } | } |
| Line 372 interrupt_task_gate(descriptor_t *gdp, i | Line 376 interrupt_task_gate(descriptor_t *gdp, i |
| } | } |
| static void | static void |
| interrupt_intr_or_trap(descriptor_t *gdp, int softintp, int errorp, int error_code) | interrupt_intr_or_trap(const descriptor_t *gd, int softintp, int errorp, int error_code) |
| { | { |
| selector_t cs_sel, ss_sel; | selector_t cs_sel, ss_sel; |
| DWORD old_flags; | UINT stacksize; |
| DWORD new_flags; | UINT32 old_flags; |
| DWORD mask; | UINT32 new_flags; |
| DWORD stacksize; | UINT32 mask; |
| DWORD sp; | UINT32 sp; |
| DWORD new_ip, new_sp; | UINT32 new_ip, new_sp; |
| DWORD old_ip, old_sp; | UINT32 old_ip, old_sp; |
| WORD old_cs, old_ss, new_ss; | UINT16 old_cs, old_ss, new_ss; |
| int rv; | int rv; |
| new_ip = gdp->u.gate.offset; | new_ip = gd->u.gate.offset; |
| old_ss = CPU_SS; | old_ss = CPU_SS; |
| old_cs = CPU_CS; | old_cs = CPU_CS; |
| old_ip = CPU_EIP; | old_ip = CPU_EIP; |
| old_sp = CPU_ESP; | old_sp = CPU_ESP; |
| new_flags = old_flags = REAL_EFLAGREG; | old_flags = REAL_EFLAGREG; |
| new_flags = REAL_EFLAGREG & ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); | |
| mask = T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; | |
| switch (gdp->type) { | switch (gd->type) { |
| case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| VERBOSE(("interrupt: INTERRUPT-GATE")); | VERBOSE(("interrupt: INTERRUPT-GATE")); |
| new_flags &= ~I_FLAG; | new_flags &= ~I_FLAG; |
| mask = I_FLAG; | mask |= I_FLAG; |
| break; | break; |
| case CPU_SYSDESC_TYPE_TRAP_16: | case CPU_SYSDESC_TYPE_TRAP_16: |
| case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: |
| VERBOSE(("interrupt: TRAP-GATE")); | VERBOSE(("interrupt: TRAP-GATE")); |
| mask = 0; | break; |
| default: | |
| ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gd->type); | |
| break; | break; |
| } | } |
| new_flags &= ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); | |
| mask |= T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; | |
| rv = parse_selector(&cs_sel, gdp->u.gate.selector); | rv = parse_selector(&cs_sel, gd->u.gate.selector); |
| if (rv < 0) { | if (rv < 0) { |
| VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gdp->u.gate.selector, rv)); | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gd->u.gate.selector, rv)); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); |
| } | } |
| Line 452 interrupt_intr_or_trap(descriptor_t *gdp | Line 459 interrupt_intr_or_trap(descriptor_t *gdp |
| VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE")); | VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE")); |
| stacksize = errorp ? 20 : 18; | stacksize = errorp ? 20 : 18; |
| } | } |
| switch (gdp->type) { | switch (gd->type) { |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: |
| stacksize *= 2; | stacksize *= 2; |
| Line 498 interrupt_intr_or_trap(descriptor_t *gdp | Line 505 interrupt_intr_or_trap(descriptor_t *gdp |
| } | } |
| /* check stack room size */ | /* check stack room size */ |
| CHECK_STACK_PUSH(&ss_sel.desc, new_sp, stacksize); | STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_sp, stacksize); |
| /* out of range */ | /* out of range */ |
| if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { |
| Line 512 interrupt_intr_or_trap(descriptor_t *gdp | Line 519 interrupt_intr_or_trap(descriptor_t *gdp |
| load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); |
| SET_EIP(new_ip); | SET_EIP(new_ip); |
| switch (gdp->type) { | switch (gd->type) { |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: |
| if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { |
| Line 555 interrupt_intr_or_trap(descriptor_t *gdp | Line 562 interrupt_intr_or_trap(descriptor_t *gdp |
| } | } |
| break; | break; |
| } | } |
| set_eflags(new_flags, mask); | |
| } else { | } else { |
| if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { |
| VERBOSE(("interrupt: VM86")); | VERBOSE(("interrupt: VM86")); |
| Line 569 interrupt_intr_or_trap(descriptor_t *gdp | Line 574 interrupt_intr_or_trap(descriptor_t *gdp |
| VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); | VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); |
| stacksize = errorp ? 8 : 6; | stacksize = errorp ? 8 : 6; |
| switch (gdp->type) { | switch (gd->type) { |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: |
| stacksize *= 2; | stacksize *= 2; |
| Line 581 interrupt_intr_or_trap(descriptor_t *gdp | Line 586 interrupt_intr_or_trap(descriptor_t *gdp |
| } else { | } else { |
| sp = CPU_SP; | sp = CPU_SP; |
| } | } |
| CHECK_STACK_PUSH(&CPU_STAT_SREG(CPU_SS_INDEX), sp, stacksize); | STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, stacksize); |
| /* out of range */ | /* out of range */ |
| if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { |
| Line 592 interrupt_intr_or_trap(descriptor_t *gdp | Line 597 interrupt_intr_or_trap(descriptor_t *gdp |
| load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); | load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); |
| SET_EIP(new_ip); | SET_EIP(new_ip); |
| switch (gdp->type) { | switch (gd->type) { |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: |
| PUSH0_32(old_flags); | PUSH0_32(old_flags); |
| Line 613 interrupt_intr_or_trap(descriptor_t *gdp | Line 618 interrupt_intr_or_trap(descriptor_t *gdp |
| } | } |
| break; | break; |
| } | } |
| set_eflags(new_flags, mask); | |
| } | } |
| #if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) | |
| CPU_EFLAG = new_flags; | |
| CPU_OV = CPU_FLAG & O_FLAG; | |
| CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG); | |
| if ((old_flags ^ CPU_EFLAG) & VM_FLAG) { | |
| if (CPU_EFLAG & VM_FLAG) { | |
| change_vm(1); | |
| } else { | |
| change_vm(0); | |
| } | |
| } | |
| #else | |
| set_eflags(new_flags, mask); | |
| #endif | |
| VERBOSE(("interrupt: new EIP = %04x:%08x, new ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); |
| } | } |