|
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| version 1.20, 2008/01/25 17:49:46 | version 1.21, 2008/03/22 04:03:07 |
|---|---|
| Line 72 exception(int num, int error_code) | Line 72 exception(int num, int error_code) |
| #if 0 | #if 0 |
| iptrace_out(); | iptrace_out(); |
| debugwriteseg("execption.bin", &CPU_STAT_SREG(CPU_CS_INDEX), CPU_PREV_EIP & 0xffff0000, 0x10000); | debugwriteseg("execption.bin", &CPU_CS_DESC, CPU_PREV_EIP & 0xffff0000, 0x10000); |
| #endif | #endif |
| VERBOSE(("exception: -------------------------------------------------------------- start")); | VERBOSE(("exception: -------------------------------------------------------------- start")); |
| Line 93 exception(int num, int error_code) | Line 93 exception(int num, int error_code) |
| case UD_EXCEPTION: /* (F) 無効オペコード */ | case UD_EXCEPTION: /* (F) 無効オペコード */ |
| case NM_EXCEPTION: /* (F) デバイス使用不可 (FPU が無い) */ | case NM_EXCEPTION: /* (F) デバイス使用不可 (FPU が無い) */ |
| case MF_EXCEPTION: /* (F) 浮動小数点エラー */ | case MF_EXCEPTION: /* (F) 浮動小数点エラー */ |
| #if CPU_FAMILY >= 5 | |
| case MC_EXCEPTION: /* (A) マシンチェック */ | |
| #endif | |
| #if CPU_FAMILY >= 6 | |
| case XF_EXCEPTION: /* (F) ストリーミング SIMD 拡張命令 */ | |
| #endif | |
| CPU_EIP = CPU_PREV_EIP; | CPU_EIP = CPU_PREV_EIP; |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| case NMI_EXCEPTION: /* (I) NMI 割り込み */ | case NMI_EXCEPTION: /* (I) NMI 割り込み */ |
| Line 112 exception(int num, int error_code) | Line 106 exception(int num, int error_code) |
| error_code = 0; | error_code = 0; |
| break; | break; |
| #if CPU_FAMILY >= 4 | |
| case AC_EXCEPTION: /* (F) アラインメントチェック (errcode: 0) */ | case AC_EXCEPTION: /* (F) アラインメントチェック (errcode: 0) */ |
| error_code = 0; | error_code = 0; |
| /*FALLTHROUGH*/ | /*FALLTHROUGH*/ |
| #endif | |
| case TS_EXCEPTION: /* (F) 無効 TSS (errcode) */ | case TS_EXCEPTION: /* (F) 無効 TSS (errcode) */ |
| case NP_EXCEPTION: /* (F) セグメント不在 (errcode) */ | case NP_EXCEPTION: /* (F) セグメント不在 (errcode) */ |
| case SS_EXCEPTION: /* (F) スタックセグメントフォルト (errcode) */ | case SS_EXCEPTION: /* (F) スタックセグメントフォルト (errcode) */ |
| Line 131 exception(int num, int error_code) | Line 123 exception(int num, int error_code) |
| break; | break; |
| } | } |
| if (CPU_STATSAVE.cpu_stat.backout_sp) { | |
| VERBOSE(("exception: restore stack pointer.")); | |
| CPU_ESP = CPU_PREV_ESP; | |
| } | |
| CPU_STATSAVE.cpu_stat.backout_sp = 0; | |
| if (CPU_STAT_EXCEPTION_COUNTER >= 2) { | if (CPU_STAT_EXCEPTION_COUNTER >= 2) { |
| if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { | if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { |
| num = DF_EXCEPTION; | num = DF_EXCEPTION; |
| Line 142 exception(int num, int error_code) | Line 140 exception(int num, int error_code) |
| VERBOSE(("exception: ---------------------------------------------------------------- end")); | VERBOSE(("exception: ---------------------------------------------------------------- end")); |
| INTERRUPT(num, 0, errorp, error_code); | interrupt(num, 0, errorp, error_code); |
| #if defined(IA32_SUPPORT_DEBUG_REGISTER) | #if defined(IA32_SUPPORT_DEBUG_REGISTER) |
| if (num != BP_EXCEPTION) { | if (num != BP_EXCEPTION) { |
| if (CPU_INST_OP32) { | if (CPU_INST_OP32) { |
| Line 210 exception(int num, int error_code) | Line 208 exception(int num, int error_code) |
| * D : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | * D : ゲートのサイズ.0 = 16 bit, 1 = 32 bit |
| */ | */ |
| static void interrupt_task_gate(const descriptor_t *gd, int softintp, int errorp, int error_code); | static void interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); |
| static void interrupt_intr_or_trap(const descriptor_t *gd, int softintp, int errorp, int error_code); | static void interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); |
| void | void |
| interrupt(int num, int softintp, int errorp, int error_code) | interrupt(int num, int intrtype, int errorp, int error_code) |
| { | { |
| descriptor_t gd; | descriptor_t gsd; |
| UINT idt_idx; | UINT idt_idx; |
| UINT32 new_ip; | UINT32 new_ip; |
| UINT16 new_cs; | UINT16 new_cs; |
| int exc_errcode; | |
| VERBOSE(("interrupt: num = 0x%02x, softintp = %s, errorp = %s, error_code = %08x", num, softintp ? "on" : "off", errorp ? "on" : "off", error_code)); | VERBOSE(("interrupt: num = 0x%02x, intrtype = %s, errorp = %s, error_code = %08x", num, intrtype ? "on" : "off", errorp ? "on" : "off", error_code)); |
| if (!CPU_STAT_PM) { | if (!CPU_STAT_PM) { |
| /* real mode */ | /* real mode */ |
| CPU_WORKCLOCK(20); | |
| idt_idx = num * 4; | idt_idx = num * 4; |
| if (idt_idx + 3 > CPU_IDTR_LIMIT) { | if (idt_idx + 3 > CPU_IDTR_LIMIT) { |
| VERBOSE(("interrupt: real-mode IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT)); | VERBOSE(("interrupt: real-mode IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT)); |
| EXCEPTION(GP_EXCEPTION, idt_idx + 2); | EXCEPTION(GP_EXCEPTION, idt_idx + 2); |
| } | } |
| if (!softintp && CPU_STAT_HLT) { | if ((intrtype == INTR_TYPE_EXTINTR) && CPU_STAT_HLT) { |
| CPU_EIP++; | CPU_EIP++; |
| CPU_STAT_HLT = FALSE; | CPU_STAT_HLT = 0; |
| } | } |
| REGPUSH0(REAL_FLAGREG); | REGPUSH0(REAL_FLAGREG); |
| Line 245 interrupt(int num, int softintp, int err | Line 246 interrupt(int num, int softintp, int err |
| new_ip = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx); | new_ip = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx); |
| new_cs = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx + 2); | new_cs = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx + 2); |
| CPU_SET_SEGREG(CPU_CS_INDEX, new_cs); | LOAD_SEGREG(CPU_CS_INDEX, new_cs); |
| SET_EIP(new_ip); | CPU_EIP = new_ip; |
| CPU_WORKCLOCK(20); | |
| } else { | } else { |
| /* protected mode */ | /* protected mode */ |
| VERBOSE(("interrupt: -------------------------------------------------------------- start")); | CPU_WORKCLOCK(200); |
| VERBOSE(("interrupt: -------------------------------------------------------------- start")); | |
| VERBOSE(("interrupt: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("interrupt: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); |
| #if defined(DEBUG) | #if defined(DEBUG) |
| Line 261 interrupt(int num, int softintp, int err | Line 262 interrupt(int num, int softintp, int err |
| } | } |
| #endif | #endif |
| /* VM86 && IOPL < 3 && interrupt cause == INTn */ | |
| if (CPU_STAT_VM86 && (CPU_STAT_IOPL < CPU_IOPL3) && (softintp == -1)) { | |
| VERBOSE(("interrupt: VM86 && IOPL < 3 && INTn")); | |
| EXCEPTION(GP_EXCEPTION, 0); | |
| } | |
| idt_idx = num * 8; | idt_idx = num * 8; |
| exc_errcode = idt_idx + 2; | |
| if (intrtype == INTR_TYPE_EXTINTR) | |
| exc_errcode++; | |
| if (idt_idx + 7 > CPU_IDTR_LIMIT) { | if (idt_idx + 7 > CPU_IDTR_LIMIT) { |
| VERBOSE(("interrupt: IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT)); | VERBOSE(("interrupt: IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT)); |
| EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| memset(&gd, 0, sizeof(gd)); | /* load a gate descriptor from interrupt descriptor table */ |
| load_descriptor(&gd, CPU_IDTR_BASE + idt_idx); | memset(&gsd, 0, sizeof(gsd)); |
| if (!gd.valid || !gd.p) { | load_descriptor(&gsd, CPU_IDTR_BASE + idt_idx); |
| if (!SEG_IS_VALID(&gsd)) { | |
| VERBOSE(("interrupt: gate descripter is invalid.")); | VERBOSE(("interrupt: gate descripter is invalid.")); |
| EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | |
| if (!SEG_IS_PRESENT(&gsd)) { | |
| VERBOSE(("interrupt: gate descriptor is not present.")); | |
| EXCEPTION(GP_EXCEPTION, exc_errcode); | |
| } | |
| if (!SEG_IS_SYSTEM(&gsd)) { | |
| VERBOSE(("interrupt: gate descriptor is not system segment.")); | |
| EXCEPTION(GP_EXCEPTION, exc_errcode); | |
| } | } |
| switch (gd.type) { | switch (gsd.type) { |
| case CPU_SYSDESC_TYPE_TASK: | case CPU_SYSDESC_TYPE_TASK: |
| case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| Line 289 interrupt(int num, int softintp, int err | Line 297 interrupt(int num, int softintp, int err |
| break; | break; |
| default: | default: |
| VERBOSE(("interrupt: invalid gate type (%d)", gd.type)); | VERBOSE(("interrupt: invalid gate type (%d)", gsd.type)); |
| EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| break; | break; |
| } | } |
| if (gsd.dpl < CPU_STAT_CPL) { | |
| VERBOSE(("interrupt: gate DPL(%d) < CPL(%d)", gsd.dpl, CPU_STAT_CPL)); | |
| EXCEPTION(GP_EXCEPTION, exc_errcode); | |
| } | |
| /* 5.10.1.1. 例外/割り込みハンドラ・プロシージャの保護 */ | /* 5.10.1.1. 例外/割り込みハンドラ・プロシージャの保護 */ |
| if (softintp && (gd.dpl < CPU_STAT_CPL)) { | if ((intrtype != INTR_TYPE_EXTINTR) && (gsd.dpl < CPU_STAT_CPL)) { |
| VERBOSE(("interrupt: softintp && DPL(%d) < CPL(%d)", gd.dpl, CPU_STAT_CPL)); | VERBOSE(("interrupt: intrtype && DPL(%d) < CPL(%d)", gsd.dpl, CPU_STAT_CPL)); |
| EXCEPTION(GP_EXCEPTION, idt_idx + 2); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| if (!softintp && CPU_STAT_HLT) { | if (!intrtype && CPU_STAT_HLT) { |
| CPU_EIP++; | CPU_EIP++; |
| CPU_STAT_HLT = FALSE; | CPU_STAT_HLT = 0; |
| } | } |
| switch (gd.type) { | switch (gsd.type) { |
| case CPU_SYSDESC_TYPE_TASK: | case CPU_SYSDESC_TYPE_TASK: |
| interrupt_task_gate(&gd, softintp, errorp, error_code); | interrupt_task_gate(&gsd, intrtype, errorp, error_code); |
| break; | break; |
| case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| case CPU_SYSDESC_TYPE_TRAP_16: | case CPU_SYSDESC_TYPE_TRAP_16: |
| case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: |
| interrupt_intr_or_trap(&gd, softintp, errorp, error_code); | interrupt_intr_or_trap(&gsd, intrtype, errorp, error_code); |
| break; | break; |
| default: | default: |
| EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| break; | break; |
| } | } |
| Line 327 interrupt(int num, int softintp, int err | Line 340 interrupt(int num, int softintp, int err |
| } | } |
| static void | static void |
| interrupt_task_gate(const descriptor_t *gd, int softintp, int errorp, int error_code) | interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) |
| { | { |
| selector_t task_sel; | selector_t task_sel; |
| int rv; | int rv; |
| VERBOSE(("interrupt: TASK-GATE")); | VERBOSE(("interrupt: TASK-GATE")); |
| (void)softintp; | (void)intrtype; |
| rv = parse_selector(&task_sel, gd->u.gate.selector); | rv = parse_selector(&task_sel, gsdp->u.gate.selector); |
| if (rv < 0 || task_sel.ldt) { | if (rv < 0 || task_sel.ldt || !SEG_IS_SYSTEM(&task_sel.desc)) { |
| VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT)", gd->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G')); | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT, type = %s)", gsdp->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G', task_sel.desc.s ? "code/data" : "system")); |
| EXCEPTION(TS_EXCEPTION, task_sel.idx); | EXCEPTION(TS_EXCEPTION, task_sel.idx); |
| } | } |
| Line 372 interrupt_task_gate(const descriptor_t * | Line 385 interrupt_task_gate(const descriptor_t * |
| } | } |
| static void | static void |
| interrupt_intr_or_trap(const descriptor_t *gd, int softintp, int errorp, int error_code) | interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) |
| { | { |
| selector_t cs_sel, ss_sel; | selector_t cs_sel, ss_sel; |
| UINT stacksize; | UINT stacksize; |
| Line 383 interrupt_intr_or_trap(const descriptor_ | Line 396 interrupt_intr_or_trap(const descriptor_ |
| UINT32 new_ip, new_sp; | UINT32 new_ip, new_sp; |
| UINT32 old_ip, old_sp; | UINT32 old_ip, old_sp; |
| UINT16 old_cs, old_ss, new_ss; | UINT16 old_cs, old_ss, new_ss; |
| int exc_errcode; | |
| int rv; | int rv; |
| new_ip = gd->u.gate.offset; | new_ip = gsdp->u.gate.offset; |
| old_ss = CPU_SS; | old_ss = CPU_SS; |
| old_cs = CPU_CS; | old_cs = CPU_CS; |
| old_ip = CPU_EIP; | old_ip = CPU_EIP; |
| Line 394 interrupt_intr_or_trap(const descriptor_ | Line 408 interrupt_intr_or_trap(const descriptor_ |
| new_flags = REAL_EFLAGREG & ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); | new_flags = REAL_EFLAGREG & ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG); |
| mask = T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; | mask = T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG; |
| switch (gd->type) { | switch (gsdp->type) { |
| case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: |
| case CPU_SYSDESC_TYPE_INTR_32: | case CPU_SYSDESC_TYPE_INTR_32: |
| VERBOSE(("interrupt: INTERRUPT-GATE")); | VERBOSE(("interrupt: INTERRUPT-GATE")); |
| Line 408 interrupt_intr_or_trap(const descriptor_ | Line 422 interrupt_intr_or_trap(const descriptor_ |
| break; | break; |
| default: | default: |
| ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gd->type); | ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gsdp->type); |
| break; | break; |
| } | } |
| rv = parse_selector(&cs_sel, gd->u.gate.selector); | exc_errcode = cs_sel.idx; |
| if (intrtype == INTR_TYPE_EXTINTR) | |
| exc_errcode++; | |
| rv = parse_selector(&cs_sel, gsdp->u.gate.selector); | |
| if (rv < 0) { | if (rv < 0) { |
| VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gd->u.gate.selector, rv)); | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gsdp->u.gate.selector, rv)); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| /* check segment type */ | /* check segment type */ |
| if (!cs_sel.desc.s) { | if (SEG_IS_SYSTEM(&cs_sel.desc)) { |
| VERBOSE(("interrupt: code segment is system segment")); | VERBOSE(("interrupt: code segment is system segment")); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| if (!cs_sel.desc.u.seg.c) { | if (SEG_IS_DATA(&cs_sel.desc)) { |
| VERBOSE(("interrupt: code segment is data segment")); | VERBOSE(("interrupt: code segment is data segment")); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| /* check privilege level */ | /* check privilege level */ |
| if (cs_sel.desc.dpl > CPU_STAT_CPL) { | if (cs_sel.desc.dpl > CPU_STAT_CPL) { |
| VERBOSE(("interrupt: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL)); | VERBOSE(("interrupt: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL)); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| /* not present */ | /* not present */ |
| if (selector_is_not_present(&cs_sel)) { | if (selector_is_not_present(&cs_sel)) { |
| VERBOSE(("interrupt: selector is not present")); | VERBOSE(("interrupt: selector is not present")); |
| EXCEPTION(NP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(NP_EXCEPTION, exc_errcode); |
| } | } |
| if (!cs_sel.desc.u.seg.ec | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) { |
| && (cs_sel.desc.dpl < CPU_STAT_CPL)) { | stacksize = errorp ? 12 : 10; |
| if (!CPU_STAT_VM86) { | if (!CPU_STAT_VM86) { |
| VERBOSE(("interrupt: INTER-PRIVILEGE-LEVEL-INTERRUPT")); | VERBOSE(("interrupt: INTER-PRIVILEGE-LEVEL-INTERRUPT")); |
| stacksize = errorp ? 12 : 10; | |
| } else { | } else { |
| /* VM86 */ | /* VM86 */ |
| VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE")); | |
| if (cs_sel.desc.dpl != 0) { | if (cs_sel.desc.dpl != 0) { |
| /* 16.3.1.1 */ | /* 16.3.1.1 */ |
| VERBOSE(("interrupt: DPL[CS](%d) != 0", cs_sel.desc.dpl)); | VERBOSE(("interrupt: DPL[CS](%d) != 0", cs_sel.desc.dpl)); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE")); | stacksize += 8; |
| stacksize = errorp ? 20 : 18; | |
| } | } |
| switch (gd->type) { | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { |
| case CPU_SYSDESC_TYPE_INTR_32: | |
| case CPU_SYSDESC_TYPE_TRAP_32: | |
| stacksize *= 2; | stacksize *= 2; |
| break; | |
| } | } |
| /* get stack pointer from TSS */ | |
| get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp); | get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp); |
| /* parse stack segment descriptor */ | |
| rv = parse_selector(&ss_sel, new_ss); | rv = parse_selector(&ss_sel, new_ss); |
| /* update exception error code */ | |
| exc_errcode = ss_sel.idx; | |
| if (intrtype == INTR_TYPE_EXTINTR) | |
| exc_errcode++; | |
| if (rv < 0) { | if (rv < 0) { |
| VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", new_ss, rv)); | VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", new_ss, rv)); |
| EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp); | EXCEPTION(TS_EXCEPTION, exc_errcode); |
| } | } |
| /* check privilege level */ | /* check privilege level */ |
| if (ss_sel.rpl != cs_sel.desc.dpl) { | if (ss_sel.rpl != cs_sel.desc.dpl) { |
| VERBOSE(("interrupt: RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel.desc.dpl)); | VERBOSE(("interrupt: selector RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel.desc.dpl)); |
| EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp); | EXCEPTION(TS_EXCEPTION, exc_errcode); |
| } | } |
| if (ss_sel.desc.dpl != cs_sel.desc.dpl) { | if (ss_sel.desc.dpl != cs_sel.desc.dpl) { |
| VERBOSE(("interrupt: DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel.desc.dpl)); | VERBOSE(("interrupt: descriptor DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel.desc.dpl)); |
| EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp); | EXCEPTION(TS_EXCEPTION, exc_errcode); |
| } | } |
| /* check segment type */ | /* stack segment must be writable data segment. */ |
| if (!ss_sel.desc.s) { | if (SEG_IS_SYSTEM(&ss_sel.desc)) { |
| VERBOSE(("interrupt: stack segment is system segment")); | VERBOSE(("interrupt: stack segment is system segment")); |
| EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp); | EXCEPTION(TS_EXCEPTION, exc_errcode); |
| } | } |
| if (ss_sel.desc.u.seg.c) { | if (SEG_IS_CODE(&ss_sel.desc)) { |
| VERBOSE(("interrupt: stack segment is code segment")); | VERBOSE(("interrupt: stack segment is code segment")); |
| EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp); | EXCEPTION(TS_EXCEPTION, exc_errcode); |
| } | } |
| if (!ss_sel.desc.u.seg.wr) { | if (!SEG_IS_WRITABLE_DATA(&ss_sel.desc)) { |
| VERBOSE(("interrupt: stack segment is read-only data segment")); | VERBOSE(("interrupt: stack segment is read-only data segment")); |
| EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp); | EXCEPTION(TS_EXCEPTION, exc_errcode); |
| } | } |
| /* not present */ | /* not present */ |
| if (selector_is_not_present(&ss_sel)) { | if (selector_is_not_present(&ss_sel)) { |
| VERBOSE(("interrupt: selector is not present")); | VERBOSE(("interrupt: selector is not present")); |
| EXCEPTION(SS_EXCEPTION, ss_sel.idx + !softintp); | EXCEPTION(SS_EXCEPTION, exc_errcode); |
| } | } |
| /* check stack room size */ | /* check stack room size */ |
| STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_sp, stacksize); | cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize); |
| /* out of range */ | /* out of range */ |
| if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { |
| Line 513 interrupt_intr_or_trap(const descriptor_ | Line 535 interrupt_intr_or_trap(const descriptor_ |
| CPU_ESP = new_sp; | CPU_ESP = new_sp; |
| load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); |
| SET_EIP(new_ip); | CPU_EIP = new_ip; |
| switch (gd->type) { | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { |
| case CPU_SYSDESC_TYPE_INTR_32: | |
| case CPU_SYSDESC_TYPE_TRAP_32: | |
| if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { |
| PUSH0_32(CPU_GS); | PUSH0_32(CPU_GS); |
| PUSH0_32(CPU_FS); | PUSH0_32(CPU_FS); |
| PUSH0_32(CPU_DS); | PUSH0_32(CPU_DS); |
| PUSH0_32(CPU_ES); | PUSH0_32(CPU_ES); |
| CPU_SET_SEGREG(CPU_GS_INDEX, 0); | LOAD_SEGREG(CPU_GS_INDEX, 0); |
| CPU_STAT_SREG(CPU_GS_INDEX).valid = 0; | CPU_STAT_SREG(CPU_GS_INDEX).valid = 0; |
| CPU_SET_SEGREG(CPU_FS_INDEX, 0); | LOAD_SEGREG(CPU_FS_INDEX, 0); |
| CPU_STAT_SREG(CPU_FS_INDEX).valid = 0; | CPU_STAT_SREG(CPU_FS_INDEX).valid = 0; |
| CPU_SET_SEGREG(CPU_DS_INDEX, 0); | LOAD_SEGREG(CPU_DS_INDEX, 0); |
| CPU_STAT_SREG(CPU_DS_INDEX).valid = 0; | CPU_STAT_SREG(CPU_DS_INDEX).valid = 0; |
| CPU_SET_SEGREG(CPU_ES_INDEX, 0); | LOAD_SEGREG(CPU_ES_INDEX, 0); |
| CPU_STAT_SREG(CPU_ES_INDEX).valid = 0; | CPU_STAT_SREG(CPU_ES_INDEX).valid = 0; |
| } | } |
| PUSH0_32(old_ss); | PUSH0_32(old_ss); |
| Line 541 interrupt_intr_or_trap(const descriptor_ | Line 561 interrupt_intr_or_trap(const descriptor_ |
| if (errorp) { | if (errorp) { |
| PUSH0_32(error_code); | PUSH0_32(error_code); |
| } | } |
| break; | } else { |
| case CPU_SYSDESC_TYPE_INTR_16: | |
| case CPU_SYSDESC_TYPE_TRAP_16: | |
| if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { |
| ia32_panic("interrupt: 16bit gate && VM86"); | ia32_panic("interrupt: 16bit gate && VM86"); |
| } | } |
| Line 556 interrupt_intr_or_trap(const descriptor_ | Line 573 interrupt_intr_or_trap(const descriptor_ |
| if (errorp) { | if (errorp) { |
| PUSH0_16(error_code); | PUSH0_16(error_code); |
| } | } |
| break; | |
| } | } |
| } else { | } else { |
| if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { |
| VERBOSE(("interrupt: VM86")); | VERBOSE(("interrupt: VM86")); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| if (!cs_sel.desc.u.seg.ec && (cs_sel.desc.dpl != CPU_STAT_CPL)) { | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl != CPU_STAT_CPL)) { |
| VERBOSE(("interrupt: NON-CONFORMING-CODE-SEGMENT(%s) and DPL[CS](%d) != CPL", cs_sel.desc.u.seg.ec ? "false" : "true", cs_sel.desc.dpl, CPU_STAT_CPL)); | VERBOSE(("interrupt: %sCONFORMING-CODE-SEGMENT(%s) && DPL[CS](%d) != CPL", SEG_IS_CONFORMING_CODE(&cs_sel.desc) ? "" : "NON-", cs_sel.desc.dpl, CPU_STAT_CPL)); |
| EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp); | EXCEPTION(GP_EXCEPTION, exc_errcode); |
| } | } |
| VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); | VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); |
| stacksize = errorp ? 8 : 6; | stacksize = errorp ? 8 : 6; |
| switch (gd->type) { | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { |
| case CPU_SYSDESC_TYPE_INTR_32: | |
| case CPU_SYSDESC_TYPE_TRAP_32: | |
| stacksize *= 2; | stacksize *= 2; |
| break; | |
| } | } |
| /* check stack room size */ | |
| if (CPU_STAT_SS32) { | if (CPU_STAT_SS32) { |
| sp = CPU_ESP; | sp = CPU_ESP; |
| } else { | } else { |
| sp = CPU_SP; | sp = CPU_SP; |
| } | } |
| STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, stacksize); | SS_PUSH_CHECK(sp, stacksize); |
| /* out of range */ | /* out of range */ |
| if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { |
| Line 591 interrupt_intr_or_trap(const descriptor_ | Line 606 interrupt_intr_or_trap(const descriptor_ |
| } | } |
| load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); | load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); |
| SET_EIP(new_ip); | CPU_EIP = new_ip; |
| switch (gd->type) { | if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { |
| case CPU_SYSDESC_TYPE_INTR_32: | |
| case CPU_SYSDESC_TYPE_TRAP_32: | |
| PUSH0_32(old_flags); | PUSH0_32(old_flags); |
| PUSH0_32(old_cs); | PUSH0_32(old_cs); |
| PUSH0_32(old_ip); | PUSH0_32(old_ip); |
| if (errorp) { | if (errorp) { |
| PUSH0_32(error_code); | PUSH0_32(error_code); |
| } | } |
| break; | } else { |
| case CPU_SYSDESC_TYPE_INTR_16: | |
| case CPU_SYSDESC_TYPE_TRAP_16: | |
| PUSH0_16(old_flags); | PUSH0_16(old_flags); |
| PUSH0_16(old_cs); | PUSH0_16(old_cs); |
| PUSH0_16(old_ip); | PUSH0_16(old_ip); |
| if (errorp) { | if (errorp) { |
| PUSH0_16(error_code); | PUSH0_16(error_code); |
| } | } |
| break; | |
| } | } |
| } | } |
| set_eflags(new_flags, mask); | set_eflags(new_flags, mask); |