| version 1.31, 2011/12/23 04:19:43 | version 1.39, 2012/06/18 14:33:38 | 
| Line 61  static const int dftable[4][4] = { | Line 61  static const int dftable[4][4] = { | 
 | { 1, 1, 1, 1, }, | { 1, 1, 1, 1, }, | 
 | }; | }; | 
 |  |  | 
| void | void CPUCALL | 
 | exception(int num, int error_code) | exception(int num, int error_code) | 
 | { | { | 
 |  | #if defined(DEBUG) | 
 |  | extern int cpu_debug_rep_cont; | 
 |  | extern CPU_REGS cpu_debug_rep_regs; | 
 |  | #endif | 
 | int errorp = 0; | int errorp = 0; | 
 |  |  | 
 | __ASSERT((unsigned int)num < EXCEPTION_NUM); | __ASSERT((unsigned int)num < EXCEPTION_NUM); | 
| Line 74  exception(int num, int error_code) | Line 78  exception(int num, int error_code) | 
 | #endif | #endif | 
 |  |  | 
 | VERBOSE(("exception: -------------------------------------------------------------- start")); | VERBOSE(("exception: -------------------------------------------------------------- start")); | 
| VERBOSE(("exception: %s, error_code = %x at %04x:%08x, %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); | 
 | VERBOSE(("%s", cpu_reg2str())); | VERBOSE(("%s", cpu_reg2str())); | 
 |  | VERBOSE(("code: %dbit(%dbit), address: %dbit(%dbit)", CPU_INST_OP32 ? 32 : 16, CPU_STATSAVE.cpu_inst_default.op_32 ? 32 : 16, CPU_INST_AS32 ? 32 : 16, CPU_STATSAVE.cpu_inst_default.as_32 ? 32 : 16)); | 
 |  | #if defined(DEBUG) | 
 |  | if (cpu_debug_rep_cont) { | 
 |  | VERBOSE(("rep: original regs: ecx=%08x, esi=%08x, edi=%08x", cpu_debug_rep_regs.reg[CPU_ECX_INDEX].d, cpu_debug_rep_regs.reg[CPU_ESI_INDEX].d, cpu_debug_rep_regs.reg[CPU_EDI_INDEX].d)); | 
 |  | } | 
 |  | VERBOSE(("%s", cpu_disasm2str(CPU_PREV_EIP))); | 
 |  | #endif | 
 |  |  | 
 | CPU_STAT_EXCEPTION_COUNTER_INC(); | CPU_STAT_EXCEPTION_COUNTER_INC(); | 
 | if ((CPU_STAT_EXCEPTION_COUNTER >= 3) | if ((CPU_STAT_EXCEPTION_COUNTER >= 3) | 
| Line 136  exception(int num, int error_code) | Line 147  exception(int num, int error_code) | 
 |  |  | 
 | VERBOSE(("exception: ---------------------------------------------------------------- end")); | VERBOSE(("exception: ---------------------------------------------------------------- end")); | 
 |  |  | 
| interrupt(num, INTR_TYPE_EXTINTR, errorp, error_code); | interrupt(num, INTR_TYPE_EXCEPTION, errorp, error_code); | 
| #if defined(IA32_SUPPORT_DEBUG_REGISTER) |  | 
| if (num != BP_EXCEPTION) { |  | 
| if (CPU_INST_OP32) { |  | 
| set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG); |  | 
| } |  | 
| } |  | 
| #endif |  | 
 | CPU_STAT_EXCEPTION_COUNTER_CLEAR(); | CPU_STAT_EXCEPTION_COUNTER_CLEAR(); | 
 | siglongjmp(exec_1step_jmpbuf, 1); | siglongjmp(exec_1step_jmpbuf, 1); | 
 | } | } | 
| Line 204  exception(int num, int error_code) | Line 208  exception(int num, int error_code) | 
 | * D          : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | * D          : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | 
 | */ | */ | 
 |  |  | 
| static void interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | static void CPUCALL interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | 
| static void interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | static void CPUCALL interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | 
 |  |  | 
| void | void CPUCALL | 
 | interrupt(int num, int intrtype, int errorp, int error_code) | interrupt(int num, int intrtype, int errorp, int error_code) | 
 | { | { | 
 | descriptor_t gsd; | descriptor_t gsd; | 
| Line 216  interrupt(int num, int intrtype, int err | Line 220  interrupt(int num, int intrtype, int err | 
 | UINT16 new_cs; | UINT16 new_cs; | 
 | int exc_errcode; | int exc_errcode; | 
 |  |  | 
| VERBOSE(("interrupt: num = 0x%02x, intrtype = %s, errorp = %s, error_code = %08x", num, intrtype ? "on" : "off", errorp ? "on" : "off", error_code)); | VERBOSE(("interrupt: num = 0x%02x, intrtype = %s, errorp = %s, error_code = %08x", num, (intrtype == INTR_TYPE_EXTINTR) ? "external" : (intrtype == INTR_TYPE_EXCEPTION ? "exception" : "softint"), errorp ? "on" : "off", error_code)); | 
 |  |  | 
 | CPU_SET_PREV_ESP(); | CPU_SET_PREV_ESP(); | 
 |  |  | 
| Line 298  interrupt(int num, int intrtype, int err | Line 302  interrupt(int num, int intrtype, int err | 
 | } | } | 
 |  |  | 
 | /* 5.10.1.1. 例外/割り込みハンドラ・プロシージャの保護 */ | /* 5.10.1.1. 例外/割り込みハンドラ・プロシージャの保護 */ | 
| if ((intrtype != INTR_TYPE_EXTINTR) && (gsd.dpl < CPU_STAT_CPL)) { | if ((intrtype == INTR_TYPE_SOFTINTR) && (gsd.dpl < CPU_STAT_CPL)) { | 
| VERBOSE(("interrupt: intrtype(%d) && DPL(%d) < CPL(%d)", intrtype, gsd.dpl, CPU_STAT_CPL)); | VERBOSE(("interrupt: intrtype(softint) && DPL(%d) < CPL(%d)", gsd.dpl, CPU_STAT_CPL)); | 
 | EXCEPTION(GP_EXCEPTION, exc_errcode); | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  |  | 
| Line 337  interrupt(int num, int intrtype, int err | Line 341  interrupt(int num, int intrtype, int err | 
 | CPU_CLEAR_PREV_ESP(); | CPU_CLEAR_PREV_ESP(); | 
 | } | } | 
 |  |  | 
| static void | static void CPUCALL | 
 | interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | 
 | { | { | 
 | selector_t task_sel; | selector_t task_sel; | 
| Line 378  interrupt_task_gate(const descriptor_t * | Line 382  interrupt_task_gate(const descriptor_t * | 
 | CPU_SET_PREV_ESP(); | CPU_SET_PREV_ESP(); | 
 |  |  | 
 | if (errorp) { | if (errorp) { | 
| XPUSH0(error_code); | VERBOSE(("interrupt: push error code (%08x)", error_code)); | 
|  | if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_32) { | 
|  | PUSH0_32(error_code); | 
|  | } else { | 
|  | PUSH0_16(error_code); | 
|  | } | 
 | } | } | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
| Line 388  interrupt_task_gate(const descriptor_t * | Line 397  interrupt_task_gate(const descriptor_t * | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void | static void CPUCALL | 
 | interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | 
 | { | { | 
 | selector_t cs_sel, ss_sel; | selector_t cs_sel, ss_sel; | 
| Line 400  interrupt_intr_or_trap(const descriptor_ | Line 409  interrupt_intr_or_trap(const descriptor_ | 
 | UINT32 new_ip, new_sp; | UINT32 new_ip, new_sp; | 
 | UINT32 old_ip, old_sp; | UINT32 old_ip, old_sp; | 
 | UINT16 old_cs, old_ss, new_ss; | UINT16 old_cs, old_ss, new_ss; | 
 |  | BOOL is32bit; | 
 | int exc_errcode; | int exc_errcode; | 
 | int rv; | int rv; | 
 |  |  | 
| Line 462  interrupt_intr_or_trap(const descriptor_ | Line 472  interrupt_intr_or_trap(const descriptor_ | 
 | EXCEPTION(NP_EXCEPTION, exc_errcode); | EXCEPTION(NP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  |  | 
 |  | is32bit = gsdp->type & CPU_SYSDESC_TYPE_32BIT; | 
 | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) { | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) { | 
 | stacksize = errorp ? 12 : 10; | stacksize = errorp ? 12 : 10; | 
 | if (!CPU_STAT_VM86) { | if (!CPU_STAT_VM86) { | 
| Line 476  interrupt_intr_or_trap(const descriptor_ | Line 487  interrupt_intr_or_trap(const descriptor_ | 
 | } | } | 
 | stacksize += 8; | stacksize += 8; | 
 | } | } | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | stacksize *= 2; | stacksize *= 2; | 
 | } | } | 
 |  |  | 
| Line 527  interrupt_intr_or_trap(const descriptor_ | Line 538  interrupt_intr_or_trap(const descriptor_ | 
 | } | } | 
 |  |  | 
 | /* check stack room size */ | /* check stack room size */ | 
| cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize); | cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize, ss_sel.desc.d); | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
 | if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { | 
| Line 541  interrupt_intr_or_trap(const descriptor_ | Line 552  interrupt_intr_or_trap(const descriptor_ | 
 | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); | 
 | CPU_EIP = new_ip; | CPU_EIP = new_ip; | 
 |  |  | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { | 
 | PUSH0_32(CPU_GS); | PUSH0_32(CPU_GS); | 
 | PUSH0_32(CPU_FS); | PUSH0_32(CPU_FS); | 
| Line 591  interrupt_intr_or_trap(const descriptor_ | Line 602  interrupt_intr_or_trap(const descriptor_ | 
 | VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); | VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); | 
 |  |  | 
 | stacksize = errorp ? 8 : 6; | stacksize = errorp ? 8 : 6; | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | stacksize *= 2; | stacksize *= 2; | 
 | } | } | 
 |  |  | 
| Line 601  interrupt_intr_or_trap(const descriptor_ | Line 612  interrupt_intr_or_trap(const descriptor_ | 
 | } else { | } else { | 
 | sp = CPU_SP; | sp = CPU_SP; | 
 | } | } | 
| SS_PUSH_CHECK(sp, stacksize); | /* | 
|  | * 17.1 | 
|  | * コールゲート、割り込みゲート、またはトラップゲートを通じて | 
|  | * プログラムの制御を他のコード・セグメントに移行するときは、 | 
|  | * 移行中に使用されるオペランド・サイズは使用されるゲートの | 
|  | * タイプ(16 ビットまたは32 ビット)によって決まる(移行命 | 
|  | * 令のD フラグ、プリフィックスのいずれにもよらない)。 | 
|  | */ | 
|  | SS_PUSH_CHECK1(sp, stacksize, is32bit); | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
 | if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { | 
| Line 612  interrupt_intr_or_trap(const descriptor_ | Line 631  interrupt_intr_or_trap(const descriptor_ | 
 | load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); | load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); | 
 | CPU_EIP = new_ip; | CPU_EIP = new_ip; | 
 |  |  | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | PUSH0_32(old_flags); | PUSH0_32(old_flags); | 
 | PUSH0_32(old_cs); | PUSH0_32(old_cs); | 
 | PUSH0_32(old_ip); | PUSH0_32(old_ip); |