np2/i386c/ia32/exception.c - diff

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Diff for /np2/i386c/ia32/exception.c between versions 1.15 and 1.34

version 1.15, 2004/03/12 13:34:08	version 1.34, 2012/01/08 11:32:16
Line 1	Line 1
/* $Id$ */

/*	/*
* Copyright (c) 2003 NONAKA Kimihiro	* Copyright (c) 2003 NONAKA Kimihiro
* All rights reserved.	* All rights reserved.
Line 12	Line 10
* 2. Redistributions in binary form must reproduce the above copyright	* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the	* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.	* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*	*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
Line 65 static const int dftable[4][4] = {	Line 61 static const int dftable[4][4] = {
{ 1, 1, 1, 1, },	{ 1, 1, 1, 1, },
};	};

void	void CPUCALL
exception(int num, int error_code)	exception(int num, int error_code)
{	{
	#if defined(DEBUG)
	extern int cpu_debug_rep_cont;
	extern CPU_REGS cpu_debug_rep_regs;
	#endif
int errorp = 0;	int errorp = 0;

__ASSERT((unsigned int)num < EXCEPTION_NUM);	__ASSERT((unsigned int)num < EXCEPTION_NUM);

	#if 0
	iptrace_out();
	debugwriteseg("execption.bin", &CPU_CS_DESC, CPU_PREV_EIP & 0xffff0000, 0x10000);
	#endif

VERBOSE(("exception: -------------------------------------------------------------- start"));	VERBOSE(("exception: -------------------------------------------------------------- start"));
VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP));	VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP));
VERBOSE(("%s", cpu_reg2str()));	VERBOSE(("%s", cpu_reg2str()));
	VERBOSE(("code: %dbit(%dbit), address: %dbit(%dbit)", CPU_INST_OP32 ? 32 : 16, CPU_STATSAVE.cpu_inst_default.op_32 ? 32 : 16, CPU_INST_AS32 ? 32 : 16, CPU_STATSAVE.cpu_inst_default.as_32 ? 32 : 16));
	#if defined(DEBUG)
	if (cpu_debug_rep_cont) {
	VERBOSE(("rep: original regs: ecx=%08x, esi=%08x, edi=%08x", cpu_debug_rep_regs.reg[CPU_ECX_INDEX].d, cpu_debug_rep_regs.reg[CPU_ESI_INDEX].d, cpu_debug_rep_regs.reg[CPU_EDI_INDEX].d));
	}
	VERBOSE(("%s", cpu_disasm2str(CPU_PREV_EIP)));
	#endif

CPU_STAT_EXCEPTION_COUNTER_INC();	CPU_STAT_EXCEPTION_COUNTER_INC();
if ((CPU_STAT_EXCEPTION_COUNTER >= 3)	if ((CPU_STAT_EXCEPTION_COUNTER >= 3)
Line 84 exception(int num, int error_code)	Line 96 exception(int num, int error_code)
}	}

switch (num) {	switch (num) {
case DE_EXCEPTION: /* (F) 除算エラー */	case DE_EXCEPTION: /* (F) 除算エラー */
case DB_EXCEPTION: /* (F/T) デバッグ */	case DB_EXCEPTION: /* (F/T) デバッグ */
case BR_EXCEPTION: /* (F) BOUND の範囲外 */	case BR_EXCEPTION: /* (F) BOUND の範囲外 */
case UD_EXCEPTION: /* (F) 無効オペコード */	case UD_EXCEPTION: /* (F) 無効オペコード */
case NM_EXCEPTION: /* (F) デバイス使用不可 (FPU が無い) */	case NM_EXCEPTION: /* (F) デバイス使用不可 (FPU が無い) */
case MF_EXCEPTION: /* (F) 浮動小数点エラー */	case MF_EXCEPTION: /* (F) 浮動小数点エラー */
#if CPU_FAMILY >= 5
case MC_EXCEPTION: /* (A) マシンチェック */
#endif
#if CPU_FAMILY >= 6
case XF_EXCEPTION: /* (F) ストリーミング SIMD 拡張命令 */
#endif
CPU_EIP = CPU_PREV_EIP;	CPU_EIP = CPU_PREV_EIP;
	if (CPU_STATSAVE.cpu_stat.backout_sp)
	CPU_ESP = CPU_PREV_ESP;
/FALLTHROUGH/	/FALLTHROUGH/
case NMI_EXCEPTION: /* (I) NMI 割り込み */	case NMI_EXCEPTION: /* (I) NMI 割り込み */
case BP_EXCEPTION: /* (T) ブレークポイント */	case BP_EXCEPTION: /* (T) ブレークポイント */
case OF_EXCEPTION: /* (T) オーバーフロー */	case OF_EXCEPTION: /* (T) オーバーフロー */
errorp = 0;	errorp = 0;
break;	break;

case DF_EXCEPTION: /* (A) ・タ・ヨ・�ユ・ゥ・�ネ (errcode: 0) */	case DF_EXCEPTION: /* (A) 繝c��(errcode: 0) */
errorp = 1;	errorp = 1;
error_code = 0;	error_code = 0;
break;	break;

#if CPU_FAMILY >= 4	case AC_EXCEPTION: /* (F) 繧「繝ゥ繧、繝ウ繝。繝ウ繝医メ繧ァ繝�け (errcode: 0) */
case AC_EXCEPTION: /* (F) アラインメントチェック (errcode: 0) */
error_code = 0;	error_code = 0;
/FALLTHROUGH/	/FALLTHROUGH/
#endif	case TS_EXCEPTION: /* (F) 無効 TSS (errcode) */
case TS_EXCEPTION: /* (F) フオクTSS (errcode) */	case NP_EXCEPTION: /* (F) セグメント不在 (errcode) */
case NP_EXCEPTION: /* (F) ・サ・ー・皈鵐班垪(errcode) */	case SS_EXCEPTION: /* (F) スタックセグメントフォルト (errcode) */
case SS_EXCEPTION: /* (F) スタックセグメントフォルト (errcode) */	case GP_EXCEPTION: /* (F) 一般保護例外 (errcode) */
case GP_EXCEPTION: /* (F) 一般保護例外 (errcode) */	case PF_EXCEPTION: /* (F) ページフォルト (errcode) */
case PF_EXCEPTION: /* (F) ページフォルト (errcode) */
CPU_EIP = CPU_PREV_EIP;	CPU_EIP = CPU_PREV_EIP;
	if (CPU_STATSAVE.cpu_stat.backout_sp)
	CPU_ESP = CPU_PREV_ESP;
errorp = 1;	errorp = 1;
break;	break;

Line 139 exception(int num, int error_code)	Line 147 exception(int num, int error_code)

VERBOSE(("exception: ---------------------------------------------------------------- end"));	VERBOSE(("exception: ---------------------------------------------------------------- end"));

INTERRUPT(num, 0, errorp, error_code);	interrupt(num, INTR_TYPE_EXTINTR, errorp, error_code);
#if defined(IA32_SUPPORT_DEBUG_REGISTER)	#if defined(IA32_SUPPORT_DEBUG_REGISTER)
if (num != BP_EXCEPTION) {	if (num != BP_EXCEPTION) {
if (CPU_INST_OP32) {	if (CPU_INST_OP32) {
Line 152 exception(int num, int error_code)	Line 160 exception(int num, int error_code)
}	}

/*	/*
* ・ウ。シ・�ヲ・イ。シ・ネ。ヲ・ヌ・」・ケ・ッ・�ラ・ソ	* 繧ウ繝シ繝ォ繝サ繧イ繝シ繝医�繝�ぅ繧ケ繧ッ繝ェ繝励ち
*	*
* 31 16 15 14 13 12 8 7 5 4 0	* 31 16 15 14 13 12 8 7 5 4 0
* +------------------------------------+--+-----+----------+-----+---------+	* +------------------------------------+--+-----+----------+-----+---------+
* \| ・ェ・ユ・サ・テ・ネ 31..16 \| P\| DPL \| 0 D 1 0 0\|0 0 0\|・ォ・ヲ・鵐\| 4	* \| オフセット 31..16 \| P\| DPL \| 0 D 1 0 0\|0 0 0\|カウント \| 4
* +------------------------------------+--+-----+----------+-----+---------+	* +------------------------------------+--+-----+----------+-----+---------+
* 31 16 15 0	* 31 16 15 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
* \| セグメント・セレクタ \| オフセット 15..0 \| 0	* \| 繧サ繧ー繝。繝ウ繝医�繧サ繝ャ繧ッ繧ソ \| 繧ェ繝輔そ繝�ヨ 15..0 \| 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
*/	*/

/*	/*
* ウ荀�゜・ヌ・」・ケ・ッ・�ラ・ソ	* 蜑イ繧願セシ縺ソ繝�ぅ繧ケ繧ッ繝ェ繝励ち
*--	*--
* ・ソ・ケ・ッ。ヲ・イ。シ・ネ	* 繧ソ繧ケ繧ッ繝サ繧イ繝シ繝� *
* 31 16 15 14 13 12 8 7 0	* 31 16 15 14 13 12 8 7 0
* +------------------------------------+--+-----+----------+---------------+	* +------------------------------------+--+-----+----------+---------------+
Line 175 exception(int num, int error_code)	Line 183 exception(int num, int error_code)
* +------------------------------------+--+-----+----------+---------------+	* +------------------------------------+--+-----+----------+---------------+
* 31 16 15 0	* 31 16 15 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
* \| TSS セグメント・セレクタ \| Reserved \| 0	* \| TSS 繧サ繧ー繝。繝ウ繝医�繧サ繝ャ繧ッ繧ソ \| Reserved \| 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
*--	*--
* ウ荀�+ * 割り込み・ゲート
*	*
* 31 16 15 14 13 12 8 7 5 4 0	* 31 16 15 14 13 12 8 7 5 4 0
* +------------------------------------+--+-----+----------+-----+---------+	* +------------------------------------+--+-----+----------+-----+---------+
* \| ・ェ・ユ・サ・テ・ネ 31..16 \| P\| DPL \| 0 D 1 1 0\|0 0 0\|Reserved \| 4	* \| 繧ェ繝輔そ繝�ヨ 31..16 \| P\| DPL \| 0 D 1 1 0\|0 0 0\|Reserved \| 4
* +------------------------------------+--+-----+----------+-----+---------+	* +------------------------------------+--+-----+----------+-----+---------+
* 31 16 15 0	* 31 16 15 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
* \| ・サ・ー・皈鵐函Ε札譽� \| オフセット 15..0 \| 0	* \| 繧サ繧ー繝。繝ウ繝医�繧サ繝ャ繧ッ繧ソ \| 繧ェ繝輔そ繝�ヨ 15..0 \| 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
*--	*--
* ・ネ・鬣テ・ラ。ヲ・イ。シ・ネ	* 繝医Λ繝��繝サ繧イ繝シ繝� *
* 31 16 15 14 13 12 8 7 5 4 0	* 31 16 15 14 13 12 8 7 5 4 0
* +------------------------------------+--+-----+----------+-----+---------+	* +------------------------------------+--+-----+----------+-----+---------+
* \| オフセット 31..16 \| P\| DPL \| 0 D 1 1 1\|0 0 0\|Reserved \| 4	* \| 繧ェ繝輔そ繝�ヨ 31..16 \| P\| DPL \| 0 D 1 1 1\|0 0 0\|Reserved \| 4
* +------------------------------------+--+-----+----------+-----+---------+	* +------------------------------------+--+-----+----------+-----+---------+
* 31 16 15 0	* 31 16 15 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
* \| ・サ・ー・皈鈆ネ。ヲ・サ・�ッ・ソ \| ・ェ・ユ・サ・テ・ネ 15..0 \| 0	* \| 繧サ繧ー繝。繝ウ繝医�繧サ繝ャ繧ッ繧ソ \| 繧ェ繝輔そ繝�ヨ 15..0 \| 0
* +------------------------------------+-----------------------------------+	* +------------------------------------+-----------------------------------+
*--	*--
* DPL : ・ヌ・」・ケ・ッ・�ラ・ソニテク「・�ル・- * オフセット : プロシージャ・エントリ・ポイントまでのオフセット	* DPL : ディスクリプタ特権レベル
* P : セグメント存在フラグ	* オフセット : プロシージャ・エントリ・ポイントまでのオフセット
* セレクタ : ディスティネーション・コード・セグメントのセグメント・セレクタ	* P : セグメント存在フラグ
* D : ゲートのサイズ．0 = 16 bit, 1 = 32 bit	* セレクタ : ディスティネーション・コード・セグメントのセグメント・セレクタ
	* D : ゲートのサイズ．0 = 16 bit, 1 = 32 bit
*/	*/

static void interrupt_task_gate(descriptor_t *gd, int softintp, int errorp, int error_code);	static void CPUCALL interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code);
static void interrupt_intr_or_trap(descriptor_t *gd, int softintp, int errorp, int error_code);	static void CPUCALL interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code);

void	void CPUCALL
interrupt(int num, int softintp, int errorp, int error_code)	interrupt(int num, int intrtype, int errorp, int error_code)
{	{
descriptor_t gd;	descriptor_t gsd;
UINT idt_idx;	UINT idt_idx;
UINT32 new_ip;	UINT32 new_ip;
UINT16 new_cs;	UINT16 new_cs;
	int exc_errcode;

	VERBOSE(("interrupt: num = 0x%02x, intrtype = %s, errorp = %s, error_code = %08x", num, intrtype ? "on" : "off", errorp ? "on" : "off", error_code));

VERBOSE(("interrupt: num = 0x%02x, softintp = %s, errorp = %s, error_code = %08x", num, softintp ? "on" : "off", errorp ? "on" : "off", error_code));	CPU_SET_PREV_ESP();

if (!CPU_STAT_PM) {	if (!CPU_STAT_PM) {
/* real mode */	/* real mode */
	CPU_WORKCLOCK(20);

idt_idx = num * 4;	idt_idx = num * 4;
if (idt_idx + 3 > CPU_IDTR_LIMIT) {	if (idt_idx + 3 > CPU_IDTR_LIMIT) {
VERBOSE(("interrupt: real-mode IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT));	VERBOSE(("interrupt: real-mode IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT));
EXCEPTION(GP_EXCEPTION, idt_idx + 2);	EXCEPTION(GP_EXCEPTION, idt_idx + 2);
}	}

if (!softintp && CPU_STAT_HLT) {	if ((intrtype == INTR_TYPE_EXTINTR) && CPU_STAT_HLT) {
	VERBOSE(("interrupt: reset HTL in real mode"));
CPU_EIP++;	CPU_EIP++;
CPU_STAT_HLT = FALSE;	CPU_STAT_HLT = 0;
}	}

REGPUSH0(REAL_FLAGREG);	REGPUSH0(REAL_FLAGREG);
Line 242 interrupt(int num, int softintp, int err	Line 256 interrupt(int num, int softintp, int err

new_ip = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx);	new_ip = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx);
new_cs = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx + 2);	new_cs = cpu_memoryread_w(CPU_IDTR_BASE + idt_idx + 2);
CPU_SET_SEGREG(CPU_CS_INDEX, new_cs);	LOAD_SEGREG(CPU_CS_INDEX, new_cs);
SET_EIP(new_ip);	CPU_EIP = new_ip;
CPU_WORKCLOCK(20);
} else {	} else {
/* protected mode */	/* protected mode */
VERBOSE(("interrupt: -------------------------------------------------------------- start"));	CPU_WORKCLOCK(200);

	VERBOSE(("interrupt: -------------------------------------------------------------- start"));
VERBOSE(("interrupt: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));	VERBOSE(("interrupt: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));

#if defined(DEBUG)	#if defined(DEBUG)
if (num == 0x80) {	if (num == 0x80) {
/* Linux, FreeBSD, NetBSD, OpenBSD system call */	/* Linux, FreeBSD, NetBSD, OpenBSD system call */
VERBOSE(("interrupt: syscall no = %d\n%s", CPU_EAX, cpu_reg2str()));	VERBOSE(("interrupt: syscall# = %d\n%s", CPU_EAX, cpu_reg2str()));
}	}
#endif	#endif

/* VM86 && IOPL < 3 && interrupt cause == INTn */
if (CPU_STAT_VM86 && (CPU_STAT_IOPL < CPU_IOPL3) && (softintp == -1)) {
VERBOSE(("interrupt: VM86 && IOPL < 3 && INTn"));
EXCEPTION(GP_EXCEPTION, 0);
}

idt_idx = num * 8;	idt_idx = num * 8;
	exc_errcode = idt_idx + 2;
	if (intrtype == INTR_TYPE_EXTINTR)
	exc_errcode++;

if (idt_idx + 7 > CPU_IDTR_LIMIT) {	if (idt_idx + 7 > CPU_IDTR_LIMIT) {
VERBOSE(("interrupt: IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT));	VERBOSE(("interrupt: IDTR limit check failure (idx = 0x%04x, limit = 0x%08x", idt_idx, CPU_IDTR_LIMIT));
EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}

memset(&gd, 0, sizeof(gd));	/* load a gate descriptor from interrupt descriptor table */
load_descriptor(&gd, CPU_IDTR_BASE + idt_idx);	memset(&gsd, 0, sizeof(gsd));
if (!gd.valid \|\| !gd.p) {	load_descriptor(&gsd, CPU_IDTR_BASE + idt_idx);
	if (!SEG_IS_VALID(&gsd)) {
VERBOSE(("interrupt: gate descripter is invalid."));	VERBOSE(("interrupt: gate descripter is invalid."));
EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
	}
	if (!SEG_IS_SYSTEM(&gsd)) {
	VERBOSE(("interrupt: gate descriptor is not system segment."));
	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}

switch (gd.type) {	switch (gsd.type) {
case CPU_SYSDESC_TYPE_TASK:	case CPU_SYSDESC_TYPE_TASK:
case CPU_SYSDESC_TYPE_INTR_16:	case CPU_SYSDESC_TYPE_INTR_16:
case CPU_SYSDESC_TYPE_INTR_32:	case CPU_SYSDESC_TYPE_INTR_32:
Line 286 interrupt(int num, int softintp, int err	Line 303 interrupt(int num, int softintp, int err
break;	break;

default:	default:
VERBOSE(("interrupt: invalid gate type (%d)", gd.type));	VERBOSE(("interrupt: invalid gate type (%d)", gsd.type));
EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
break;	break;
}	}

/* 5.10.1.1. 例外／割り込みハンドラ・プロシージャの保護 */	/* 5.10.1.1. 箴／割り込みハンドラ・プロシージャの保護 */
if (softintp && (gd.dpl < CPU_STAT_CPL)) {	if ((intrtype != INTR_TYPE_EXTINTR) && (gsd.dpl < CPU_STAT_CPL)) {
VERBOSE(("interrupt: softintp && DPL(%d) < CPL(%d)", gd.dpl, CPU_STAT_CPL));	VERBOSE(("interrupt: intrtype(%d) && DPL(%d) < CPL(%d)", intrtype, gsd.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, idt_idx + 2);	EXCEPTION(GP_EXCEPTION, exc_errcode);
	}

	if (!SEG_IS_PRESENT(&gsd)) {
	VERBOSE(("interrupt: gate descriptor is not present."));
	EXCEPTION(NP_EXCEPTION, exc_errcode);
}	}

if (!softintp && CPU_STAT_HLT) {	if ((intrtype == INTR_TYPE_EXTINTR) && CPU_STAT_HLT) {
	VERBOSE(("interrupt: reset HTL in protected mode"));
CPU_EIP++;	CPU_EIP++;
CPU_STAT_HLT = FALSE;	CPU_STAT_HLT = 0;
}	}

switch (gd.type) {	switch (gsd.type) {
case CPU_SYSDESC_TYPE_TASK:	case CPU_SYSDESC_TYPE_TASK:
interrupt_task_gate(&gd, softintp, errorp, error_code);	interrupt_task_gate(&gsd, intrtype, errorp, error_code);
break;	break;

case CPU_SYSDESC_TYPE_INTR_16:	case CPU_SYSDESC_TYPE_INTR_16:
case CPU_SYSDESC_TYPE_INTR_32:	case CPU_SYSDESC_TYPE_INTR_32:
case CPU_SYSDESC_TYPE_TRAP_16:	case CPU_SYSDESC_TYPE_TRAP_16:
case CPU_SYSDESC_TYPE_TRAP_32:	case CPU_SYSDESC_TYPE_TRAP_32:
interrupt_intr_or_trap(&gd, softintp, errorp, error_code);	interrupt_intr_or_trap(&gsd, intrtype, errorp, error_code);
break;	break;

default:	default:
EXCEPTION(GP_EXCEPTION, idt_idx + 2 + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
break;	break;
}	}

VERBOSE(("interrupt: ---------------------------------------------------------------- end"));	VERBOSE(("interrupt: ---------------------------------------------------------------- end"));
}	}

	CPU_CLEAR_PREV_ESP();
}	}

static void	static void CPUCALL
interrupt_task_gate(descriptor_t *gd, int softintp, int errorp, int error_code)	interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code)
{	{
selector_t task_sel;	selector_t task_sel;
int rv;	int rv;

VERBOSE(("interrupt: TASK-GATE"));	VERBOSE(("interrupt: TASK-GATE"));

(void)softintp;	rv = parse_selector(&task_sel, gsdp->u.gate.selector);
	if (rv < 0 \|\| task_sel.ldt \|\| !SEG_IS_SYSTEM(&task_sel.desc)) {
rv = parse_selector(&task_sel, gd->u.gate.selector);	VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT, type = %s)", gsdp->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G', task_sel.desc.s ? "code/data" : "system"));
if (rv < 0 \|\| task_sel.ldt) {
VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d, %cDT)", gd->u.gate.selector, rv, task_sel.ldt ? 'L' : 'G'));
EXCEPTION(TS_EXCEPTION, task_sel.idx);	EXCEPTION(TS_EXCEPTION, task_sel.idx);
}	}

Line 363 interrupt_task_gate(descriptor_t *gd, in	Line 386 interrupt_task_gate(descriptor_t *gd, in

task_switch(&task_sel, TASK_SWITCH_INTR);	task_switch(&task_sel, TASK_SWITCH_INTR);

	CPU_SET_PREV_ESP();

if (errorp) {	if (errorp) {
XPUSH0(error_code);	XPUSH0(error_code);
}	}

	/* out of range */
	if (CPU_EIP > CPU_STAT_CS_LIMIT) {
	VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", CPU_EIP, CPU_STAT_CS_LIMIT));
	EXCEPTION(GP_EXCEPTION, 0);
	}
}	}

static void	static void CPUCALL
interrupt_intr_or_trap(descriptor_t *gd, int softintp, int errorp, int error_code)	interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code)
{	{
selector_t cs_sel, ss_sel;	selector_t cs_sel, ss_sel;
UINT stacksize;	UINT stacksize;
Line 380 interrupt_intr_or_trap(descriptor_t *gd,	Line 411 interrupt_intr_or_trap(descriptor_t *gd,
UINT32 new_ip, new_sp;	UINT32 new_ip, new_sp;
UINT32 old_ip, old_sp;	UINT32 old_ip, old_sp;
UINT16 old_cs, old_ss, new_ss;	UINT16 old_cs, old_ss, new_ss;
	int exc_errcode;
int rv;	int rv;

new_ip = gd->u.gate.offset;	new_ip = gsdp->u.gate.offset;
old_ss = CPU_SS;	old_ss = CPU_SS;
old_cs = CPU_CS;	old_cs = CPU_CS;
old_ip = CPU_EIP;	old_ip = CPU_EIP;
Line 391 interrupt_intr_or_trap(descriptor_t *gd,	Line 423 interrupt_intr_or_trap(descriptor_t *gd,
new_flags = REAL_EFLAGREG & ~(T_FLAG\|RF_FLAG\|NT_FLAG\|VM_FLAG);	new_flags = REAL_EFLAGREG & ~(T_FLAG\|RF_FLAG\|NT_FLAG\|VM_FLAG);
mask = T_FLAG\|RF_FLAG\|NT_FLAG\|VM_FLAG;	mask = T_FLAG\|RF_FLAG\|NT_FLAG\|VM_FLAG;

switch (gd->type) {	switch (gsdp->type) {
case CPU_SYSDESC_TYPE_INTR_16:	case CPU_SYSDESC_TYPE_INTR_16:
case CPU_SYSDESC_TYPE_INTR_32:	case CPU_SYSDESC_TYPE_INTR_32:
VERBOSE(("interrupt: INTERRUPT-GATE"));	VERBOSE(("interrupt: INTERRUPT-GATE"));
Line 405 interrupt_intr_or_trap(descriptor_t *gd,	Line 437 interrupt_intr_or_trap(descriptor_t *gd,
break;	break;

default:	default:
ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gd->type);	ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gsdp->type);
break;	break;
}	}

rv = parse_selector(&cs_sel, gd->u.gate.selector);	exc_errcode = gsdp->u.gate.selector & ~3;
	if (intrtype == INTR_TYPE_EXTINTR)
	exc_errcode++;

	rv = parse_selector(&cs_sel, gsdp->u.gate.selector);
if (rv < 0) {	if (rv < 0) {
VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gd->u.gate.selector, rv));	VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gsdp->u.gate.selector, rv));
EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}

/* check segment type */	/* check segment type */
if (!cs_sel.desc.s) {	if (SEG_IS_SYSTEM(&cs_sel.desc)) {
VERBOSE(("interrupt: code segment is system segment"));	VERBOSE(("interrupt: code segment is system segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}
if (!cs_sel.desc.u.seg.c) {	if (SEG_IS_DATA(&cs_sel.desc)) {
VERBOSE(("interrupt: code segment is data segment"));	VERBOSE(("interrupt: code segment is data segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}

/* check privilege level */	/* check privilege level */
if (cs_sel.desc.dpl > CPU_STAT_CPL) {	if (cs_sel.desc.dpl > CPU_STAT_CPL) {
VERBOSE(("interrupt: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));	VERBOSE(("interrupt: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}

/* not present */	/* not present */
if (selector_is_not_present(&cs_sel)) {	if (selector_is_not_present(&cs_sel)) {
VERBOSE(("interrupt: selector is not present"));	VERBOSE(("interrupt: selector is not present"));
EXCEPTION(NP_EXCEPTION, cs_sel.idx + !softintp);	EXCEPTION(NP_EXCEPTION, exc_errcode);
}	}

if (!cs_sel.desc.u.seg.ec	if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) {
&& (cs_sel.desc.dpl < CPU_STAT_CPL)) {	stacksize = errorp ? 12 : 10;
if (!CPU_STAT_VM86) {	if (!CPU_STAT_VM86) {
VERBOSE(("interrupt: INTER-PRIVILEGE-LEVEL-INTERRUPT"));	VERBOSE(("interrupt: INTER-PRIVILEGE-LEVEL-INTERRUPT"));
stacksize = errorp ? 12 : 10;
} else {	} else {
/* VM86 */	/* VM86 */
	VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE"));
if (cs_sel.desc.dpl != 0) {	if (cs_sel.desc.dpl != 0) {
/* 16.3.1.1 */	/* 16.3.1.1 */
VERBOSE(("interrupt: DPL[CS](%d) != 0", cs_sel.desc.dpl));	VERBOSE(("interrupt: DPL[CS](%d) != 0", cs_sel.desc.dpl));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}
VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE"));	stacksize += 8;
stacksize = errorp ? 20 : 18;
}	}
switch (gd->type) {	if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) {
case CPU_SYSDESC_TYPE_INTR_32:
case CPU_SYSDESC_TYPE_TRAP_32:
stacksize *= 2;	stacksize *= 2;
break;
}	}

	/* get stack pointer from TSS */
get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp);	get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp);

	/* parse stack segment descriptor */
rv = parse_selector(&ss_sel, new_ss);	rv = parse_selector(&ss_sel, new_ss);

	/* update exception error code */
	exc_errcode = ss_sel.idx;
	if (intrtype == INTR_TYPE_EXTINTR)
	exc_errcode++;

if (rv < 0) {	if (rv < 0) {
VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", new_ss, rv));	VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", new_ss, rv));
EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp);	EXCEPTION(TS_EXCEPTION, exc_errcode);
}	}

/* check privilege level */	/* check privilege level */
if (ss_sel.rpl != cs_sel.desc.dpl) {	if (ss_sel.rpl != cs_sel.desc.dpl) {
VERBOSE(("interrupt: RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel.desc.dpl));	VERBOSE(("interrupt: selector RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel.desc.dpl));
EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp);	EXCEPTION(TS_EXCEPTION, exc_errcode);
}	}
if (ss_sel.desc.dpl != cs_sel.desc.dpl) {	if (ss_sel.desc.dpl != cs_sel.desc.dpl) {
VERBOSE(("interrupt: DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel.desc.dpl));	VERBOSE(("interrupt: descriptor DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel.desc.dpl));
EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp);	EXCEPTION(TS_EXCEPTION, exc_errcode);
}	}

/* check segment type */	/* stack segment must be writable data segment. */
if (!ss_sel.desc.s) {	if (SEG_IS_SYSTEM(&ss_sel.desc)) {
VERBOSE(("interrupt: stack segment is system segment"));	VERBOSE(("interrupt: stack segment is system segment"));
EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp);	EXCEPTION(TS_EXCEPTION, exc_errcode);
}	}
if (ss_sel.desc.u.seg.c) {	if (SEG_IS_CODE(&ss_sel.desc)) {
VERBOSE(("interrupt: stack segment is code segment"));	VERBOSE(("interrupt: stack segment is code segment"));
EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp);	EXCEPTION(TS_EXCEPTION, exc_errcode);
}	}
if (!ss_sel.desc.u.seg.wr) {	if (!SEG_IS_WRITABLE_DATA(&ss_sel.desc)) {
VERBOSE(("interrupt: stack segment is read-only data segment"));	VERBOSE(("interrupt: stack segment is read-only data segment"));
EXCEPTION(TS_EXCEPTION, ss_sel.idx + !softintp);	EXCEPTION(TS_EXCEPTION, exc_errcode);
}	}

/* not present */	/* not present */
if (selector_is_not_present(&ss_sel)) {	if (selector_is_not_present(&ss_sel)) {
VERBOSE(("interrupt: selector is not present"));	VERBOSE(("interrupt: selector is not present"));
EXCEPTION(SS_EXCEPTION, ss_sel.idx + !softintp);	EXCEPTION(SS_EXCEPTION, exc_errcode);
}	}

/* check stack room size */	/* check stack room size */
STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_sp, stacksize);	cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize);

/* out of range */	/* out of range */
if (new_ip > cs_sel.desc.u.seg.limit) {	if (new_ip > cs_sel.desc.u.seg.limit) {
Line 510 interrupt_intr_or_trap(descriptor_t *gd,	Line 550 interrupt_intr_or_trap(descriptor_t *gd,
CPU_ESP = new_sp;	CPU_ESP = new_sp;

load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl);	load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl);
SET_EIP(new_ip);	CPU_EIP = new_ip;

switch (gd->type) {	if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) {
case CPU_SYSDESC_TYPE_INTR_32:
case CPU_SYSDESC_TYPE_TRAP_32:
if (CPU_STAT_VM86) {	if (CPU_STAT_VM86) {
PUSH0_32(CPU_GS);	PUSH0_32(CPU_GS);
PUSH0_32(CPU_FS);	PUSH0_32(CPU_FS);
PUSH0_32(CPU_DS);	PUSH0_32(CPU_DS);
PUSH0_32(CPU_ES);	PUSH0_32(CPU_ES);

CPU_SET_SEGREG(CPU_GS_INDEX, 0);	LOAD_SEGREG(CPU_GS_INDEX, 0);
CPU_STAT_SREG(CPU_GS_INDEX).valid = 0;	CPU_STAT_SREG(CPU_GS_INDEX).valid = 0;
CPU_SET_SEGREG(CPU_FS_INDEX, 0);	LOAD_SEGREG(CPU_FS_INDEX, 0);
CPU_STAT_SREG(CPU_FS_INDEX).valid = 0;	CPU_STAT_SREG(CPU_FS_INDEX).valid = 0;
CPU_SET_SEGREG(CPU_DS_INDEX, 0);	LOAD_SEGREG(CPU_DS_INDEX, 0);
CPU_STAT_SREG(CPU_DS_INDEX).valid = 0;	CPU_STAT_SREG(CPU_DS_INDEX).valid = 0;
CPU_SET_SEGREG(CPU_ES_INDEX, 0);	LOAD_SEGREG(CPU_ES_INDEX, 0);
CPU_STAT_SREG(CPU_ES_INDEX).valid = 0;	CPU_STAT_SREG(CPU_ES_INDEX).valid = 0;
}	}
PUSH0_32(old_ss);	PUSH0_32(old_ss);
Line 538 interrupt_intr_or_trap(descriptor_t *gd,	Line 576 interrupt_intr_or_trap(descriptor_t *gd,
if (errorp) {	if (errorp) {
PUSH0_32(error_code);	PUSH0_32(error_code);
}	}
break;	} else {

case CPU_SYSDESC_TYPE_INTR_16:
case CPU_SYSDESC_TYPE_TRAP_16:
if (CPU_STAT_VM86) {	if (CPU_STAT_VM86) {
ia32_panic("interrupt: 16bit gate && VM86");	ia32_panic("interrupt: 16bit gate && VM86");
}	}
Line 553 interrupt_intr_or_trap(descriptor_t *gd,	Line 588 interrupt_intr_or_trap(descriptor_t *gd,
if (errorp) {	if (errorp) {
PUSH0_16(error_code);	PUSH0_16(error_code);
}	}
break;
}	}
} else {	} else {
if (CPU_STAT_VM86) {	if (CPU_STAT_VM86) {
VERBOSE(("interrupt: VM86"));	VERBOSE(("interrupt: VM86"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}
if (!cs_sel.desc.u.seg.ec && (cs_sel.desc.dpl != CPU_STAT_CPL)) {	if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl != CPU_STAT_CPL)) {
VERBOSE(("interrupt: NON-CONFORMING-CODE-SEGMENT(%s) and DPL[CS](%d) != CPL", cs_sel.desc.u.seg.ec ? "false" : "true", cs_sel.desc.dpl, CPU_STAT_CPL));	VERBOSE(("interrupt: %sCONFORMING-CODE-SEGMENT(%d) && DPL[CS](%d) != CPL", SEG_IS_CONFORMING_CODE(&cs_sel.desc) ? "" : "NON-", cs_sel.desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel.idx + !softintp);	EXCEPTION(GP_EXCEPTION, exc_errcode);
}	}

VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT"));	VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT"));

stacksize = errorp ? 8 : 6;	stacksize = errorp ? 8 : 6;
switch (gd->type) {	if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) {
case CPU_SYSDESC_TYPE_INTR_32:
case CPU_SYSDESC_TYPE_TRAP_32:
stacksize *= 2;	stacksize *= 2;
break;
}	}

	/* check stack room size */
if (CPU_STAT_SS32) {	if (CPU_STAT_SS32) {
sp = CPU_ESP;	sp = CPU_ESP;
} else {	} else {
sp = CPU_SP;	sp = CPU_SP;
}	}
STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, stacksize);	SS_PUSH_CHECK(sp, stacksize);

/* out of range */	/* out of range */
if (new_ip > cs_sel.desc.u.seg.limit) {	if (new_ip > cs_sel.desc.u.seg.limit) {
Line 588 interrupt_intr_or_trap(descriptor_t *gd,	Line 621 interrupt_intr_or_trap(descriptor_t *gd,
}	}

load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);	load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);
SET_EIP(new_ip);	CPU_EIP = new_ip;

switch (gd->type) {	if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) {
case CPU_SYSDESC_TYPE_INTR_32:
case CPU_SYSDESC_TYPE_TRAP_32:
PUSH0_32(old_flags);	PUSH0_32(old_flags);
PUSH0_32(old_cs);	PUSH0_32(old_cs);
PUSH0_32(old_ip);	PUSH0_32(old_ip);
if (errorp) {	if (errorp) {
PUSH0_32(error_code);	PUSH0_32(error_code);
}	}
break;	} else {

case CPU_SYSDESC_TYPE_INTR_16:
case CPU_SYSDESC_TYPE_TRAP_16:
PUSH0_16(old_flags);	PUSH0_16(old_flags);
PUSH0_16(old_cs);	PUSH0_16(old_cs);
PUSH0_16(old_ip);	PUSH0_16(old_ip);
if (errorp) {	if (errorp) {
PUSH0_16(error_code);	PUSH0_16(error_code);
}	}
break;
}	}
}	}
#if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION)
CPU_EFLAG = new_flags;
CPU_OV = CPU_FLAG & O_FLAG;
CPU_TRAP = (CPU_FLAG & (I_FLAG\|T_FLAG)) == (I_FLAG\|T_FLAG);
if ((old_flags ^ CPU_EFLAG) & VM_FLAG) {
if (CPU_EFLAG & VM_FLAG) {
change_vm(1);
} else {
change_vm(0);
}
}
#else
set_eflags(new_flags, mask);	set_eflags(new_flags, mask);
#endif

VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));	VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));
}	}

RetroPC.NET-CVS <cvs@retropc.net>

Removed from v.1.15
changed lines
	Added in v.1.34