| version 1.29, 2011/12/21 16:27:10 | version 1.38, 2012/06/18 14:30:27 | 
| Line 61  static const int dftable[4][4] = { | Line 61  static const int dftable[4][4] = { | 
 | { 1, 1, 1, 1, }, | { 1, 1, 1, 1, }, | 
 | }; | }; | 
 |  |  | 
| void | void CPUCALL | 
 | exception(int num, int error_code) | exception(int num, int error_code) | 
 | { | { | 
 |  | #if defined(DEBUG) | 
 |  | extern int cpu_debug_rep_cont; | 
 |  | extern CPU_REGS cpu_debug_rep_regs; | 
 |  | #endif | 
 | int errorp = 0; | int errorp = 0; | 
 |  |  | 
 | __ASSERT((unsigned int)num < EXCEPTION_NUM); | __ASSERT((unsigned int)num < EXCEPTION_NUM); | 
| Line 76  exception(int num, int error_code) | Line 80  exception(int num, int error_code) | 
 | VERBOSE(("exception: -------------------------------------------------------------- start")); | VERBOSE(("exception: -------------------------------------------------------------- start")); | 
 | VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); | VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); | 
 | VERBOSE(("%s", cpu_reg2str())); | VERBOSE(("%s", cpu_reg2str())); | 
 |  | VERBOSE(("code: %dbit(%dbit), address: %dbit(%dbit)", CPU_INST_OP32 ? 32 : 16, CPU_STATSAVE.cpu_inst_default.op_32 ? 32 : 16, CPU_INST_AS32 ? 32 : 16, CPU_STATSAVE.cpu_inst_default.as_32 ? 32 : 16)); | 
 |  | #if defined(DEBUG) | 
 |  | if (cpu_debug_rep_cont) { | 
 |  | VERBOSE(("rep: original regs: ecx=%08x, esi=%08x, edi=%08x", cpu_debug_rep_regs.reg[CPU_ECX_INDEX].d, cpu_debug_rep_regs.reg[CPU_ESI_INDEX].d, cpu_debug_rep_regs.reg[CPU_EDI_INDEX].d)); | 
 |  | } | 
 |  | VERBOSE(("%s", cpu_disasm2str(CPU_PREV_EIP))); | 
 |  | #endif | 
 |  |  | 
 | CPU_STAT_EXCEPTION_COUNTER_INC(); | CPU_STAT_EXCEPTION_COUNTER_INC(); | 
 | if ((CPU_STAT_EXCEPTION_COUNTER >= 3) | if ((CPU_STAT_EXCEPTION_COUNTER >= 3) | 
| Line 85  exception(int num, int error_code) | Line 96  exception(int num, int error_code) | 
 | } | } | 
 |  |  | 
 | switch (num) { | switch (num) { | 
| case DE_EXCEPTION:      /* (F) ½ü»»¥¨¥é¡¼ */ | case DE_EXCEPTION:      /* (F) ½ü»»¥¨¥é¡¼ */ | 
| case DB_EXCEPTION:      /* (F/T) ¥Ç¥Ð¥Ã¥° */ | case DB_EXCEPTION:      /* (F/T) ¥Ç¥Ð¥Ã¥° */ | 
| case BR_EXCEPTION:      /* (F) BOUND ¤ÎÈϰϳ° */ | case BR_EXCEPTION:      /* (F) BOUND ¤ÎÈϰϳ° */ | 
| case UD_EXCEPTION:      /* (F) ̵¸ú¥ª¥Ú¥³¡¼¥É */ | case UD_EXCEPTION:      /* (F) ̵¸ú¥ª¥Ú¥³¡¼¥É */ | 
| case NM_EXCEPTION:      /* (F) ¥Ç¥Ð¥¤¥¹»ÈÍÑÉÔ²Ä (FPU ¤¬Ìµ¤¤) */ | case NM_EXCEPTION:      /* (F) ¥Ç¥Ð¥¤¥¹»ÈÍÑÉÔ²Ä (FPU ¤¬Ìµ¤¤) */ | 
| case MF_EXCEPTION:      /* (F) ÉâÆ°¾®¿ôÅÀ¥¨¥é¡¼ */ | case MF_EXCEPTION:      /* (F) ÉâÆ°¾®¿ôÅÀ¥¨¥é¡¼ */ | 
 | CPU_EIP = CPU_PREV_EIP; | CPU_EIP = CPU_PREV_EIP; | 
 | if (CPU_STATSAVE.cpu_stat.backout_sp) | if (CPU_STATSAVE.cpu_stat.backout_sp) | 
 | CPU_ESP = CPU_PREV_ESP; | CPU_ESP = CPU_PREV_ESP; | 
 | /*FALLTHROUGH*/ | /*FALLTHROUGH*/ | 
| case NMI_EXCEPTION:     /* (I) NMI ³ä¤ê¹þ¤ß */ | case NMI_EXCEPTION:     /* (I) NMI ³ä¤ê¹þ¤ß */ | 
| case BP_EXCEPTION:      /* (T) ¥Ö¥ì¡¼¥¯¥Ý¥¤¥ó¥È */ | case BP_EXCEPTION:      /* (T) ¥Ö¥ì¡¼¥¯¥Ý¥¤¥ó¥È */ | 
| case OF_EXCEPTION:      /* (T) ¥ª¡¼¥Ð¡¼¥Õ¥í¡¼ */ | case OF_EXCEPTION:      /* (T) ¥ª¡¼¥Ð¡¼¥Õ¥í¡¼ */ | 
 | errorp = 0; | errorp = 0; | 
 | break; | break; | 
 |  |  | 
| case DF_EXCEPTION:      /* (A) ¡¦¥¿¡¦¥è¡¦ö§¥æ¡¦¥¥¡¦ö§¥Í (errcode: 0) */ | case DF_EXCEPTION:      /* (A) åãc«ã©ã (errcode: 0) */ | 
 | errorp = 1; | errorp = 1; | 
 | error_code = 0; | error_code = 0; | 
 | break; | break; | 
 |  |  | 
| case AC_EXCEPTION:      /* (F) ¥¢¥é¥¤¥ó¥á¥ó¥È¥Á¥§¥Ã¥¯ (errcode: 0) */ | case AC_EXCEPTION:      /* (F) åâ¡Öå㥥åâ¡¢å㥦åã¡£å㥦åã°å¥áå⥡åã¦å¤± (errcode: 0) */ | 
 | error_code = 0; | error_code = 0; | 
 | /*FALLTHROUGH*/ | /*FALLTHROUGH*/ | 
| case TS_EXCEPTION:      /* (F) ¥Õ¥ª¥¯TSS (errcode) */ | case TS_EXCEPTION:      /* (F) ̵¸ú TSS (errcode) */ | 
| case NP_EXCEPTION:      /* (F) ¡¦¥µ¡¦¡¼¡¦â§ó¥ÈÉÔº(errcode) */ | case NP_EXCEPTION:      /* (F) ¥»¥°¥á¥ó¥ÈÉG (errcode) */ | 
| case SS_EXCEPTION:      /* (F) ¥¹¥¿¥Ã¥¯¥»¥°¥á¥ó¥È¥Õ¥©¥ë¥È (errcode) */ | case SS_EXCEPTION:      /* (F) ¥¹¥¿¥Ã¥¯¥»¥°¥á¥ó¥È¥Õ¥©¥ë¥È (errcode) */ | 
| case GP_EXCEPTION:      /* (F) °ìÈÌÊݸîÎã³° (errcode) */ | case GP_EXCEPTION:      /* (F) °ìÈÌÊݸîÎã³° (errcode) */ | 
| case PF_EXCEPTION:      /* (F) ¥Ú¡¼¥¸¥Õ¥©¥ë¥È (errcode) */ | case PF_EXCEPTION:      /* (F) ¥Ú¡¼¥¸¥Õ¥©¥ë¥È (errcode) */ | 
 | CPU_EIP = CPU_PREV_EIP; | CPU_EIP = CPU_PREV_EIP; | 
 | if (CPU_STATSAVE.cpu_stat.backout_sp) | if (CPU_STATSAVE.cpu_stat.backout_sp) | 
 | CPU_ESP = CPU_PREV_ESP; | CPU_ESP = CPU_PREV_ESP; | 
| Line 136  exception(int num, int error_code) | Line 147  exception(int num, int error_code) | 
 |  |  | 
 | VERBOSE(("exception: ---------------------------------------------------------------- end")); | VERBOSE(("exception: ---------------------------------------------------------------- end")); | 
 |  |  | 
| interrupt(num, INTR_TYPE_EXTINTR, errorp, error_code); | interrupt(num, INTR_TYPE_EXCEPTION, errorp, error_code); | 
| #if defined(IA32_SUPPORT_DEBUG_REGISTER) |  | 
| if (num != BP_EXCEPTION) { |  | 
| if (CPU_INST_OP32) { |  | 
| set_eflags(REAL_EFLAGREG|RF_FLAG, RF_FLAG); |  | 
| } |  | 
| } |  | 
| #endif |  | 
 | CPU_STAT_EXCEPTION_COUNTER_CLEAR(); | CPU_STAT_EXCEPTION_COUNTER_CLEAR(); | 
 | siglongjmp(exec_1step_jmpbuf, 1); | siglongjmp(exec_1step_jmpbuf, 1); | 
 | } | } | 
 |  |  | 
 | /* | /* | 
| * ¡¦¥¦¡£¥·¡¦ö£¥ò¡¦¥¤¡£¥·¡¦¥Í¡£¥ò¡¦¥Ì¡¦¡×¡¦¥±¡¦¥Ã¡¦ô§¥é¡¦¥½ | * å⥦å㥷å㥩å㥵å⥤å㥷åã°å¦½åã®å¤¥å⥱åâ¥Ãå㥧åãÎå¤Á | 
 | * | * | 
 | *  31                                16 15 14 13 12       8 7   5 4       0 | *  31                                16 15 14 13 12       8 7   5 4       0 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
| * |         ¡¦¥§¡¦¥æ¡¦¥µ¡¦¥Æ¡¦¥Í 31..16          | P| DPL | 0 D 1 0 0|0 0 0|¡¦¥©¡¦¥ò¡¦ó¥| 4 | * |         ¥ª¥Õ¥»¥Ã¥È 31..16          | P| DPL | 0 D 1 0 0|0 0 0|¥«¥¦¥ó¥È | 4 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
 | *  31                                16 15                                0 | *  31                                16 15                                0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
| * |        ¥»¥°¥á¥ó¥È¡¦¥»¥ì¥¯¥¿        |          ¥ª¥Õ¥»¥Ã¥È 15..0         | 0 | * |        å⥵å⡼åã¡£å㥦åã°å¦½å⥵åã¥ãåâ¥Ãå⥽        |          å⥧åãÊ夽åã¦å¥è 15..0         | 0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
 | */ | */ | 
 |  |  | 
 | /* | /* | 
| * ¥¦è¦ô»¡¬¡¦¥Ì¡¦¡×¡¦¥±¡¦¥Ã¡¦ô§¥é¡¦¥½ | * é饤åâ´ê¥»¥·å᥽åã®å¤¥å⥱åâ¥Ãå㥧åãÎå¤Á | 
 | *-- | *-- | 
| * ¡¦¥½¡¦¥±¡¦¥Ã¡£¥ò¡¦¥¤¡£¥·¡¦¥Í | * å⥽å⥱åâ¥Ãå㥵å⥤å㥷å㊠ * | 
 | *  31                                16 15 14 13 12       8 7             0 | *  31                                16 15 14 13 12       8 7             0 | 
 | * +------------------------------------+--+-----+----------+---------------+ | * +------------------------------------+--+-----+----------+---------------+ | 
| Line 172  exception(int num, int error_code) | Line 176  exception(int num, int error_code) | 
 | * +------------------------------------+--+-----+----------+---------------+ | * +------------------------------------+--+-----+----------+---------------+ | 
 | *  31                                16 15                                0 | *  31                                16 15                                0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
| * |      TSS ¥»¥°¥á¥ó¥È¡¦¥»¥ì¥¯¥¿      |              Reserved             | 0 | * |      TSS å⥵å⡼åã¡£å㥦åã°å¦½å⥵åã¥ãåâ¥Ãå⥽      |              Reserved             | 0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
 | *-- | *-- | 
 | * ¥¦è¦ô»+ * ³ä¤ê¹þ¤ß¡¦¥²¡¼¥È |  | 
 | * | * | 
 | *  31                                16 15 14 13 12       8 7   5 4       0 | *  31                                16 15 14 13 12       8 7   5 4       0 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
| * |         ¡¦¥§¡¦¥æ¡¦¥µ¡¦¥Æ¡¦¥Í 31..16          | P| DPL | 0 D 1 1 0|0 0 0|Reserved | 4 | * |         å⥧åãÊ夽åã¦å¥è 31..16          | P| DPL | 0 D 1 1 0|0 0 0|Reserved | 4 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
 | *  31                                16 15                                0 | *  31                                16 15                                0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
| * |        ¡¦¥µ¡¦¡¼¡¦â§ó¥È¡¦¥»¥ì¥¯¥       |          ¥ª¥Õ¥»¥Ã¥È 15..0         | 0 | * |        å⥵å⡼åã¡£å㥦åã°å¦½å⥵åã¥ãåâ¥Ãå⥽        |          å⥧åãÊ夽åã¦å¥è 15..0         | 0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
 | *-- | *-- | 
| * ¡¦¥Í¡¦ò§¥Æ¡¦¥é¡£¥ò¡¦¥¤¡£¥·¡¦¥Í | * åã°å¦«åã¦å¥÷å㥵å⥤å㥷å㊠ * | 
 | *  31                                16 15 14 13 12       8 7   5 4       0 | *  31                                16 15 14 13 12       8 7   5 4       0 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
| * |         ¥ª¥Õ¥»¥Ã¥È 31..16          | P| DPL | 0 D 1 1 1|0 0 0|Reserved | 4 | * |         å⥧åãÊ夽åã¦å¥è 31..16          | P| DPL | 0 D 1 1 1|0 0 0|Reserved | 4 | 
 | * +------------------------------------+--+-----+----------+-----+---------+ | * +------------------------------------+--+-----+----------+-----+---------+ | 
 | *  31                                16 15                                0 | *  31                                16 15                                0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
| * |        ¡¦¥µ¡¦¡¼¡¦â§ü§¥Í¡£¥ò¡¦¥µ¡¦ø§¥Ã¡¦¥½        |          ¡¦¥§¡¦¥æ¡¦¥µ¡¦¥Æ¡¦¥Í 15..0         | 0 | * |        å⥵å⡼åã¡£å㥦åã°å¦½å⥵åã¥ãåâ¥Ãå⥽        |          å⥧åãÊ夽åã¦å¥è 15..0         | 0 | 
 | * +------------------------------------+-----------------------------------+ | * +------------------------------------+-----------------------------------+ | 
 | *-- | *-- | 
| * DPL        : ¡¦¥Ì¡¦¡×¡¦¥±¡¦¥Ã¡¦ô§¥é¡¦¥½¥Ë¥Æ¥¯¡Ö¡¦ø§¥ë¡¦- * ¥ª¥Õ¥»¥Ã¥È : ¥×¥í¥·¡¼¥¸¥ã¡¦¥¨¥ó¥È¥ê¡¦¥Ý¥¤¥ó¥È¤Þ¤Ç¤Î¥ª¥Õ¥»¥Ã¥È | * DPL        : ¥Ç¥£¥¹¥¯¥ê¥×¥¿ÆÃ¸¢¥ì¥Ù¥ë | 
| * P          : ¥»¥°¥á¥ó¥È¸ºß¥Õ¥é¥° | * ¥ª¥Õ¥»¥Ã¥È : ¥×¥í¥·¡¼¥¸¥ã¡¦¥¨¥ó¥È¥ê¡¦¥Ý¥¤¥ó¥È¤Þ¤Ç¤Î¥ª¥Õ¥»¥Ã¥È | 
| * ¥»¥ì¥¯¥¿   : ¥Ç¥£¥¹¥Æ¥£¥Í¡¼¥·¥ç¥ó¡¦¥³¡¼¥É¡¦¥»¥°¥á¥ó¥È¤Î¥»¥°¥á¥ó¥È¡¦¥»¥ì¥¯¥¿ | * P          : ¥»¥°¥á¥ó¥È¸ºß¥Õ¥é¥° | 
| * D          : ¥²¡¼¥È¤Î¥µ¥¤¥º¡¥0 = 16 bit, 1 = 32 bit | * ¥»¥ì¥¯¥¿   : ¥Ç¥£¥¹¥Æ¥£¥Í¡¼¥·¥ç¥ó¡¦¥³¡¼¥É¡¦¥»¥°¥á¥ó¥È¤Î¥»¥°¥á¥ó¥È¡¦¥»¥ì¥¯¥¿ | 
|  | * D          : ¥²¡¼¥È¤Î¥µ¥¤¥º¡¥0 = 16 bit, 1 = 32 bit | 
 | */ | */ | 
 |  |  | 
| static void interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | static void CPUCALL interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | 
| static void interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | static void CPUCALL interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code); | 
 |  |  | 
| void | void CPUCALL | 
 | interrupt(int num, int intrtype, int errorp, int error_code) | interrupt(int num, int intrtype, int errorp, int error_code) | 
 | { | { | 
 | descriptor_t gsd; | descriptor_t gsd; | 
| Line 216  interrupt(int num, int intrtype, int err | Line 220  interrupt(int num, int intrtype, int err | 
 | UINT16 new_cs; | UINT16 new_cs; | 
 | int exc_errcode; | int exc_errcode; | 
 |  |  | 
| VERBOSE(("interrupt: num = 0x%02x, intrtype = %s, errorp = %s, error_code = %08x", num, intrtype ? "on" : "off", errorp ? "on" : "off", error_code)); | VERBOSE(("interrupt: num = 0x%02x, intrtype = %s, errorp = %s, error_code = %08x", num, (intrtype == INTR_TYPE_EXTINTR) ? "external" : (intrtype == INTR_TYPE_EXCEPTION ? "exception" : "softint"), errorp ? "on" : "off", error_code)); | 
 |  |  | 
 | CPU_SET_PREV_ESP(); | CPU_SET_PREV_ESP(); | 
 |  |  | 
| Line 297  interrupt(int num, int intrtype, int err | Line 301  interrupt(int num, int intrtype, int err | 
 | break; | break; | 
 | } | } | 
 |  |  | 
| /* 5.10.1.1. Îã³°¡¿³ä¤ê¹þ¤ß¥Ï¥ó¥É¥é¡¦¥×¥í¥·¡¼¥¸¥ã¤ÎÊݸî */ | /* 5.10.1.1. 価¿³ä¤ê¹þ¤ß¥Ï¥ó¥É¥é¡¦¥×¥í¥·¡¼¥¸¥ã¤ÎÊݸî */ | 
| if ((intrtype != INTR_TYPE_EXTINTR) && (gsd.dpl < CPU_STAT_CPL)) { | if ((intrtype == INTR_TYPE_SOFTINTR) && (gsd.dpl < CPU_STAT_CPL)) { | 
| VERBOSE(("interrupt: intrtype(%d) && DPL(%d) < CPL(%d)", intrtype, gsd.dpl, CPU_STAT_CPL)); | VERBOSE(("interrupt: intrtype(softint) && DPL(%d) < CPL(%d)", gsd.dpl, CPU_STAT_CPL)); | 
 | EXCEPTION(GP_EXCEPTION, exc_errcode); | EXCEPTION(GP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  |  | 
| Line 337  interrupt(int num, int intrtype, int err | Line 341  interrupt(int num, int intrtype, int err | 
 | CPU_CLEAR_PREV_ESP(); | CPU_CLEAR_PREV_ESP(); | 
 | } | } | 
 |  |  | 
| static void | static void CPUCALL | 
 | interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | interrupt_task_gate(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | 
 | { | { | 
 | selector_t task_sel; | selector_t task_sel; | 
| Line 378  interrupt_task_gate(const descriptor_t * | Line 382  interrupt_task_gate(const descriptor_t * | 
 | CPU_SET_PREV_ESP(); | CPU_SET_PREV_ESP(); | 
 |  |  | 
 | if (errorp) { | if (errorp) { | 
| XPUSH0(error_code); | VERBOSE(("interrupt: push error code (%08x)", error_code)); | 
|  | if (task_sel.desc.type == CPU_SYSDESC_TYPE_TSS_32) { | 
|  | PUSH0_32(error_code); | 
|  | } else { | 
|  | PUSH0_16(error_code); | 
|  | } | 
 | } | } | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
| Line 388  interrupt_task_gate(const descriptor_t * | Line 397  interrupt_task_gate(const descriptor_t * | 
 | } | } | 
 | } | } | 
 |  |  | 
| static void | static void CPUCALL | 
 | interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code) | 
 | { | { | 
 | selector_t cs_sel, ss_sel; | selector_t cs_sel, ss_sel; | 
| Line 400  interrupt_intr_or_trap(const descriptor_ | Line 409  interrupt_intr_or_trap(const descriptor_ | 
 | UINT32 new_ip, new_sp; | UINT32 new_ip, new_sp; | 
 | UINT32 old_ip, old_sp; | UINT32 old_ip, old_sp; | 
 | UINT16 old_cs, old_ss, new_ss; | UINT16 old_cs, old_ss, new_ss; | 
 |  | BOOL is32bit; | 
 | int exc_errcode; | int exc_errcode; | 
 | int rv; | int rv; | 
 |  |  | 
| Line 462  interrupt_intr_or_trap(const descriptor_ | Line 472  interrupt_intr_or_trap(const descriptor_ | 
 | EXCEPTION(NP_EXCEPTION, exc_errcode); | EXCEPTION(NP_EXCEPTION, exc_errcode); | 
 | } | } | 
 |  |  | 
 |  | is32bit = gsdp->type & CPU_SYSDESC_TYPE_32BIT; | 
 | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) { | if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) { | 
 | stacksize = errorp ? 12 : 10; | stacksize = errorp ? 12 : 10; | 
 | if (!CPU_STAT_VM86) { | if (!CPU_STAT_VM86) { | 
| Line 476  interrupt_intr_or_trap(const descriptor_ | Line 487  interrupt_intr_or_trap(const descriptor_ | 
 | } | } | 
 | stacksize += 8; | stacksize += 8; | 
 | } | } | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | stacksize *= 2; | stacksize *= 2; | 
 | } | } | 
 |  |  | 
| Line 527  interrupt_intr_or_trap(const descriptor_ | Line 538  interrupt_intr_or_trap(const descriptor_ | 
 | } | } | 
 |  |  | 
 | /* check stack room size */ | /* check stack room size */ | 
| cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize); | cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize, ss_sel.desc.d); | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
 | if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { | 
| Line 541  interrupt_intr_or_trap(const descriptor_ | Line 552  interrupt_intr_or_trap(const descriptor_ | 
 | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); | load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl); | 
 | CPU_EIP = new_ip; | CPU_EIP = new_ip; | 
 |  |  | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { | 
 | PUSH0_32(CPU_GS); | PUSH0_32(CPU_GS); | 
 | PUSH0_32(CPU_FS); | PUSH0_32(CPU_FS); | 
| Line 591  interrupt_intr_or_trap(const descriptor_ | Line 602  interrupt_intr_or_trap(const descriptor_ | 
 | VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); | VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT")); | 
 |  |  | 
 | stacksize = errorp ? 8 : 6; | stacksize = errorp ? 8 : 6; | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | stacksize *= 2; | stacksize *= 2; | 
 | } | } | 
 |  |  | 
| Line 601  interrupt_intr_or_trap(const descriptor_ | Line 612  interrupt_intr_or_trap(const descriptor_ | 
 | } else { | } else { | 
 | sp = CPU_SP; | sp = CPU_SP; | 
 | } | } | 
| SS_PUSH_CHECK(sp, stacksize); | /* 17.1 Á´¤Æ¤Î¥Ç¡¼¥¿¡¦¥Ç¥£¥¹¥¯¥ê¥×¥¿¤Î B ¥Õ¥é¥°¤Ï¡¢ | 
|  | * ¥¨¥¯¥¹¥Ñ¥ó¥É¥À¥¦¥ó¡¦¥»¥°¥á¥ó¥È¤Î¾å°Ì¥¢¥É¥ì¥¹ÈϰϤΠ| 
|  | * À©¸æ¤â¹Ô¤¦¡£ | 
|  | */ | 
|  | SS_PUSH_CHECK1(sp, stacksize, is32bit); | 
 |  |  | 
 | /* out of range */ | /* out of range */ | 
 | if (new_ip > cs_sel.desc.u.seg.limit) { | if (new_ip > cs_sel.desc.u.seg.limit) { | 
| Line 612  interrupt_intr_or_trap(const descriptor_ | Line 627  interrupt_intr_or_trap(const descriptor_ | 
 | load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); | load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL); | 
 | CPU_EIP = new_ip; | CPU_EIP = new_ip; | 
 |  |  | 
| if (gsdp->type & CPU_SYSDESC_TYPE_32BIT) { | if (is32bit) { | 
 | PUSH0_32(old_flags); | PUSH0_32(old_flags); | 
 | PUSH0_32(old_cs); | PUSH0_32(old_cs); | 
 | PUSH0_32(old_ip); | PUSH0_32(old_ip); |