| version 1.9, 2004/02/06 16:49:51 | version 1.11, 2004/02/19 03:04:01 | 
| Line 76  exception(int num, int error_code) | Line 76  exception(int num, int error_code) | 
 | VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); | VERBOSE(("exception: %s, error_code = %x at %04x:%08x", exception_str[num], error_code, CPU_CS, CPU_PREV_EIP)); | 
 | VERBOSE(("%s", cpu_reg2str())); | VERBOSE(("%s", cpu_reg2str())); | 
 |  |  | 
| CPU_STAT_NERROR++; | CPU_STAT_EXCEPTION_COUNTER_INC(); | 
| if ((CPU_STAT_NERROR >= 3) | if ((CPU_STAT_EXCEPTION_COUNTER >= 3) | 
| || (CPU_STAT_NERROR == 2 && CPU_STAT_PREV_EXCEPTION == DF_EXCEPTION)) { | || (CPU_STAT_EXCEPTION_COUNTER == 2 && CPU_STAT_PREV_EXCEPTION == DF_EXCEPTION)) { | 
 | /* Triple fault */ | /* Triple fault */ | 
 | ia32_panic("exception: catch triple fault!"); | ia32_panic("exception: catch triple fault!"); | 
 | } | } | 
| Line 140  exception(int num, int error_code) | Line 140  exception(int num, int error_code) | 
 | break; | break; | 
 | } | } | 
 |  |  | 
| if (CPU_STAT_NERROR >= 2) { | if (CPU_STAT_EXCEPTION_COUNTER >= 2) { | 
 | if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { | if (dftable[exctype[CPU_STAT_PREV_EXCEPTION]][exctype[num]]) { | 
 | num = DF_EXCEPTION; | num = DF_EXCEPTION; | 
 | } | } | 
| Line 150  exception(int num, int error_code) | Line 150  exception(int num, int error_code) | 
 | VERBOSE(("exception: ---------------------------------------------------------------- end")); | VERBOSE(("exception: ---------------------------------------------------------------- end")); | 
 |  |  | 
 | INTERRUPT(num, 0, errorp, error_code); | INTERRUPT(num, 0, errorp, error_code); | 
 |  | CPU_STAT_EXCEPTION_COUNTER_CLEAR(); | 
 | siglongjmp(exec_1step_jmpbuf, 1); | siglongjmp(exec_1step_jmpbuf, 1); | 
 | } | } | 
 |  |  | 
| Line 209  exception(int num, int error_code) | Line 210  exception(int num, int error_code) | 
 | * D          : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | * D          : ゲートのサイズ.0 = 16 bit, 1 = 32 bit | 
 | */ | */ | 
 |  |  | 
| static void interrupt_task(descriptor_t *gdp, int softintp, int errorp, int error_code); | static void interrupt_task_gate(descriptor_t *gdp, int softintp, int errorp, int error_code); | 
 | static void interrupt_intr_or_trap(descriptor_t *gdp, int softintp, int errorp, int error_code); | static void interrupt_intr_or_trap(descriptor_t *gdp, int softintp, int errorp, int error_code); | 
 |  |  | 
 | void | void | 
| Line 230  interrupt(int num, int softintp, int err | Line 231  interrupt(int num, int softintp, int err | 
 | EXCEPTION(GP_EXCEPTION, idt_idx + 2); | EXCEPTION(GP_EXCEPTION, idt_idx + 2); | 
 | } | } | 
 |  |  | 
| if (!softintp) { | if (!softintp && CPU_STAT_HLT) { | 
| BYTE op = cpu_codefetch(CPU_IP); | CPU_EIP++; | 
| if (op == 0xf4) {       /* hlt */ | CPU_STAT_HLT = FALSE; | 
| CPU_EIP++; |  | 
| } |  | 
 | } | } | 
 |  |  | 
 | REGPUSH0(REAL_FLAGREG); | REGPUSH0(REAL_FLAGREG); | 
| Line 253  interrupt(int num, int softintp, int err | Line 252  interrupt(int num, int softintp, int err | 
 | /* protected mode */ | /* protected mode */ | 
 | VERBOSE(("interrupt: -------------------------------------------------------------- start")); | VERBOSE(("interrupt: -------------------------------------------------------------- start")); | 
 |  |  | 
 |  | VERBOSE(("interrupt: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | 
 |  |  | 
 |  | #if defined(DEBUG) | 
 |  | if (num == 0x80) { | 
 |  | /* Linux, FreeBSD, NetBSD, OpenBSD system call */ | 
 |  | VERBOSE(("interrupt: syscall no = %d\n%s", CPU_EAX, cpu_reg2str())); | 
 |  | } | 
 |  | #endif | 
 |  |  | 
 | /* VM86 && IOPL < 3 && interrupt cause == INTn */ | /* VM86 && IOPL < 3 && interrupt cause == INTn */ | 
 | if (CPU_STAT_VM86 && (CPU_STAT_IOPL < CPU_IOPL3) && (softintp == -1)) { | if (CPU_STAT_VM86 && (CPU_STAT_IOPL < CPU_IOPL3) && (softintp == -1)) { | 
 | VERBOSE(("interrupt: VM86 && IOPL < 3 && INTn")); | VERBOSE(("interrupt: VM86 && IOPL < 3 && INTn")); | 
| Line 292  interrupt(int num, int softintp, int err | Line 300  interrupt(int num, int softintp, int err | 
 | EXCEPTION(GP_EXCEPTION, idt_idx + 2); | EXCEPTION(GP_EXCEPTION, idt_idx + 2); | 
 | } | } | 
 |  |  | 
 |  | if (!softintp && CPU_STAT_HLT) { | 
 |  | CPU_EIP++; | 
 |  | CPU_STAT_HLT = FALSE; | 
 |  | } | 
 |  |  | 
 | switch (gd.type) { | switch (gd.type) { | 
 | case CPU_SYSDESC_TYPE_TASK: | case CPU_SYSDESC_TYPE_TASK: | 
| interrupt_task(&gd, softintp, errorp, error_code); | interrupt_task_gate(&gd, softintp, errorp, error_code); | 
 | break; | break; | 
 |  |  | 
 | case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: | 
| Line 314  interrupt(int num, int softintp, int err | Line 327  interrupt(int num, int softintp, int err | 
 | } | } | 
 |  |  | 
 | static void | static void | 
| interrupt_task(descriptor_t *gdp, int softintp, int errorp, int error_code) | interrupt_task_gate(descriptor_t *gdp, int softintp, int errorp, int error_code) | 
 | { | { | 
 | selector_t task_sel; | selector_t task_sel; | 
 | int rv; | int rv; | 
| Line 372  interrupt_intr_or_trap(descriptor_t *gdp | Line 385  interrupt_intr_or_trap(descriptor_t *gdp | 
 | WORD old_cs, old_ss, new_ss; | WORD old_cs, old_ss, new_ss; | 
 | int rv; | int rv; | 
 |  |  | 
 | VERBOSE(("interrupt: old EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP)); |  | 
 |  |  | 
 | new_ip = gdp->u.gate.offset; | new_ip = gdp->u.gate.offset; | 
 | old_ss = CPU_SS; | old_ss = CPU_SS; | 
 | old_cs = CPU_CS; | old_cs = CPU_CS; | 
| Line 392  interrupt_intr_or_trap(descriptor_t *gdp | Line 403  interrupt_intr_or_trap(descriptor_t *gdp | 
 | case CPU_SYSDESC_TYPE_TRAP_16: | case CPU_SYSDESC_TYPE_TRAP_16: | 
 | case CPU_SYSDESC_TYPE_TRAP_32: | case CPU_SYSDESC_TYPE_TRAP_32: | 
 | VERBOSE(("interrupt: TRAP-GATE")); | VERBOSE(("interrupt: TRAP-GATE")); | 
 |  |  | 
 |  | default: | 
 | mask = 0; | mask = 0; | 
 | break; | break; | 
 | } | } | 
| Line 448  interrupt_intr_or_trap(descriptor_t *gdp | Line 461  interrupt_intr_or_trap(descriptor_t *gdp | 
 | break; | break; | 
 | } | } | 
 |  |  | 
| get_stack_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp); | get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp); | 
 |  |  | 
 | rv = parse_selector(&ss_sel, new_ss); | rv = parse_selector(&ss_sel, new_ss); | 
 | if (rv < 0) { | if (rv < 0) { | 
| Line 527  interrupt_intr_or_trap(descriptor_t *gdp | Line 540  interrupt_intr_or_trap(descriptor_t *gdp | 
 | if (errorp) { | if (errorp) { | 
 | PUSH0_32(error_code); | PUSH0_32(error_code); | 
 | } | } | 
 | set_eflags(new_flags, mask); |  | 
 | break; | break; | 
 |  |  | 
 | case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: | 
| Line 543  interrupt_intr_or_trap(descriptor_t *gdp | Line 555  interrupt_intr_or_trap(descriptor_t *gdp | 
 | if (errorp) { | if (errorp) { | 
 | PUSH0_16(error_code); | PUSH0_16(error_code); | 
 | } | } | 
 | set_flags(new_flags, mask); |  | 
 | break; | break; | 
 | } | } | 
 |  |  | 
 |  | set_eflags(new_flags, mask); | 
 | } else { | } else { | 
 | if (CPU_STAT_VM86) { | if (CPU_STAT_VM86) { | 
 | VERBOSE(("interrupt: VM86")); | VERBOSE(("interrupt: VM86")); | 
| Line 590  interrupt_intr_or_trap(descriptor_t *gdp | Line 603  interrupt_intr_or_trap(descriptor_t *gdp | 
 | if (errorp) { | if (errorp) { | 
 | PUSH0_32(error_code); | PUSH0_32(error_code); | 
 | } | } | 
 | set_eflags(new_flags, mask); |  | 
 | break; | break; | 
 |  |  | 
 | case CPU_SYSDESC_TYPE_INTR_16: | case CPU_SYSDESC_TYPE_INTR_16: | 
| Line 601  interrupt_intr_or_trap(descriptor_t *gdp | Line 613  interrupt_intr_or_trap(descriptor_t *gdp | 
 | if (errorp) { | if (errorp) { | 
 | PUSH0_16(error_code); | PUSH0_16(error_code); | 
 | } | } | 
 | set_flags(new_flags, mask); |  | 
 | break; | break; | 
 | } | } | 
 |  |  | 
 |  | set_eflags(new_flags, mask); | 
 | } | } | 
 |  |  | 
 | VERBOSE(("interrupt: new EIP = %04x:%08x, new ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); | VERBOSE(("interrupt: new EIP = %04x:%08x, new ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP)); |