| version 1.15, 2004/03/29 05:50:29 | version 1.24, 2011/12/21 18:07:57 | 
| Line 1 | Line 1 | 
 | /*      $Id$    */ |  | 
 |  |  | 
 | /* | /* | 
 | * Copyright (c) 2002-2003 NONAKA Kimihiro | * Copyright (c) 2002-2003 NONAKA Kimihiro | 
 | * All rights reserved. | * All rights reserved. | 
| Line 12 | Line 10 | 
 | * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright | 
 | *    notice, this list of conditions and the following disclaimer in the | *    notice, this list of conditions and the following disclaimer in the | 
 | *    documentation and/or other materials provided with the distribution. | *    documentation and/or other materials provided with the distribution. | 
 | * 3. The name of the author may not be used to endorse or promote products |  | 
 | *    derived from this software without specific prior written permission. |  | 
 | * | * | 
 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 
 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 
| Line 31 | Line 27 | 
 | #include "cpu.h" | #include "cpu.h" | 
 | #include "ia32.mcr" | #include "ia32.mcr" | 
 |  |  | 
 |  |  | 
 | I386CORE        i386core; | I386CORE        i386core; | 
 |  |  | 
 | UINT8   *reg8_b20[0x100]; | UINT8   *reg8_b20[0x100]; | 
| Line 41  UINT16 *reg16_b53[0x100]; | Line 36  UINT16 *reg16_b53[0x100]; | 
 | UINT32  *reg32_b20[0x100]; | UINT32  *reg32_b20[0x100]; | 
 | UINT32  *reg32_b53[0x100]; | UINT32  *reg32_b53[0x100]; | 
 |  |  | 
 |  |  | 
 | void | void | 
 | ia32_init(void) | ia32_init(void) | 
 | { | { | 
| Line 78  ia32_init(void) | Line 72  ia32_init(void) | 
 | } | } | 
 |  |  | 
 | resolve_init(); | resolve_init(); | 
 | #ifdef USE_FPU |  | 
 | fpu_init(); |  | 
 | #endif |  | 
 | } | } | 
 |  |  | 
 | void | void | 
| Line 88  ia32_setextsize(UINT32 size) | Line 79  ia32_setextsize(UINT32 size) | 
 | { | { | 
 |  |  | 
 | if (CPU_EXTMEMSIZE != size) { | if (CPU_EXTMEMSIZE != size) { | 
| if (CPU_EXTMEM) { | UINT8 *extmem; | 
| _MFREE(CPU_EXTMEM); | extmem = CPU_EXTMEM; | 
| CPU_EXTMEM = NULL; | if (extmem != NULL) { | 
|  | _MFREE(extmem); | 
|  | extmem = NULL; | 
 | } | } | 
| if (size) { | if (size != 0) { | 
| CPU_EXTMEM = (BYTE *)_MALLOC(size + 16, "EXTMEM"); | extmem = (UINT8 *)_MALLOC(size + 16, "EXTMEM"); | 
| if (CPU_EXTMEM == NULL) { | } | 
| size = 0; | if (extmem != NULL) { | 
| } | ZeroMemory(extmem, size + 16); | 
| ZeroMemory(CPU_EXTMEM, size + 16); | CPU_EXTMEM = extmem; | 
|  | CPU_EXTMEMSIZE = size; | 
|  | CPU_EXTMEMBASE = CPU_EXTMEM - 0x100000; | 
|  | CPU_EXTLIMIT16 = min(size + 0x100000, 0xf00000); | 
|  | CPU_EXTLIMIT = size + 0x100000; | 
|  | } | 
|  | else { | 
|  | CPU_EXTMEM = NULL; | 
|  | CPU_EXTMEMSIZE = 0; | 
|  | CPU_EXTMEMBASE = NULL; | 
|  | CPU_EXTLIMIT16 = 0; | 
|  | CPU_EXTLIMIT = 0; | 
 | } | } | 
 | CPU_EXTMEMSIZE = size; |  | 
 | } | } | 
 | CPU_EMSPTR[0] = mem + 0xc0000; | CPU_EMSPTR[0] = mem + 0xc0000; | 
 | CPU_EMSPTR[1] = mem + 0xc4000; | CPU_EMSPTR[1] = mem + 0xc4000; | 
| Line 127  ia32_setemm(UINT frame, UINT32 addr) { | Line 130  ia32_setemm(UINT frame, UINT32 addr) { | 
 |  |  | 
 |  |  | 
 | /* | /* | 
| * ¡¦ä£¥·¡¦¥Î¥Á¥©¡¼¥ï | * åã¡Öå㥷åã²ë¢¹î©¥µ | 
 | */ | */ | 
| void FASTCALL | void CPUCALL | 
 | change_pm(BOOL onoff) | change_pm(BOOL onoff) | 
 | { | { | 
 |  | #if 0 | 
 | int i; | int i; | 
 |  | #endif | 
 |  |  | 
 | if (onoff) { | if (onoff) { | 
 |  | #if 0 | 
 | for (i = 0; i < CPU_SEGREG_NUM; i++) { | for (i = 0; i < CPU_SEGREG_NUM; i++) { | 
 | CPU_STAT_SREG(i).valid = 1; | CPU_STAT_SREG(i).valid = 1; | 
 | CPU_STAT_SREG(i).dpl = 0; | CPU_STAT_SREG(i).dpl = 0; | 
 | } | } | 
 |  | #endif | 
 | VERBOSE(("Entering to Protected-Mode...")); | VERBOSE(("Entering to Protected-Mode...")); | 
 | } else { | } else { | 
 | VERBOSE(("Leaveing from Protected-Mode...")); | VERBOSE(("Leaveing from Protected-Mode...")); | 
| Line 148  change_pm(BOOL onoff) | Line 155  change_pm(BOOL onoff) | 
 | CPU_STATSAVE.cpu_inst_default.op_32 = | CPU_STATSAVE.cpu_inst_default.op_32 = | 
 | CPU_STATSAVE.cpu_inst_default.as_32 = 0; | CPU_STATSAVE.cpu_inst_default.as_32 = 0; | 
 | CPU_STAT_SS32 = 0; | CPU_STAT_SS32 = 0; | 
| CPU_SET_CPL(0); | set_cpl(0); | 
 | CPU_STAT_PM = onoff; | CPU_STAT_PM = onoff; | 
 |  |  | 
 | tlb_flush(TRUE); |  | 
 | } | } | 
 |  |  | 
| void FASTCALL | void CPUCALL | 
 | change_pg(BOOL onoff) | change_pg(BOOL onoff) | 
 | { | { | 
 |  |  | 
| Line 163  change_pg(BOOL onoff) | Line 168  change_pg(BOOL onoff) | 
 | } else { | } else { | 
 | VERBOSE(("Leaveing from Paging-Mode...")); | VERBOSE(("Leaveing from Paging-Mode...")); | 
 | } | } | 
 | CPU_STAT_PAGING = onoff; |  | 
 |  |  | 
| tlb_flush(TRUE); | CPU_STAT_PAGING = onoff; | 
 | } | } | 
 |  |  | 
| void FASTCALL | void CPUCALL | 
 | change_vm(BOOL onoff) | change_vm(BOOL onoff) | 
 | { | { | 
 | int i; | int i; | 
 |  |  | 
 | CPU_STAT_VM86 = onoff; | CPU_STAT_VM86 = onoff; | 
 | if (onoff) { | if (onoff) { | 
 |  | VERBOSE(("Entering to Virtual-8086-Mode...")); | 
 | for (i = 0; i < CPU_SEGREG_NUM; i++) { | for (i = 0; i < CPU_SEGREG_NUM; i++) { | 
 | CPU_STAT_SREGLIMIT(i) = 0xffff; | CPU_STAT_SREGLIMIT(i) = 0xffff; | 
| CPU_SET_SEGREG(i, CPU_REGS_SREG(i)); | LOAD_SEGREG(i, CPU_REGS_SREG(i)); | 
 | } | } | 
 | CPU_INST_OP32 = CPU_INST_AS32 = | CPU_INST_OP32 = CPU_INST_AS32 = | 
 | CPU_STATSAVE.cpu_inst_default.op_32 = | CPU_STATSAVE.cpu_inst_default.op_32 = | 
 | CPU_STATSAVE.cpu_inst_default.as_32 = 0; | CPU_STATSAVE.cpu_inst_default.as_32 = 0; | 
 | CPU_STAT_SS32 = 0; | CPU_STAT_SS32 = 0; | 
| CPU_SET_CPL(3); | set_cpl(3); | 
| VERBOSE(("Entering to Virtual-8086-Mode...")); |  | 
 | } else { | } else { | 
 | VERBOSE(("Leaveing from Virtual-8086-Mode...")); | VERBOSE(("Leaveing from Virtual-8086-Mode...")); | 
 | } | } | 
 | } | } | 
 |  |  | 
 | #if !defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) |  | 
 | /* | /* | 
 | * flags | * flags | 
 | */ | */ | 
| static void | static void CPUCALL | 
 | modify_eflags(UINT32 new_flags, UINT32 mask) | modify_eflags(UINT32 new_flags, UINT32 mask) | 
 | { | { | 
 | UINT32 orig = CPU_EFLAG; | UINT32 orig = CPU_EFLAG; | 
| Line 216  modify_eflags(UINT32 new_flags, UINT32 m | Line 219  modify_eflags(UINT32 new_flags, UINT32 m | 
 | } | } | 
 | } | } | 
 |  |  | 
| void | void CPUCALL | 
 | set_flags(UINT16 new_flags, UINT16 mask) | set_flags(UINT16 new_flags, UINT16 mask) | 
 | { | { | 
 |  |  | 
| Line 225  set_flags(UINT16 new_flags, UINT16 mask) | Line 228  set_flags(UINT16 new_flags, UINT16 mask) | 
 | modify_eflags(new_flags, mask); | modify_eflags(new_flags, mask); | 
 | } | } | 
 |  |  | 
| void | void CPUCALL | 
 | set_eflags(UINT32 new_flags, UINT32 mask) | set_eflags(UINT32 new_flags, UINT32 mask) | 
 | { | { | 
 |  |  | 
| Line 234  set_eflags(UINT32 new_flags, UINT32 mask | Line 237  set_eflags(UINT32 new_flags, UINT32 mask | 
 | mask |= AC_FLAG|ID_FLAG; | mask |= AC_FLAG|ID_FLAG; | 
 | modify_eflags(new_flags, mask); | modify_eflags(new_flags, mask); | 
 | } | } | 
| #endif  /* !IA32_DONT_USE_SET_EFLAGS_FUNCTION */ |  | 
|  | /* | 
|  | * CR3 (Page Directory Entry base physical address) | 
|  | */ | 
|  | void CPUCALL | 
|  | set_cr3(UINT32 new_cr3) | 
|  | { | 
|  |  | 
|  | VERBOSE(("set_CR3: old = %08x, new = 0x%08x", CPU_CR3, new_cr3)); | 
|  |  | 
|  | CPU_CR3 = new_cr3 & CPU_CR3_MASK; | 
|  | CPU_STAT_PDE_BASE = CPU_CR3 & CPU_CR3_PD_MASK; | 
|  | tlb_flush(0); | 
|  | } | 
|  |  | 
|  | /* | 
|  | * CPL (Current Privilege Level) | 
|  | */ | 
|  | void CPUCALL | 
|  | set_cpl(int new_cpl) | 
|  | { | 
|  | int cpl = new_cpl & 3; | 
|  |  | 
|  | CPU_STAT_CPL = (UINT8)cpl; | 
|  | CPU_STAT_USER_MODE = (cpl == 3) ? CPU_MODE_USER : CPU_MODE_SUPERVISER; | 
|  | } |