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| version 1.1, 2003/12/08 00:55:31 | version 1.7, 2004/02/05 16:41:32 |
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| Line 32 | Line 32 |
| #include "ia32.mcr" | #include "ia32.mcr" |
| CPU_REGS cpu_regs; | |
| CPU_SYSREGS cpu_sysregs; | |
| CPU_STAT cpu_stat; | |
| CPU_INST cpu_inst; | |
| CPU_INST cpu_inst_default; | |
| I386CORE i386core; | I386CORE i386core; |
| // #if defined(USE_ASM) | |
| BYTE iflags[] = { | |
| 0x44, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, | |
| 0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, | |
| 0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, | |
| }; | |
| // #endif /* USE_ASM */ | |
| BYTE *reg8_b20[0x100]; | BYTE *reg8_b20[0x100]; |
| BYTE *reg8_b53[0x100]; | BYTE *reg8_b53[0x100]; |
| WORD *reg16_b20[0x100]; | WORD *reg16_b20[0x100]; |
| Line 89 ia32_init(void) | Line 47 ia32_init(void) |
| { | { |
| int i; | int i; |
| memset(&cpu_regs, 0, sizeof(cpu_regs)); | memset(&i386core.s, 0, sizeof(i386core.s)); |
| memset(&cpu_sysregs, 0, sizeof(cpu_sysregs)); | ia32_initreg(); |
| memset(&cpu_stat, 0, sizeof(cpu_stat)); | |
| memset(&cpu_inst_default, 0, sizeof(cpu_inst_default)); | |
| CPU_EDX = (CPU_FAMILY << 8) | (CPU_MODEL << 4) | CPU_STEPPING; | |
| CPU_EFLAG = 2; | |
| CPU_CR0 = CPU_CR0_CD | CPU_CR0_NW | CPU_CR0_ET; | |
| CPU_MXCSR = 0x1f80; | |
| CPU_GDTR_LIMIT = 0xffff; | |
| CPU_IDTR_LIMIT = 0xffff; | |
| for (i = 0; i < CPU_SEGREG_NUM; ++i) { | |
| CPU_STAT_SREG_INIT(i); | |
| } | |
| CPU_LDTR_LIMIT = 0xffff; | |
| CPU_TR_LIMIT = 0xffff; | |
| for (i = 0; i < 0x100; ++i) { | for (i = 0; i < 0x100; ++i) { |
| /* 8bit */ | /* 8bit */ |
| Line 135 ia32_init(void) | Line 78 ia32_init(void) |
| } | } |
| resolve_init(); | resolve_init(); |
| #if defined(SUPPORT_TLB) | #if defined(IA32_SUPPORT_TLB) |
| tlb_init(); | tlb_init(); |
| #endif | #endif |
| #ifdef USE_FPU | #ifdef USE_FPU |
| Line 143 ia32_init(void) | Line 86 ia32_init(void) |
| #endif | #endif |
| } | } |
| void | |
| ia32_setextsize(UINT32 size) | |
| { | |
| if (CPU_EXTMEMSIZE != size) { | |
| if (CPU_EXTMEM) { | |
| _MFREE(CPU_EXTMEM); | |
| CPU_EXTMEM = NULL; | |
| } | |
| if (size) { | |
| CPU_EXTMEM = (BYTE *)_MALLOC(size + 16, "EXTMEM"); | |
| if (CPU_EXTMEM == NULL) { | |
| size = 0; | |
| } | |
| ZeroMemory(CPU_EXTMEM, size + 16); | |
| } | |
| CPU_EXTMEMSIZE = size; | |
| } | |
| } | |
| /* | /* |
| * モード遷移 | * モード遷移 |
| */ | */ |
| Line 153 change_pm(BOOL onoff) | Line 116 change_pm(BOOL onoff) |
| if (onoff) { | if (onoff) { |
| for (i = 0; i < CPU_SEGREG_NUM; i++) { | for (i = 0; i < CPU_SEGREG_NUM; i++) { |
| CPU_STAT_SREG(i).valid = TRUE; | CPU_STAT_SREG(i).valid = 1; |
| CPU_STAT_SREG(i).dpl = 0; | CPU_STAT_SREG(i).dpl = 0; |
| } | } |
| VERBOSE(("Entering to Protected-Mode...")); | VERBOSE(("Entering to Protected-Mode...")); |
| } else { | } else { |
| VERBOSE(("Leaveing from Protected-Mode...")); | VERBOSE(("Leaveing from Protected-Mode...")); |
| } | } |
| CPU_STAT_CPL = 0; | |
| CPU_INST_OP32 = CPU_INST_AS32 = | |
| CPU_STATSAVE.cpu_inst_default.op_32 = | |
| CPU_STATSAVE.cpu_inst_default.as_32 = 0; | |
| CPU_STAT_SS32 = 0; | |
| CPU_SET_CPL(0); | |
| CPU_STAT_PM = onoff; | CPU_STAT_PM = onoff; |
| } | } |
| Line 171 change_pg(BOOL onoff) | Line 139 change_pg(BOOL onoff) |
| if (onoff) { | if (onoff) { |
| VERBOSE(("Entering to Paging-Mode...")); | VERBOSE(("Entering to Paging-Mode...")); |
| } else { | } else { |
| VERBOSE(("Leaveing from Pagin-Mode...")); | VERBOSE(("Leaveing from Paging-Mode...")); |
| } | } |
| CPU_STAT_PAGING = onoff; | CPU_STAT_PAGING = onoff; |
| } | } |
| Line 179 change_pg(BOOL onoff) | Line 147 change_pg(BOOL onoff) |
| void FASTCALL | void FASTCALL |
| change_vm(BOOL onoff) | change_vm(BOOL onoff) |
| { | { |
| descriptor_t sd; | |
| int i; | int i; |
| CPU_STAT_VM86 = onoff; | |
| if (onoff) { | if (onoff) { |
| for (i = 0; i < CPU_SEGREG_NUM; i++) { | for (i = 0; i < CPU_SEGREG_NUM; i++) { |
| sd.u.seg.limit = 0xffff; | CPU_SET_SEGREG(i, CPU_REGS_SREG(i)); |
| CPU_SET_SEGDESC_DEFAULT(&sd, i, CPU_REGS_SREG(i)); | |
| sd.dpl = 3; | |
| CPU_STAT_SREG(i) = sd; | |
| } | } |
| CPU_INST_OP32 = CPU_INST_AS32 = | |
| CPU_STATSAVE.cpu_inst_default.op_32 = | |
| CPU_STATSAVE.cpu_inst_default.as_32 = 0; | |
| CPU_STAT_SS32 = 0; | |
| CPU_SET_CPL(3); | |
| VERBOSE(("Entering to Virtual-8086-Mode...")); | VERBOSE(("Entering to Virtual-8086-Mode...")); |
| } else { | } else { |
| VERBOSE(("Leaveing from Virtual-8086-Mode...")); | VERBOSE(("Leaveing from Virtual-8086-Mode...")); |
| } | } |
| CPU_STAT_VM86 = onoff; | |
| } | } |
| /* | /* |