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| version 1.7, 2004/02/05 16:41:32 | version 1.16, 2004/06/15 13:50:13 |
|---|---|
| Line 34 | Line 34 |
| I386CORE i386core; | I386CORE i386core; |
| BYTE *reg8_b20[0x100]; | UINT8 *reg8_b20[0x100]; |
| BYTE *reg8_b53[0x100]; | UINT8 *reg8_b53[0x100]; |
| WORD *reg16_b20[0x100]; | UINT16 *reg16_b20[0x100]; |
| WORD *reg16_b53[0x100]; | UINT16 *reg16_b53[0x100]; |
| DWORD *reg32_b20[0x100]; | UINT32 *reg32_b20[0x100]; |
| DWORD *reg32_b53[0x100]; | UINT32 *reg32_b53[0x100]; |
| void | void |
| Line 78 ia32_init(void) | Line 78 ia32_init(void) |
| } | } |
| resolve_init(); | resolve_init(); |
| #if defined(IA32_SUPPORT_TLB) | |
| tlb_init(); | |
| #endif | |
| #ifdef USE_FPU | #ifdef USE_FPU |
| fpu_init(); | fpu_init(); |
| #endif | #endif |
| Line 104 ia32_setextsize(UINT32 size) | Line 101 ia32_setextsize(UINT32 size) |
| } | } |
| CPU_EXTMEMSIZE = size; | CPU_EXTMEMSIZE = size; |
| } | } |
| CPU_EMSPTR[0] = mem + 0xc0000; | |
| CPU_EMSPTR[1] = mem + 0xc4000; | |
| CPU_EMSPTR[2] = mem + 0xc8000; | |
| CPU_EMSPTR[3] = mem + 0xcc000; | |
| } | |
| void | |
| ia32_setemm(UINT frame, UINT32 addr) { | |
| BYTE *ptr; | |
| frame &= 3; | |
| if (addr < USE_HIMEM) { | |
| ptr = mem + addr; | |
| } | |
| else if ((addr - 0x100000 + 0x4000) <= CPU_EXTMEMSIZE) { | |
| ptr = CPU_EXTMEM + (addr - 0x100000); | |
| } | |
| else { | |
| ptr = mem + 0xc0000 + (frame << 14); | |
| } | |
| CPU_EMSPTR[frame] = ptr; | |
| } | } |
| /* | /* |
| * モード遷移 | * モード遷移 |
| */ | */ |
| Line 152 change_vm(BOOL onoff) | Line 172 change_vm(BOOL onoff) |
| CPU_STAT_VM86 = onoff; | CPU_STAT_VM86 = onoff; |
| if (onoff) { | if (onoff) { |
| for (i = 0; i < CPU_SEGREG_NUM; i++) { | for (i = 0; i < CPU_SEGREG_NUM; i++) { |
| CPU_STAT_SREGLIMIT(i) = 0xffff; | |
| CPU_SET_SEGREG(i, CPU_REGS_SREG(i)); | CPU_SET_SEGREG(i, CPU_REGS_SREG(i)); |
| } | } |
| CPU_INST_OP32 = CPU_INST_AS32 = | CPU_INST_OP32 = CPU_INST_AS32 = |
| Line 165 change_vm(BOOL onoff) | Line 186 change_vm(BOOL onoff) |
| } | } |
| } | } |
| #if !defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) | |
| /* | /* |
| * flags | * flags |
| */ | */ |
| static void | static void |
| modify_eflags(DWORD new_flags, DWORD mask) | modify_eflags(UINT32 new_flags, UINT32 mask) |
| { | { |
| DWORD orig = CPU_EFLAG; | UINT32 orig = CPU_EFLAG; |
| new_flags &= ALL_EFLAG; | new_flags &= ALL_EFLAG; |
| mask &= ALL_EFLAG; | mask &= ALL_EFLAG; |
| CPU_EFLAG = (REAL_EFLAGREG & ~mask) | (new_flags & mask) | 0x2; | CPU_EFLAG = (REAL_EFLAGREG & ~mask) | (new_flags & mask); |
| CPU_OV = CPU_FLAG & O_FLAG; | CPU_OV = CPU_FLAG & O_FLAG; |
| CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG); | CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG); |
| if ((orig ^ CPU_EFLAG) & VM_FLAG) { | if (CPU_STAT_PM) { |
| if (CPU_EFLAG & VM_FLAG) { | if ((orig ^ CPU_EFLAG) & VM_FLAG) { |
| change_vm(1); | if (CPU_EFLAG & VM_FLAG) { |
| } else { | change_vm(1); |
| change_vm(0); | } else { |
| change_vm(0); | |
| } | |
| } | } |
| } | } |
| } | } |
| void | void |
| set_flags(WORD new_flags, WORD mask) | set_flags(UINT16 new_flags, UINT16 mask) |
| { | { |
| mask &= I_FLAG|IOPL_FLAG; | mask &= I_FLAG|IOPL_FLAG; |
| Line 198 set_flags(WORD new_flags, WORD mask) | Line 222 set_flags(WORD new_flags, WORD mask) |
| } | } |
| void | void |
| set_eflags(DWORD new_flags, DWORD mask) | set_eflags(UINT32 new_flags, UINT32 mask) |
| { | { |
| mask &= I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG; | mask &= I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG; |
| Line 206 set_eflags(DWORD new_flags, DWORD mask) | Line 230 set_eflags(DWORD new_flags, DWORD mask) |
| mask |= AC_FLAG|ID_FLAG; | mask |= AC_FLAG|ID_FLAG; |
| modify_eflags(new_flags, mask); | modify_eflags(new_flags, mask); |
| } | } |
| #endif /* !IA32_DONT_USE_SET_EFLAGS_FUNCTION */ |