| version 1.4, 2004/01/23 14:33:26 | version 1.14, 2004/03/05 14:17:35 | 
| Line 33 | Line 33 | 
 | /* | /* | 
 | * misc | * misc | 
 | */ | */ | 
| #define __CBW(src)      ((WORD)((SBYTE)(src))) | #define __CBW(src)      ((UINT16)((SINT8)(src))) | 
| #define __CBD(src)      ((DWORD)((SBYTE)(src))) | #define __CBD(src)      ((UINT32)((SINT8)(src))) | 
| #define __CWDE(src)     ((SWORD)(src)) | #define __CWDE(src)     ((SINT16)(src)) | 
 |  |  | 
| #define SWAPBYTE(p, q) \ | #define SWAP_BYTE(p, q) \ | 
 | do { \ | do { \ | 
| BYTE __tmp = (p); \ | UINT8 __tmp = (p); \ | 
 | (p) = (q); \ | (p) = (q); \ | 
 | (q) = __tmp; \ | (q) = __tmp; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define SWAPWORD(p, q) \ | #define SWAP_WORD(p, q) \ | 
 | do { \ | do { \ | 
| WORD __tmp = (p); \ | UINT16 __tmp = (p); \ | 
 | (p) = (q); \ | (p) = (q); \ | 
 | (q) = __tmp; \ | (q) = __tmp; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define SWAPDWORD(p, q) \ | #define SWAP_DWORD(p, q) \ | 
 | do { \ | do { \ | 
| DWORD __tmp = (p); \ | UINT32 __tmp = (p); \ | 
 | (p) = (q); \ | (p) = (q); \ | 
 | (q) = __tmp; \ | (q) = __tmp; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | /* |  | 
 | * bswap |  | 
 | */ |  | 
 | #if defined(bswap32) && !defined(USE_ASM_BSWAP) |  | 
 | #define BSWAP_DWORD(v)  bswap32(v) |  | 
 | #else   /* !bswap32 || USE_ASM_BSWAP */ |  | 
 | INLINE static DWORD |  | 
 | BSWAP_DWORD(DWORD val) |  | 
 | { |  | 
 | #if defined(__GNUC__) && (defined(i386) || defined(__i386__)) |  | 
 | __asm__ __volatile__ ( |  | 
 | #if defined(USE_ASM_BSWAP) |  | 
 | "bswap %0" |  | 
 | #else   /* !USE_ASM_BSWAP */ |  | 
 | "rorw $8, %w1\n\t" |  | 
 | "rorl $16, %1\n\t" |  | 
 | "rorw $8, %w1\n\t" |  | 
 | #endif  /* USE_ASM_BSWAP */ |  | 
 | : "=r" (val) : "0" (val)); |  | 
 | return val; |  | 
 | #else   /* !(__GNUC__ && (i386 || __i386__)) */ |  | 
 | DWORD v; |  | 
 | v  = (val & 0x000000ff) << 24; |  | 
 | v |= (val & 0x0000ff00) << 8; |  | 
 | v |= (val & 0x00ff0000) >> 8; |  | 
 | v |= (val & 0xff000000) >> 24; |  | 
 | return v; |  | 
 | #endif  /* __GNUC__ && (i386 || __i386__) */ |  | 
 | } |  | 
 | #endif  /* bswap32 && !USE_ASM_BSWAP */ |  | 
 |  |  | 
 |  |  | 
 | /* | /* | 
 | * clock | * clock | 
 | */ | */ | 
 | #ifndef DONT_USE_NEVENT |  | 
 | #define CPU_WORKCLOCK(clock) \ | #define CPU_WORKCLOCK(clock) \ | 
 | do { \ | do { \ | 
 | CPU_REMCLOCK -= (clock); \ | CPU_REMCLOCK -= (clock); \ | 
| Line 111  do { \ | Line 79  do { \ | 
 | CPU_REMCLOCK = 0; \ | CPU_REMCLOCK = 0; \ | 
 | } \ | } \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 | #endif |  | 
 |  |  | 
 |  |  | 
 |  | /* | 
 |  | * instruction pointer | 
 |  | */ | 
 | #define SET_EIP(v) \ | #define SET_EIP(v) \ | 
 | do { \ | do { \ | 
| DWORD __new_ip = (v); \ | UINT32 __new_ip = (v); \ | 
| if (!CPU_STATSAVE.cpu_inst_default.op_32) {\ |  | 
| __new_ip &= 0x0000ffff; \ |  | 
| } \ |  | 
 | if (__new_ip > CPU_STAT_CS_LIMIT) { \ | if (__new_ip > CPU_STAT_CS_LIMIT) { \ | 
 | VERBOSE(("SET_EIP: new_ip = %08x, limit = %08x", __new_ip, CPU_STAT_CS_LIMIT)); \ | VERBOSE(("SET_EIP: new_ip = %08x, limit = %08x", __new_ip, CPU_STAT_CS_LIMIT)); \ | 
 | EXCEPTION(GP_EXCEPTION, 0); \ | EXCEPTION(GP_EXCEPTION, 0); \ | 
 | } \ | } \ | 
 | CPU_EIP = __new_ip; \ | CPU_EIP = __new_ip; \ | 
 |  | CPU_PREFETCH_CLEAR(); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define ADD_EIP(v) \ | #define ADD_EIP(v) \ | 
 | do { \ | do { \ | 
| DWORD __tmp_ip = CPU_EIP + (v); \ | UINT32 __tmp_ip = CPU_EIP + (v); \ | 
| if (!CPU_STATSAVE.cpu_inst_default.op_32) {\ | if (!CPU_STATSAVE.cpu_inst_default.op_32) { \ | 
| __tmp_ip &= 0x0000ffff; \ | __tmp_ip &= 0xffff; \ | 
| } \ |  | 
| if (__tmp_ip > CPU_STAT_CS_LIMIT) { \ |  | 
| VERBOSE(("SET_EIP: new_ip = %08x, limit = %08x", __tmp_ip, CPU_STAT_CS_LIMIT)); \ |  | 
| EXCEPTION(GP_EXCEPTION, 0); \ |  | 
 | } \ | } \ | 
 | CPU_EIP = __tmp_ip; \ | CPU_EIP = __tmp_ip; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
| Line 220  do { \ | Line 184  do { \ | 
 | CPU_WORKCLOCK(regclk); \ | CPU_WORKCLOCK(regclk); \ | 
 | (s) = *(reg8_b20[(b)]); \ | (s) = *(reg8_b20[(b)]); \ | 
 | } else { \ | } else { \ | 
| DWORD __t; \ | UINT32 __t; \ | 
 | CPU_WORKCLOCK(memclk); \ | CPU_WORKCLOCK(memclk); \ | 
 | __t = calc_ea_dst((b)); \ | __t = calc_ea_dst((b)); \ | 
 | (s) = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, __t); \ | (s) = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, __t); \ | 
| Line 235  do { \ | Line 199  do { \ | 
 | CPU_WORKCLOCK(regclk); \ | CPU_WORKCLOCK(regclk); \ | 
 | (s) = *(reg16_b20[(b)]); \ | (s) = *(reg16_b20[(b)]); \ | 
 | } else { \ | } else { \ | 
| DWORD __t; \ | UINT32 __t; \ | 
 | CPU_WORKCLOCK(memclk); \ | CPU_WORKCLOCK(memclk); \ | 
 | __t = calc_ea_dst((b)); \ | __t = calc_ea_dst((b)); \ | 
 | (s) = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, __t); \ | (s) = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, __t); \ | 
| Line 250  do { \ | Line 214  do { \ | 
 | CPU_WORKCLOCK(regclk); \ | CPU_WORKCLOCK(regclk); \ | 
 | (s) = *(reg8_b20[(b)]); \ | (s) = *(reg8_b20[(b)]); \ | 
 | } else { \ | } else { \ | 
| DWORD __t; \ | UINT32 __t; \ | 
 | CPU_WORKCLOCK(memclk); \ | CPU_WORKCLOCK(memclk); \ | 
 | __t = calc_ea_dst((b)); \ | __t = calc_ea_dst((b)); \ | 
 | (s) = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, __t); \ | (s) = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, __t); \ | 
| Line 265  do { \ | Line 229  do { \ | 
 | CPU_WORKCLOCK(regclk); \ | CPU_WORKCLOCK(regclk); \ | 
 | (s) = *(reg32_b20[(b)]); \ | (s) = *(reg32_b20[(b)]); \ | 
 | } else { \ | } else { \ | 
| DWORD __t; \ | UINT32 __t; \ | 
 | CPU_WORKCLOCK(memclk); \ | CPU_WORKCLOCK(memclk); \ | 
 | __t = calc_ea_dst((b)); \ | __t = calc_ea_dst((b)); \ | 
 | (s) = cpu_vmemoryread_d(CPU_INST_SEGREG_INDEX, __t); \ | (s) = cpu_vmemoryread_d(CPU_INST_SEGREG_INDEX, __t); \ | 
| Line 280  do { \ | Line 244  do { \ | 
 | CPU_WORKCLOCK(regclk); \ | CPU_WORKCLOCK(regclk); \ | 
 | (s) = *(reg8_b20[(b)]); \ | (s) = *(reg8_b20[(b)]); \ | 
 | } else { \ | } else { \ | 
| DWORD __t; \ | UINT32 __t; \ | 
 | CPU_WORKCLOCK(memclk); \ | CPU_WORKCLOCK(memclk); \ | 
 | __t = calc_ea_dst((b)); \ | __t = calc_ea_dst((b)); \ | 
 | (s) = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, __t); \ | (s) = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, __t); \ | 
| Line 295  do { \ | Line 259  do { \ | 
 | CPU_WORKCLOCK(regclk); \ | CPU_WORKCLOCK(regclk); \ | 
 | (s) = *(reg16_b20[(b)]); \ | (s) = *(reg16_b20[(b)]); \ | 
 | } else { \ | } else { \ | 
| DWORD __t; \ | UINT32 __t; \ | 
 | CPU_WORKCLOCK(memclk); \ | CPU_WORKCLOCK(memclk); \ | 
 | __t = calc_ea_dst((b)); \ | __t = calc_ea_dst((b)); \ | 
 | (s) = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, __t); \ | (s) = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, __t); \ | 
| Line 307  do { \ | Line 271  do { \ | 
 | /* | /* | 
 | * arith | * arith | 
 | */ | */ | 
| #define _ADDBYTE(r, d, s) \ | #define _ADD_BYTE(r, d, s) \ | 
 | do { \ | do { \ | 
 | (r) = (s) + (d); \ | (r) = (s) + (d); \ | 
 | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80; \ | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ADDWORD(r, d, s) \ | #define _ADD_WORD(r, d, s) \ | 
 | do { \ | do { \ | 
 | (r) = (s) + (d); \ | (r) = (s) + (d); \ | 
 | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x8000; \ | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x8000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | if ((r) & 0xffff0000) { \ | if ((r) & 0xffff0000) { \ | 
 | (r) &= 0x0000ffff; \ | (r) &= 0x0000ffff; \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpflag_w[(WORD)(r)]; \ | CPU_FLAGL |= szpflag_w[(UINT16)(r)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ADDDWORD(r, d, s) \ | #define _ADD_DWORD(r, d, s) \ | 
 | do { \ | do { \ | 
 | (r) = (s) + (d); \ | (r) = (s) + (d); \ | 
 | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80000000; \ | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80000000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | if ((r) < (s)) { \ | if ((r) < (s)) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| Line 341  do { \ | Line 305  do { \ | 
 | if ((r) & 0x80000000) { \ | if ((r) & 0x80000000) { \ | 
 | CPU_FLAGL |= S_FLAG; \ | CPU_FLAGL |= S_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpcflag[(BYTE)(r)] & P_FLAG; \ | CPU_FLAGL |= szpcflag[(UINT8)(r)] & P_FLAG; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ORBYTE(d, s) \ | #define _OR_BYTE(d, s) \ | 
 | do { \ | do { \ | 
 | (d) |= (s); \ | (d) |= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpcflag[(BYTE)(d)]; \ | CPU_FLAGL = szpcflag[(UINT8)(d)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ORWORD(d, s) \ | #define _OR_WORD(d, s) \ | 
 | do { \ | do { \ | 
 | (d) |= (s); \ | (d) |= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpflag_w[(WORD)(d)]; \ | CPU_FLAGL = szpflag_w[(UINT16)(d)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ORDWORD(d, s) \ | #define _OR_DWORD(d, s) \ | 
 | do { \ | do { \ | 
 | (d) |= (s); \ | (d) |= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpcflag[(BYTE)(d)] & P_FLAG; \ | CPU_FLAGL = (UINT8)(szpcflag[(UINT8)(d)] & P_FLAG); \ | 
 | if ((d) == 0) { \ | if ((d) == 0) { \ | 
 | CPU_FLAGL |= Z_FLAG; \ | CPU_FLAGL |= Z_FLAG; \ | 
 | } \ | } \ | 
| Line 372  do { \ | Line 336  do { \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | /* flag no check */ | /* flag no check */ | 
| #define _ADCBYTE(r, d, s) \ | #define _ADC_BYTE(r, d, s) \ | 
 | do { \ | do { \ | 
 | (r) = (CPU_FLAGL & C_FLAG) + (s) + (d); \ | (r) = (CPU_FLAGL & C_FLAG) + (s) + (d); \ | 
 | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80; \ | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ADCWORD(r, d, s) \ | #define _ADC_WORD(r, d, s) \ | 
 | do { \ | do { \ | 
 | (r) = (CPU_FLAGL & C_FLAG) + (s) + (d); \ | (r) = (CPU_FLAGL & C_FLAG) + (s) + (d); \ | 
 | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x8000; \ | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x8000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | if ((r) & 0xffff0000) { \ | if ((r) & 0xffff0000) { \ | 
 | (r) &= 0x0000ffff; \ | (r) &= 0x0000ffff; \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpflag_w[(WORD)(r)]; \ | CPU_FLAGL |= szpflag_w[(UINT16)(r)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ADCDWORD(r, d, s) \ | #define _ADC_DWORD(r, d, s) \ | 
 | do { \ | do { \ | 
| DWORD __c = (CPU_FLAGL & C_FLAG); \ | UINT32 __c = (CPU_FLAGL & C_FLAG); \ | 
 | (r) = (s) + (d) + __c; \ | (r) = (s) + (d) + __c; \ | 
 | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80000000; \ | CPU_OV = ((r) ^ (s)) & ((r) ^ (d)) & 0x80000000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | if ((!__c && (r) < (s)) || (__c && (r) <= (s))) { \ | if ((!__c && (r) < (s)) || (__c && (r) <= (s))) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| Line 407  do { \ | Line 371  do { \ | 
 | if ((r) & 0x80000000) { \ | if ((r) & 0x80000000) { \ | 
 | CPU_FLAGL |= S_FLAG; \ | CPU_FLAGL |= S_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpcflag[(BYTE)(r)] & P_FLAG; \ | CPU_FLAGL |= szpcflag[(UINT8)(r)] & P_FLAG; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | /* flag no check */ | /* flag no check */ | 
| Line 415  do { \ | Line 379  do { \ | 
 | do { \ | do { \ | 
 | (r) = (d) - (s) - (CPU_FLAGL & C_FLAG); \ | (r) = (d) - (s) - (CPU_FLAGL & C_FLAG); \ | 
 | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80; \ | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| Line 423  do { \ | Line 387  do { \ | 
 | do { \ | do { \ | 
 | (r) = (d) - (s) - (CPU_FLAGL & C_FLAG); \ | (r) = (d) - (s) - (CPU_FLAGL & C_FLAG); \ | 
 | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x8000; \ | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x8000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | if ((r) & 0xffff0000) { \ | if ((r) & 0xffff0000) { \ | 
 | (r) &= 0x0000ffff; \ | (r) &= 0x0000ffff; \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpflag_w[(WORD)(r)]; \ | CPU_FLAGL |= szpflag_w[(UINT16)(r)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _DWORD_SBB(r, d, s) \ | #define _DWORD_SBB(r, d, s) \ | 
 | do { \ | do { \ | 
| DWORD __c = (CPU_FLAGL & C_FLAG); \ | UINT32 __c = (CPU_FLAGL & C_FLAG); \ | 
 | (r) = (d) - (s) - __c; \ | (r) = (d) - (s) - __c; \ | 
 | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80000000; \ | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80000000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
| if ((d) < (s) + __c) { \ | if ((!__c && (d) < (s)) || (__c && (d) <= (s))) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
 | if ((r) == 0) { \ | if ((r) == 0) { \ | 
| Line 446  do { \ | Line 410  do { \ | 
 | if ((r) & 0x80000000) { \ | if ((r) & 0x80000000) { \ | 
 | CPU_FLAGL |= S_FLAG; \ | CPU_FLAGL |= S_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpcflag[(BYTE)(r)] & P_FLAG; \ | CPU_FLAGL |= szpcflag[(UINT8)(r)] & P_FLAG; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ANDBYTE(d, s) \ | #define _AND_BYTE(d, s) \ | 
 | do { \ | do { \ | 
 | (d) &= (s); \ | (d) &= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpcflag[(BYTE)(d)]; \ | CPU_FLAGL = szpcflag[(UINT8)(d)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ANDWORD(d, s) \ | #define _AND_WORD(d, s) \ | 
 | do { \ | do { \ | 
 | (d) &= (s); \ | (d) &= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpflag_w[(WORD)(d)]; \ | CPU_FLAGL = szpflag_w[(UINT16)(d)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define _ANDDWORD(d, s) \ | #define _AND_DWORD(d, s) \ | 
 | do { \ | do { \ | 
 | (d) &= (s); \ | (d) &= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpcflag[(BYTE)(d)] & P_FLAG; \ | CPU_FLAGL = (UINT8)(szpcflag[(UINT8)(d)] & P_FLAG); \ | 
 | if ((d) == 0) { \ | if ((d) == 0) { \ | 
 | CPU_FLAGL |= Z_FLAG; \ | CPU_FLAGL |= Z_FLAG; \ | 
 | } \ | } \ | 
| Line 480  do { \ | Line 444  do { \ | 
 | do { \ | do { \ | 
 | (r) = (d) - (s); \ | (r) = (d) - (s); \ | 
 | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80; \ | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | CPU_FLAGL |= szpcflag[(r) & 0x1ff]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| Line 488  do { \ | Line 452  do { \ | 
 | do { \ | do { \ | 
 | (r) = (d) - (s); \ | (r) = (d) - (s); \ | 
 | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x8000; \ | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x8000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | if ((r) & 0xffff0000) { \ | if ((r) & 0xffff0000) { \ | 
 | (r) &= 0x0000ffff; \ | (r) &= 0x0000ffff; \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpflag_w[(WORD)(r)]; \ | CPU_FLAGL |= szpflag_w[(UINT16)(r)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _DWORD_SUB(r, d, s) \ | #define _DWORD_SUB(r, d, s) \ | 
 | do { \ | do { \ | 
 | (r) = (d) - (s); \ | (r) = (d) - (s); \ | 
 | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80000000; \ | CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80000000; \ | 
| CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((r) ^ (d) ^ (s)) & A_FLAG); \ | 
 | if ((d) < (s)) { \ | if ((d) < (s)) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| Line 510  do { \ | Line 474  do { \ | 
 | if ((r) & 0x80000000) { \ | if ((r) & 0x80000000) { \ | 
 | CPU_FLAGL |= S_FLAG; \ | CPU_FLAGL |= S_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpcflag[(BYTE)(r)] & P_FLAG; \ | CPU_FLAGL |= szpcflag[(UINT8)(r)] & P_FLAG; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _BYTE_XOR(d, s) \ | #define _BYTE_XOR(d, s) \ | 
 | do { \ | do { \ | 
 | (d) ^= s; \ | (d) ^= s; \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpcflag[(BYTE)(d)]; \ | CPU_FLAGL = szpcflag[(UINT8)(d)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _WORD_XOR(d, s) \ | #define _WORD_XOR(d, s) \ | 
 | do { \ | do { \ | 
 | (d) ^= (s); \ | (d) ^= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpflag_w[(WORD)(d)]; \ | CPU_FLAGL = szpflag_w[(UINT16)(d)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _DWORD_XOR(d, s) \ | #define _DWORD_XOR(d, s) \ | 
 | do { \ | do { \ | 
 | (d) ^= (s); \ | (d) ^= (s); \ | 
 | CPU_OV = 0; \ | CPU_OV = 0; \ | 
| CPU_FLAGL = szpcflag[(BYTE)(d)] & P_FLAG; \ | CPU_FLAGL = (UINT8)(szpcflag[(UINT8)(d)] & P_FLAG); \ | 
 | if ((d) == 0) { \ | if ((d) == 0) { \ | 
 | CPU_FLAGL |= Z_FLAG; \ | CPU_FLAGL |= Z_FLAG; \ | 
 | } \ | } \ | 
| Line 544  do { \ | Line 508  do { \ | 
 | do { \ | do { \ | 
 | (d) = 0 - (s); \ | (d) = 0 - (s); \ | 
 | CPU_OV = ((d) & (s)) & 0x80; \ | CPU_OV = ((d) & (s)) & 0x80; \ | 
| CPU_FLAGL = (BYTE)(((d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((d) ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpcflag[(d) & 0x1ff]; \ | CPU_FLAGL |= szpcflag[(d) & 0x1ff]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| Line 552  do { \ | Line 516  do { \ | 
 | do { \ | do { \ | 
 | (d) = 0 - (s); \ | (d) = 0 - (s); \ | 
 | CPU_OV = ((d) & (s)) & 0x8000; \ | CPU_OV = ((d) & (s)) & 0x8000; \ | 
| CPU_FLAGL = (BYTE)(((d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((d) ^ (s)) & A_FLAG); \ | 
 | if ((d) & 0xffff0000) { \ | if ((d) & 0xffff0000) { \ | 
 | (d) &= 0x0000ffff; \ | (d) &= 0x0000ffff; \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpflag_w[(WORD)(d)]; \ | CPU_FLAGL |= szpflag_w[(UINT16)(d)]; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _DWORD_NEG(d, s) \ | #define _DWORD_NEG(d, s) \ | 
 | do { \ | do { \ | 
 | (d) = 0 - (s); \ | (d) = 0 - (s); \ | 
 | CPU_OV = ((d) & (s)) & 0x80000000; \ | CPU_OV = ((d) & (s)) & 0x80000000; \ | 
| CPU_FLAGL = (BYTE)(((d) ^ (s)) & A_FLAG); \ | CPU_FLAGL = (UINT8)(((d) ^ (s)) & A_FLAG); \ | 
 | if ((d) == 0) { \ | if ((d) == 0) { \ | 
 | CPU_FLAGL |= Z_FLAG; \ | CPU_FLAGL |= Z_FLAG; \ | 
 | } else { \ | } else { \ | 
| Line 573  do { \ | Line 537  do { \ | 
 | if ((d) & 0x80000000) { \ | if ((d) & 0x80000000) { \ | 
 | CPU_FLAGL |= S_FLAG; \ | CPU_FLAGL |= S_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpcflag[(BYTE)(d)] & P_FLAG; \ | CPU_FLAGL |= szpcflag[(UINT8)(d)] & P_FLAG; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _BYTE_MUL(r, d, s) \ | #define _BYTE_MUL(r, d, s) \ | 
 | do { \ | do { \ | 
 | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | 
| (r) = (BYTE)(d) * (BYTE)(s); \ | (r) = (UINT8)(d) * (UINT8)(s); \ | 
 | CPU_OV = (r) >> 8; \ | CPU_OV = (r) >> 8; \ | 
 | if (CPU_OV) { \ | if (CPU_OV) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
| Line 589  do { \ | Line 553  do { \ | 
 | #define _WORD_MUL(r, d, s) \ | #define _WORD_MUL(r, d, s) \ | 
 | do { \ | do { \ | 
 | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | 
| (r) = (WORD)(d) * (WORD)(s); \ | (r) = (UINT16)(d) * (UINT16)(s); \ | 
 | CPU_OV = (r) >> 16; \ | CPU_OV = (r) >> 16; \ | 
 | if (CPU_OV) { \ | if (CPU_OV) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
| Line 598  do { \ | Line 562  do { \ | 
 |  |  | 
 | #define _DWORD_MUL(r, d, s) \ | #define _DWORD_MUL(r, d, s) \ | 
 | do { \ | do { \ | 
| QWORD __v; \ | UINT64 __v; \ | 
 | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | 
| __v = (QWORD)(d) * (QWORD)(s); \ | __v = (UINT64)(d) * (UINT64)(s); \ | 
| (r) = (DWORD)__v; \ | (r) = (UINT32)__v; \ | 
| CPU_OV = (DWORD)(__v >> 32); \ | CPU_OV = (UINT32)(__v >> 32); \ | 
 | if (CPU_OV) { \ | if (CPU_OV) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| Line 611  do { \ | Line 575  do { \ | 
 | #define _BYTE_IMUL(r, d, s) \ | #define _BYTE_IMUL(r, d, s) \ | 
 | do { \ | do { \ | 
 | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | 
| (r) = (SBYTE)(d) * (SBYTE)(s); \ | (r) = (SINT8)(d) * (SINT8)(s); \ | 
 | CPU_OV = ((r) + 0x80) & 0xffffff00; \ | CPU_OV = ((r) + 0x80) & 0xffffff00; \ | 
 | if (CPU_OV) { \ | if (CPU_OV) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
| Line 621  do { \ | Line 585  do { \ | 
 | #define _WORD_IMUL(r, d, s) \ | #define _WORD_IMUL(r, d, s) \ | 
 | do { \ | do { \ | 
 | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | 
| (r) = (SWORD)(d) * (SWORD)(s); \ | (r) = (SINT16)(d) * (SINT16)(s); \ | 
| /*     -32768 < r          < 32767      (CF = OV = 0) */ \ |  | 
| /* 0xffff8000 < r          < 0x00007fff (CF = OV = 0) */ \ |  | 
| /* 0x00000000 < r + 0x8000 < 0x0000ffff (CF = OV = 0) */ \ |  | 
 | CPU_OV = ((r) + 0x8000) & 0xffff0000; \ | CPU_OV = ((r) + 0x8000) & 0xffff0000; \ | 
 | if (CPU_OV) { \ | if (CPU_OV) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
| Line 634  do { \ | Line 595  do { \ | 
 | #define _DWORD_IMUL(r, d, s) \ | #define _DWORD_IMUL(r, d, s) \ | 
 | do { \ | do { \ | 
 | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ | 
| (r) = (SQWORD)(d) * (SQWORD)(s); \ | (r) = (SINT64)(d) * (SINT64)(s); \ | 
| CPU_OV = (DWORD)(((r) + 0x80000000ULL) >> 32); \ | CPU_OV = (UINT32)(((r) + QWORD_CONST(0x80000000)) >> 32); \ | 
 | if (CPU_OV) { \ | if (CPU_OV) { \ | 
 | CPU_FLAGL |= C_FLAG; \ | CPU_FLAGL |= C_FLAG; \ | 
 | } \ | } \ | 
| Line 644  do { \ | Line 605  do { \ | 
 | /* flag no check */ | /* flag no check */ | 
 | #define _BYTE_INC(s) \ | #define _BYTE_INC(s) \ | 
 | do { \ | do { \ | 
| BYTE __b = (s); \ | UINT8 __b = (s); \ | 
 | __b++; \ | __b++; \ | 
 | CPU_OV = __b & (__b ^ (s)) & 0x80; \ | CPU_OV = __b & (__b ^ (s)) & 0x80; \ | 
 | CPU_FLAGL &= C_FLAG; \ | CPU_FLAGL &= C_FLAG; \ | 
| CPU_FLAGL |= (BYTE)((__b ^ (s)) & A_FLAG); \ | CPU_FLAGL |= (UINT8)((__b ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpcflag[__b]; \ | CPU_FLAGL |= szpcflag[__b]; \ | 
 | (s) = __b; \ | (s) = __b; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _WORD_INC(s) \ | #define _WORD_INC(s) \ | 
 | do { \ | do { \ | 
| WORD __b = (s); \ | UINT16 __b = (s); \ | 
 | __b++; \ | __b++; \ | 
 | CPU_OV = __b & (__b ^ (s)) & 0x8000; \ | CPU_OV = __b & (__b ^ (s)) & 0x8000; \ | 
 | CPU_FLAGL &= C_FLAG; \ | CPU_FLAGL &= C_FLAG; \ | 
| CPU_FLAGL |= (BYTE)((__b ^ (s)) & A_FLAG); \ | CPU_FLAGL |= (UINT8)((__b ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpflag_w[__b]; \ | CPU_FLAGL |= szpflag_w[__b]; \ | 
 | (s) = __b; \ | (s) = __b; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _DWORD_INC(s) \ | #define _DWORD_INC(s) \ | 
 | do { \ | do { \ | 
| DWORD __b = (s); \ | UINT32 __b = (s); \ | 
 | __b++; \ | __b++; \ | 
 | CPU_OV = __b & (__b ^ (s)) & 0x80000000; \ | CPU_OV = __b & (__b ^ (s)) & 0x80000000; \ | 
 | CPU_FLAGL &= C_FLAG; \ | CPU_FLAGL &= C_FLAG; \ | 
| CPU_FLAGL |= (BYTE)((__b ^ (s)) & A_FLAG); \ | CPU_FLAGL |= (UINT8)((__b ^ (s)) & A_FLAG); \ | 
 | if (__b == 0) { \ | if (__b == 0) { \ | 
 | CPU_FLAGL |= Z_FLAG; \ | CPU_FLAGL |= Z_FLAG; \ | 
 | } \ | } \ | 
 | if (__b & 0x80000000) { \ | if (__b & 0x80000000) { \ | 
 | CPU_FLAGL |= S_FLAG; \ | CPU_FLAGL |= S_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpcflag[(BYTE)(__b)] & P_FLAG; \ | CPU_FLAGL |= szpcflag[(UINT8)(__b)] & P_FLAG; \ | 
 | (s) = __b; \ | (s) = __b; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | /* flag no check */ | /* flag no check */ | 
 | #define _BYTE_DEC(s) \ | #define _BYTE_DEC(s) \ | 
 | do { \ | do { \ | 
| BYTE __b = (s); \ | UINT8 __b = (s); \ | 
 | __b--; \ | __b--; \ | 
 | CPU_OV = (s) & (__b ^ (s)) & 0x80; \ | CPU_OV = (s) & (__b ^ (s)) & 0x80; \ | 
 | CPU_FLAGL &= C_FLAG; \ | CPU_FLAGL &= C_FLAG; \ | 
| CPU_FLAGL |= (BYTE)((__b ^ (s)) & A_FLAG); \ | CPU_FLAGL |= (UINT8)((__b ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpcflag[__b]; \ | CPU_FLAGL |= szpcflag[__b]; \ | 
 | (s) = __b; \ | (s) = __b; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _WORD_DEC(s) \ | #define _WORD_DEC(s) \ | 
 | do { \ | do { \ | 
| WORD __b = (s); \ | UINT16 __b = (s); \ | 
 | __b--; \ | __b--; \ | 
 | CPU_OV = (s) & (__b ^ (s)) & 0x8000; \ | CPU_OV = (s) & (__b ^ (s)) & 0x8000; \ | 
 | CPU_FLAGL &= C_FLAG; \ | CPU_FLAGL &= C_FLAG; \ | 
| CPU_FLAGL |= (BYTE)((__b ^ (s)) & A_FLAG); \ | CPU_FLAGL |= (UINT8)((__b ^ (s)) & A_FLAG); \ | 
 | CPU_FLAGL |= szpflag_w[__b]; \ | CPU_FLAGL |= szpflag_w[__b]; \ | 
 | (s) = __b; \ | (s) = __b; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define _DWORD_DEC(s) \ | #define _DWORD_DEC(s) \ | 
 | do { \ | do { \ | 
| DWORD __b = (s); \ | UINT32 __b = (s); \ | 
 | __b--; \ | __b--; \ | 
 | CPU_OV = (s) & (__b ^ (s)) & 0x80000000; \ | CPU_OV = (s) & (__b ^ (s)) & 0x80000000; \ | 
 | CPU_FLAGL &= C_FLAG; \ | CPU_FLAGL &= C_FLAG; \ | 
| CPU_FLAGL |= (BYTE)((__b ^ (s)) & A_FLAG); \ | CPU_FLAGL |= (UINT8)((__b ^ (s)) & A_FLAG); \ | 
 | if ((__b) == 0) { \ | if ((__b) == 0) { \ | 
 | CPU_FLAGL |= Z_FLAG; \ | CPU_FLAGL |= Z_FLAG; \ | 
 | } \ | } \ | 
 | if ((__b) & 0x80000000) { \ | if ((__b) & 0x80000000) { \ | 
 | CPU_FLAGL |= S_FLAG; \ | CPU_FLAGL |= S_FLAG; \ | 
 | } \ | } \ | 
| CPU_FLAGL |= szpcflag[(BYTE)(__b)] & P_FLAG; \ | CPU_FLAGL |= szpcflag[(UINT8)(__b)] & P_FLAG; \ | 
 | (s) = __b; \ | (s) = __b; \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| Line 742  do { \ | Line 703  do { \ | 
 | #define REGPUSH0(reg) \ | #define REGPUSH0(reg) \ | 
 | do { \ | do { \ | 
 | CPU_SP -= 2; \ | CPU_SP -= 2; \ | 
| cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, reg); \ | cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, (UINT16)reg); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | /* Operand Size == 16 && Stack Size == 32 */ | /* Operand Size == 16 && Stack Size == 32 */ | 
 | #define REGPUSH0_16_32(reg) \ | #define REGPUSH0_16_32(reg) \ | 
 | do { \ | do { \ | 
 | CPU_ESP -= 2; \ | CPU_ESP -= 2; \ | 
| cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, reg); \ | cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, (UINT16)reg); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | /* Operand Size == 32 && Stack Size == 16 */ | /* Operand Size == 32 && Stack Size == 16 */ | 
| Line 765  do { \ | Line 726  do { \ | 
 | cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, reg); \ | cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, reg); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define SP_PUSH(reg, clock) \ |  | 
 | do { \ |  | 
 | WORD sp = CPU_SP; \ |  | 
 | CPU_SP -= 2; \ |  | 
 | cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, sp); \ |  | 
 | CPU_WORKCLOCK(clock); \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define SP_PUSH0(reg) \ |  | 
 | do { \ |  | 
 | WORD sp = CPU_SP; \ |  | 
 | CPU_SP -= 2; \ |  | 
 | cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, sp); \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define SP_PUSH0_16_32(reg) \ |  | 
 | do { \ |  | 
 | WORD sp = CPU_SP; \ |  | 
 | CPU_ESP -= 2; \ |  | 
 | cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, sp); \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define ESP_PUSH(reg, clock) \ |  | 
 | do { \ |  | 
 | DWORD esp = CPU_ESP; \ |  | 
 | CPU_ESP -= 4; \ |  | 
 | cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, esp); \ |  | 
 | CPU_WORKCLOCK(clock); \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define ESP_PUSH0_32_16(reg) \ |  | 
 | do { \ |  | 
 | DWORD esp = CPU_ESP; \ |  | 
 | CPU_SP -= 4; \ |  | 
 | cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_SP, esp); \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define ESP_PUSH0_32(reg) \ |  | 
 | do { \ |  | 
 | DWORD esp = CPU_ESP; \ |  | 
 | CPU_ESP -= 4; \ |  | 
 | cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, esp); \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define PUSH0_16(reg) \ | #define PUSH0_16(reg) \ | 
 | do { \ | do { \ | 
 | if (!CPU_STAT_SS32) { \ | if (!CPU_STAT_SS32) { \ | 
| Line 836  do { \ | Line 753  do { \ | 
 | } \ | } \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define SP_PUSH0_16(reg) \ |  | 
 | do { \ |  | 
 | WORD sp = CPU_SP; \ |  | 
 | if (!CPU_STAT_SS32) { \ |  | 
 | CPU_SP -= 2; \ |  | 
 | cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, sp); \ |  | 
 | } else { \ |  | 
 | CPU_ESP -= 2; \ |  | 
 | cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, sp); \ |  | 
 | } \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define SP_PUSH0_32(reg) \ |  | 
 | do { \ |  | 
 | DWORD esp = CPU_ESP; \ |  | 
 | if (CPU_STAT_SS32) { \ |  | 
 | CPU_ESP -= 4; \ |  | 
 | cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, esp); \ |  | 
 | } else { \ |  | 
 | CPU_SP -= 4; \ |  | 
 | cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_SP, esp); \ |  | 
 | } \ |  | 
 | } while (/*CONSTCOND*/ 0) |  | 
 |  |  | 
 | #define REGPOP(reg, clock) \ | #define REGPOP(reg, clock) \ | 
 | do { \ | do { \ | 
 | (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_SP); \ | (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_SP); \ | 
| Line 916  do { \ | Line 809  do { \ | 
 | } \ | } \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define SP_POP0_16(reg) \ | /* | 
|  | * stack pointer | 
|  | */ | 
|  | #define SP_PUSH_16(reg) \ | 
 | do { \ | do { \ | 
 |  | UINT16 sp = CPU_SP; \ | 
 | if (!CPU_STAT_SS32) { \ | if (!CPU_STAT_SS32) { \ | 
| (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_SP); \ | REGPUSH0(sp); \ | 
 | } else { \ | } else { \ | 
| (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_ESP); \ | REGPUSH0_16_32(sp); \ | 
 | } \ | } \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
| #define ESP_POP0_32(reg) \ | #define ESP_PUSH_32(reg) \ | 
 | do { \ | do { \ | 
| if (CPU_STAT_SS32) { \ | UINT32 sp = CPU_ESP; \ | 
| (reg) = cpu_vmemoryread_d(CPU_SS_INDEX, CPU_ESP); \ | if (!CPU_STAT_SS32) { \ | 
|  | REGPUSH0_32_16(sp); \ | 
|  | } else { \ | 
|  | REGPUSH0_32(sp); \ | 
|  | } \ | 
|  | } while (/*CONSTCOND*/ 0) | 
|  |  | 
|  | #define SP_POP_16(reg) \ | 
|  | do { \ | 
|  | UINT32 sp; \ | 
|  | if (!CPU_STAT_SS32) { \ | 
|  | sp = CPU_SP; \ | 
|  | } else { \ | 
|  | sp = CPU_ESP; \ | 
|  | } \ | 
|  | CPU_SP = cpu_vmemoryread_w(CPU_SS_INDEX, sp); \ | 
|  | } while (/*CONSTCOND*/ 0) | 
|  |  | 
|  | #define ESP_POP_32(reg) \ | 
|  | do { \ | 
|  | UINT32 sp; \ | 
|  | if (!CPU_STAT_SS32) { \ | 
|  | sp = CPU_SP; \ | 
 | } else { \ | } else { \ | 
| (reg) = cpu_vmemoryread_d(CPU_SS_INDEX, CPU_SP); \ | sp = CPU_ESP; \ | 
 | } \ | } \ | 
 |  | CPU_ESP = cpu_vmemoryread_d(CPU_SS_INDEX, sp); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 |  |  | 
 | /* | /* | 
 | * jump | * jump | 
 | */ | */ | 
 | #define JMPSHORT(clock) \ | #define JMPSHORT(clock) \ | 
 | do { \ | do { \ | 
| DWORD __ip; \ | UINT32 __ip; \ | 
 | CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ | 
 | __ip = __CBD(cpu_codefetch(CPU_EIP)); \ | __ip = __CBD(cpu_codefetch(CPU_EIP)); \ | 
 | __ip++; \ | __ip++; \ | 
 | ADD_EIP(__ip); \ | ADD_EIP(__ip); \ | 
 |  | CPU_PREFETCH_CLEAR(); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define JMPNEAR(clock) \ | #define JMPNEAR(clock) \ | 
 | do { \ | do { \ | 
| DWORD __ip; \ | UINT32 __ip; \ | 
 | CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ | 
 | __ip = __CWDE(cpu_codefetch_w(CPU_EIP)); \ | __ip = __CWDE(cpu_codefetch_w(CPU_EIP)); \ | 
 | __ip += 2; \ | __ip += 2; \ | 
 | ADD_EIP(__ip); \ | ADD_EIP(__ip); \ | 
 |  | CPU_PREFETCH_CLEAR(); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 | #define JMPNEAR_4(clock) \ | #define JMPNEAR_4(clock) \ | 
 | do { \ | do { \ | 
| DWORD __ip; \ | UINT32 __ip; \ | 
 | CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ | 
 | __ip = cpu_codefetch_d(CPU_EIP); \ | __ip = cpu_codefetch_d(CPU_EIP); \ | 
 | __ip += 4; \ | __ip += 4; \ | 
 | ADD_EIP(__ip); \ | ADD_EIP(__ip); \ | 
 |  | CPU_PREFETCH_CLEAR(); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  |  | 
 |  | #if !defined(IA32_SUPPORT_PREFETCH_QUEUE) | 
 | #define JMPNOP(clock, d) \ | #define JMPNOP(clock, d) \ | 
 | do { \ | do { \ | 
 | CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ | 
 | ADD_EIP((d)); \ | ADD_EIP((d)); \ | 
 | } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) | 
 |  | #else | 
 |  | #define JMPNOP(clock, d) \ | 
 |  | do { \ | 
 |  | CPU_WORKCLOCK(clock); \ | 
 |  | if (CPU_PREFETCHQ_REMAIN > (d)) { \ | 
 |  | CPU_PREFETCHQ_REMAIN -= (d); \ | 
 |  | } else { \ | 
 |  | CPU_PREFETCHQ_REMAIN = 0; \ | 
 |  | } \ | 
 |  | ADD_EIP((d)); \ | 
 |  | } while (/*CONSTCOND*/ 0) | 
 |  | #endif | 
 |  |  | 
 |  |  | 
| /* instruction check */ | /* | 
|  | * instruction check | 
|  | */ | 
 | #include "ia32xc.mcr" | #include "ia32xc.mcr" | 
 |  |  | 
 | #endif  /* IA32_CPU_IA32_MCR__ */ | #endif  /* IA32_CPU_IA32_MCR__ */ |