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Diff for /np2/i386c/ia32/ia32.mcr between versions 1.16 and 1.23

version 1.16, 2004/03/08 12:56:22 version 1.23, 2008/01/25 18:02:18
Line 12 Line 12
  * 2. Redistributions in binary form must reproduce the above copyright   * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the   *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.   *    documentation and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products  
  *    derived from this software without specific prior written permission.  
  *   *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR   * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES   * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
Line 37 Line 35
 #define __CBD(src)      ((UINT32)((SINT8)(src)))  #define __CBD(src)      ((UINT32)((SINT8)(src)))
 #define __CWDE(src)     ((SINT16)(src))  #define __CWDE(src)     ((SINT16)(src))
   
   #ifndef PTR_TO_UINT32
   #define PTR_TO_UINT32(p)        ((UINT32)((unsigned long)(p)))
   #endif
   #ifndef UINT32_TO_PTR
   #define UINT32_TO_PTR(v)        ((void *)((unsigned long)(UINT32)(v)))
   #endif
   
 #define SWAP_BYTE(p, q) \  #define SWAP_BYTE(p, q) \
 do { \  do { \
         UINT8 __tmp = (p); \          UINT8 __tmp = (p); \
Line 92  do { \ Line 97  do { \
                 EXCEPTION(GP_EXCEPTION, 0); \                  EXCEPTION(GP_EXCEPTION, 0); \
         } \          } \
         CPU_EIP = __new_ip; \          CPU_EIP = __new_ip; \
         CPU_PREFETCH_CLEAR(); \  
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define ADD_EIP(v) \  #define ADD_EIP(v) \
Line 682  do { \ Line 686  do { \
         (s) = __b; \          (s) = __b; \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
   #define BYTE_NOT(s) \
   do { \
           (s) ^= 0xff; \
   } while (/*CONSTCOND*/ 0)
   
   #define WORD_NOT(s) \
   do { \
           (s) ^= 0xffff; \
   } while (/*CONSTCOND*/ 0)
   
   #define DWORD_NOT(s) \
   do { \
           (s) ^= 0xffffffff; \
   } while (/*CONSTCOND*/ 0)
   
   
 /*  /*
  * stack   * stack
Line 871  do { \ Line 890  do { \
         __ip = __CBD(cpu_codefetch(CPU_EIP)); \          __ip = __CBD(cpu_codefetch(CPU_EIP)); \
         __ip++; \          __ip++; \
         ADD_EIP(__ip); \          ADD_EIP(__ip); \
         CPU_PREFETCH_CLEAR(); \  
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define JMPNEAR(clock) \  #define JMPNEAR(clock) \
Line 881  do { \ Line 899  do { \
         __ip = __CWDE(cpu_codefetch_w(CPU_EIP)); \          __ip = __CWDE(cpu_codefetch_w(CPU_EIP)); \
         __ip += 2; \          __ip += 2; \
         ADD_EIP(__ip); \          ADD_EIP(__ip); \
         CPU_PREFETCH_CLEAR(); \  
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define JMPNEAR_4(clock) \  #define JMPNEAR_4(clock) \
Line 891  do { \ Line 908  do { \
         __ip = cpu_codefetch_d(CPU_EIP); \          __ip = cpu_codefetch_d(CPU_EIP); \
         __ip += 4; \          __ip += 4; \
         ADD_EIP(__ip); \          ADD_EIP(__ip); \
         CPU_PREFETCH_CLEAR(); \  
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #if !defined(IA32_SUPPORT_PREFETCH_QUEUE)  #if !defined(IA32_SUPPORT_PREFETCH_QUEUE)
Line 904  do { \ Line 920  do { \
 #define JMPNOP(clock, d) \  #define JMPNOP(clock, d) \
 do { \  do { \
         CPU_WORKCLOCK(clock); \          CPU_WORKCLOCK(clock); \
         CPU_PREFETCHQ_REMAIN -= (d); \  
         ADD_EIP((d)); \          ADD_EIP((d)); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
 #endif  #endif
   
   
 /*  /*
    * conditions
    */
   #define CC_O    (CPU_OV)
   #define CC_NO   (!CPU_OV)
   #define CC_C    (CPU_FLAGL & C_FLAG)
   #define CC_NC   (!(CPU_FLAGL & C_FLAG))
   #define CC_Z    (CPU_FLAGL & Z_FLAG)
   #define CC_NZ   (!(CPU_FLAGL & Z_FLAG))
   #define CC_NA   (CPU_FLAGL & (Z_FLAG | C_FLAG))
   #define CC_A    (!(CPU_FLAGL & (Z_FLAG | C_FLAG)))
   #define CC_S    (CPU_FLAGL & S_FLAG)
   #define CC_NS   (!(CPU_FLAGL & S_FLAG))
   #define CC_P    (CPU_FLAGL & P_FLAG)
   #define CC_NP   (!(CPU_FLAGL & P_FLAG))
   #define CC_L    (((CPU_FLAGL & S_FLAG) == 0) != (CPU_OV == 0))
   #define CC_NL   (((CPU_FLAGL & S_FLAG) == 0) == (CPU_OV == 0))
   #define CC_LE   ((CPU_FLAGL & Z_FLAG) || \
                                   (((CPU_FLAGL & S_FLAG) == 0) != (CPU_OV == 0)))
   #define CC_NLE  ((!(CPU_FLAGL & Z_FLAG)) && \
                                   (((CPU_FLAGL & S_FLAG) == 0) == (CPU_OV == 0)))
   
   
   /*
  * instruction check   * instruction check
  */   */
 #include "ia32xc.mcr"  #include "ia32xc.mcr"
Removed from v.1.16  
changed lines
  Added in v.1.23

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