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Diff for /np2/i386c/ia32/ia32.mcr between versions 1.13 and 1.24

version 1.13, 2004/02/20 16:09:04 version 1.24, 2008/01/25 18:07:30
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  * 2. Redistributions in binary form must reproduce the above copyright   * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the   *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.   *    documentation and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products  
  *    derived from this software without specific prior written permission.  
  *   *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR   * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES   * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
Line 37 Line 35
 #define __CBD(src)      ((UINT32)((SINT8)(src)))  #define __CBD(src)      ((UINT32)((SINT8)(src)))
 #define __CWDE(src)     ((SINT16)(src))  #define __CWDE(src)     ((SINT16)(src))
   
   #ifndef PTR_TO_UINT32
   #define PTR_TO_UINT32(p)        ((UINT32)((unsigned long)(p)))
   #endif
   #ifndef UINT32_TO_PTR
   #define UINT32_TO_PTR(v)        ((void *)((unsigned long)(UINT32)(v)))
   #endif
   
 #define SWAP_BYTE(p, q) \  #define SWAP_BYTE(p, q) \
 do { \  do { \
         UINT8 __tmp = (p); \          UINT8 __tmp = (p); \
Line 100  do { \ Line 105  do { \
         if (!CPU_STATSAVE.cpu_inst_default.op_32) { \          if (!CPU_STATSAVE.cpu_inst_default.op_32) { \
                 __tmp_ip &= 0xffff; \                  __tmp_ip &= 0xffff; \
         } \          } \
         CPU_EIP = __tmp_ip; \          SET_EIP(__tmp_ip); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
   #define _ADD_EIP(v) \
   do { \
           UINT32 __tmp_ip = CPU_EIP + (v); \
           if (!CPU_STATSAVE.cpu_inst_default.op_32) { \
                   __tmp_ip &= 0xffff; \
           } \
           CPU_EIP = __tmp_ip; \
   } while (/*CONSTCOND*/ 0)
   
 #define GET_PCBYTE(v) \  #define GET_PCBYTE(v) \
 do { \  do { \
         (v) = cpu_codefetch(CPU_EIP); \          (v) = cpu_codefetch(CPU_EIP); \
         ADD_EIP(1); \          _ADD_EIP(1); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define GET_PCBYTES(v) \  #define GET_PCBYTES(v) \
 do { \  do { \
         (v) = __CBW(cpu_codefetch(CPU_EIP)); \          (v) = __CBW(cpu_codefetch(CPU_EIP)); \
         ADD_EIP(1); \          _ADD_EIP(1); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define GET_PCBYTESD(v) \  #define GET_PCBYTESD(v) \
 do { \  do { \
         (v) = __CBD(cpu_codefetch(CPU_EIP)); \          (v) = __CBD(cpu_codefetch(CPU_EIP)); \
         ADD_EIP(1); \          _ADD_EIP(1); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define GET_PCWORD(v) \  #define GET_PCWORD(v) \
 do { \  do { \
         (v) = cpu_codefetch_w(CPU_EIP); \          (v) = cpu_codefetch_w(CPU_EIP); \
         ADD_EIP(2); \          _ADD_EIP(2); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define GET_PCWORDS(v) \  #define GET_PCWORDS(v) \
 do { \  do { \
         (v) = __CWDE(cpu_codefetch_w(CPU_EIP)); \          (v) = __CWDE(cpu_codefetch_w(CPU_EIP)); \
         ADD_EIP(2); \          _ADD_EIP(2); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define GET_PCDWORD(v) \  #define GET_PCDWORD(v) \
 do { \  do { \
         (v) = cpu_codefetch_d(CPU_EIP); \          (v) = cpu_codefetch_d(CPU_EIP); \
         ADD_EIP(4); \          _ADD_EIP(4); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define PREPART_EA_REG8(b, d_s) \  #define PREPART_EA_REG8(b, d_s) \
Line 681  do { \ Line 694  do { \
         (s) = __b; \          (s) = __b; \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
   #define BYTE_NOT(s) \
   do { \
           (s) ^= 0xff; \
   } while (/*CONSTCOND*/ 0)
   
   #define WORD_NOT(s) \
   do { \
           (s) ^= 0xffff; \
   } while (/*CONSTCOND*/ 0)
   
   #define DWORD_NOT(s) \
   do { \
           (s) ^= 0xffffffff; \
   } while (/*CONSTCOND*/ 0)
   
   
 /*  /*
  * stack   * stack
  */   */
 #define REGPUSH(reg, clock) \  #define REGPUSH(reg, clock) \
 do { \  do { \
         CPU_SP -= 2; \          UINT16 new_sp = CPU_SP - 2; \
         cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, reg); \          cpu_vmemorywrite_w(CPU_SS_INDEX, new_sp, reg); \
           CPU_SP = new_sp; \
         CPU_WORKCLOCK(clock); \          CPU_WORKCLOCK(clock); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define REGPUSH_32(reg, clock) \  #define REGPUSH_32(reg, clock) \
 do { \  do { \
         CPU_ESP -= 4; \          UINT32 new_esp = CPU_ESP - 4; \
         cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, reg); \          cpu_vmemorywrite_d(CPU_SS_INDEX, new_esp, reg); \
           CPU_ESP = new_esp; \
         CPU_WORKCLOCK(clock); \          CPU_WORKCLOCK(clock); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define REGPUSH0(reg) \  #define REGPUSH0(reg) \
 do { \  do { \
         CPU_SP -= 2; \          UINT16 new_sp = CPU_SP - 2; \
         cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, (UINT16)reg); \          cpu_vmemorywrite_w(CPU_SS_INDEX, new_sp, (UINT16)reg); \
           CPU_SP = new_sp; \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 /* Operand Size == 16 && Stack Size == 32 */  /* Operand Size == 16 && Stack Size == 32 */
 #define REGPUSH0_16_32(reg) \  #define REGPUSH0_16_32(reg) \
 do { \  do { \
         CPU_ESP -= 2; \          UINT32 new_esp = CPU_ESP - 2; \
         cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, (UINT16)reg); \          cpu_vmemorywrite_w(CPU_SS_INDEX, new_esp, (UINT16)reg); \
           CPU_ESP = new_esp; \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 /* Operand Size == 32 && Stack Size == 16 */  /* Operand Size == 32 && Stack Size == 16 */
 #define REGPUSH0_32_16(reg) \  #define REGPUSH0_32_16(reg) \
 do { \  do { \
         CPU_SP -= 4; \          UINT16 new_sp = CPU_SP - 4; \
         cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_SP, reg); \          cpu_vmemorywrite_d(CPU_SS_INDEX, new_sp, reg); \
           CPU_SP = new_sp; \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define REGPUSH0_32(reg) \  #define REGPUSH0_32(reg) \
 do { \  do { \
         CPU_ESP -= 4; \          UINT32 new_esp = CPU_ESP - 4; \
         cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, reg); \          cpu_vmemorywrite_d(CPU_SS_INDEX, new_esp, reg); \
           CPU_ESP = new_esp; \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
 #define PUSH0_16(reg) \  #define PUSH0_16(reg) \
Line 861  do { \ Line 895  do { \
 do { \  do { \
         UINT32 __ip; \          UINT32 __ip; \
         CPU_WORKCLOCK(clock); \          CPU_WORKCLOCK(clock); \
         __ip = __CBD(cpu_codefetch(CPU_EIP)); \          GET_PCBYTESD(__ip); \
         __ip++; \  
         ADD_EIP(__ip); \          ADD_EIP(__ip); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
Line 870  do { \ Line 903  do { \
 do { \  do { \
         UINT32 __ip; \          UINT32 __ip; \
         CPU_WORKCLOCK(clock); \          CPU_WORKCLOCK(clock); \
         __ip = __CWDE(cpu_codefetch_w(CPU_EIP)); \          GET_PCWORDS(__ip); \
         __ip += 2; \  
         ADD_EIP(__ip); \          ADD_EIP(__ip); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
Line 879  do { \ Line 911  do { \
 do { \  do { \
         UINT32 __ip; \          UINT32 __ip; \
         CPU_WORKCLOCK(clock); \          CPU_WORKCLOCK(clock); \
         __ip = cpu_codefetch_d(CPU_EIP); \          GET_PCDWORD(__ip); \
         __ip += 4; \  
         ADD_EIP(__ip); \          ADD_EIP(__ip); \
 } while (/*CONSTCOND*/ 0)  } while (/*CONSTCOND*/ 0)
   
Line 892  do { \ Line 923  do { \
   
   
 /*  /*
    * conditions
    */
   #define CC_O    (CPU_OV)
   #define CC_NO   (!CPU_OV)
   #define CC_C    (CPU_FLAGL & C_FLAG)
   #define CC_NC   (!(CPU_FLAGL & C_FLAG))
   #define CC_Z    (CPU_FLAGL & Z_FLAG)
   #define CC_NZ   (!(CPU_FLAGL & Z_FLAG))
   #define CC_NA   (CPU_FLAGL & (Z_FLAG | C_FLAG))
   #define CC_A    (!(CPU_FLAGL & (Z_FLAG | C_FLAG)))
   #define CC_S    (CPU_FLAGL & S_FLAG)
   #define CC_NS   (!(CPU_FLAGL & S_FLAG))
   #define CC_P    (CPU_FLAGL & P_FLAG)
   #define CC_NP   (!(CPU_FLAGL & P_FLAG))
   #define CC_L    (((CPU_FLAGL & S_FLAG) == 0) != (CPU_OV == 0))
   #define CC_NL   (((CPU_FLAGL & S_FLAG) == 0) == (CPU_OV == 0))
   #define CC_LE   ((CPU_FLAGL & Z_FLAG) || \
                                   (((CPU_FLAGL & S_FLAG) == 0) != (CPU_OV == 0)))
   #define CC_NLE  ((!(CPU_FLAGL & Z_FLAG)) && \
                                   (((CPU_FLAGL & S_FLAG) == 0) == (CPU_OV == 0)))
   
   
   /*
  * instruction check   * instruction check
  */   */
 #include "ia32xc.mcr"  #include "ia32xc.mcr"
Removed from v.1.13  
changed lines
  Added in v.1.24

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