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| version 1.15, 2004/03/07 01:23:14 | version 1.29, 2011/12/21 18:07:57 |
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| Line 1 | Line 1 |
| /* $Id$ */ | |
| /* | /* |
| * Copyright (c) 2002-2003 NONAKA Kimihiro | * Copyright (c) 2002-2003 NONAKA Kimihiro |
| * All rights reserved. | * All rights reserved. |
| Line 12 | Line 10 |
| * 2. Redistributions in binary form must reproduce the above copyright | * 2. Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the | * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. | * documentation and/or other materials provided with the distribution. |
| * 3. The name of the author may not be used to endorse or promote products | |
| * derived from this software without specific prior written permission. | |
| * | * |
| * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| Line 37 | Line 33 |
| #define __CBD(src) ((UINT32)((SINT8)(src))) | #define __CBD(src) ((UINT32)((SINT8)(src))) |
| #define __CWDE(src) ((SINT16)(src)) | #define __CWDE(src) ((SINT16)(src)) |
| #ifndef PTR_TO_UINT32 | |
| #define PTR_TO_UINT32(p) ((UINT32)((unsigned long)(p))) | |
| #endif | |
| #ifndef UINT32_TO_PTR | |
| #define UINT32_TO_PTR(v) ((void *)((unsigned long)(UINT32)(v))) | |
| #endif | |
| #define SWAP_BYTE(p, q) \ | #define SWAP_BYTE(p, q) \ |
| do { \ | do { \ |
| UINT8 __tmp = (p); \ | UINT8 __tmp = (p); \ |
| Line 69 do { \ | Line 72 do { \ |
| #define CPU_HALT() \ | #define CPU_HALT() \ |
| do { \ | do { \ |
| CPU_REMCLOCK = -1; \ | CPU_REMCLOCK = -1; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define IRQCHECKTERM() \ | #define IRQCHECKTERM() \ |
| Line 84 do { \ | Line 87 do { \ |
| /* | /* |
| * instruction pointer | * instruction pointer |
| */ | */ |
| #define SET_EIP(v) \ | /* コードフェッチに使用するので、OpSize の影響を受けてはいけない */ |
| do { \ | #define _ADD_EIP(v) \ |
| UINT32 __new_ip = (v); \ | |
| if (__new_ip > CPU_STAT_CS_LIMIT) { \ | |
| VERBOSE(("SET_EIP: new_ip = %08x, limit = %08x", __new_ip, CPU_STAT_CS_LIMIT)); \ | |
| EXCEPTION(GP_EXCEPTION, 0); \ | |
| } \ | |
| CPU_EIP = __new_ip; \ | |
| CPU_PREFETCH_CLEAR(); \ | |
| } while (/*CONSTCOND*/ 0) | |
| #define ADD_EIP(v) \ | |
| do { \ | do { \ |
| UINT32 __tmp_ip = CPU_EIP + (v); \ | UINT32 __tmp_ip = CPU_EIP + (v); \ |
| if (!CPU_STATSAVE.cpu_inst_default.op_32) { \ | if (!CPU_STATSAVE.cpu_inst_default.op_32) { \ |
| Line 104 do { \ | Line 97 do { \ |
| CPU_EIP = __tmp_ip; \ | CPU_EIP = __tmp_ip; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define GET_PCBYTE(v) \ | #define GET_PCBYTE(v) \ |
| do { \ | do { \ |
| (v) = cpu_codefetch(CPU_EIP); \ | (v) = cpu_codefetch(CPU_EIP); \ |
| ADD_EIP(1); \ | _ADD_EIP(1); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define GET_PCBYTES(v) \ | #define GET_PCBYTES(v) \ |
| do { \ | do { \ |
| (v) = __CBW(cpu_codefetch(CPU_EIP)); \ | (v) = __CBW(cpu_codefetch(CPU_EIP)); \ |
| ADD_EIP(1); \ | _ADD_EIP(1); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define GET_PCBYTESD(v) \ | #define GET_PCBYTESD(v) \ |
| do { \ | do { \ |
| (v) = __CBD(cpu_codefetch(CPU_EIP)); \ | (v) = __CBD(cpu_codefetch(CPU_EIP)); \ |
| ADD_EIP(1); \ | _ADD_EIP(1); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define GET_PCWORD(v) \ | #define GET_PCWORD(v) \ |
| do { \ | do { \ |
| (v) = cpu_codefetch_w(CPU_EIP); \ | (v) = cpu_codefetch_w(CPU_EIP); \ |
| ADD_EIP(2); \ | _ADD_EIP(2); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define GET_PCWORDS(v) \ | #define GET_PCWORDS(v) \ |
| do { \ | do { \ |
| (v) = __CWDE(cpu_codefetch_w(CPU_EIP)); \ | (v) = __CWDE(cpu_codefetch_w(CPU_EIP)); \ |
| ADD_EIP(2); \ | _ADD_EIP(2); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define GET_PCDWORD(v) \ | #define GET_PCDWORD(v) \ |
| do { \ | do { \ |
| (v) = cpu_codefetch_d(CPU_EIP); \ | (v) = cpu_codefetch_d(CPU_EIP); \ |
| ADD_EIP(4); \ | _ADD_EIP(4); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define PREPART_EA_REG8(b, d_s) \ | #define PREPART_EA_REG8(b, d_s) \ |
| Line 682 do { \ | Line 674 do { \ |
| (s) = __b; \ | (s) = __b; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define BYTE_NOT(s) \ | |
| do { \ | |
| (s) ^= 0xff; \ | |
| } while (/*CONSTCOND*/ 0) | |
| #define WORD_NOT(s) \ | |
| do { \ | |
| (s) ^= 0xffff; \ | |
| } while (/*CONSTCOND*/ 0) | |
| #define DWORD_NOT(s) \ | |
| do { \ | |
| (s) ^= 0xffffffff; \ | |
| } while (/*CONSTCOND*/ 0) | |
| /* | /* |
| * stack | * stack |
| */ | */ |
| #define REGPUSH(reg, clock) \ | #define REGPUSH(reg, clock) \ |
| do { \ | do { \ |
| UINT16 new_sp = CPU_SP - 2; \ | UINT16 __new_sp = CPU_SP - 2; \ |
| cpu_vmemorywrite_w(CPU_SS_INDEX, new_sp, reg); \ | |
| CPU_SP = new_sp; \ | |
| CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ |
| cpu_vmemorywrite_w(CPU_SS_INDEX, __new_sp, reg); \ | |
| CPU_SP = __new_sp; \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define REGPUSH_32(reg, clock) \ | #define REGPUSH_32(reg, clock) \ |
| do { \ | do { \ |
| UINT32 new_esp = CPU_ESP - 4; \ | UINT32 __new_esp = CPU_ESP - 4; \ |
| cpu_vmemorywrite_d(CPU_SS_INDEX, new_esp, reg); \ | |
| CPU_ESP = new_esp; \ | |
| CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ |
| cpu_vmemorywrite_d(CPU_SS_INDEX, __new_esp, reg); \ | |
| CPU_ESP = __new_esp; \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define REGPUSH0(reg) \ | #define REGPUSH0(reg) \ |
| do { \ | do { \ |
| UINT16 new_sp = CPU_SP - 2; \ | UINT16 __new_sp = CPU_SP - 2; \ |
| cpu_vmemorywrite_w(CPU_SS_INDEX, new_sp, (UINT16)reg); \ | cpu_vmemorywrite_w(CPU_SS_INDEX, __new_sp, (UINT16)reg); \ |
| CPU_SP = new_sp; \ | CPU_SP = __new_sp; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| /* Operand Size == 16 && Stack Size == 32 */ | /* Operand Size == 16 && Stack Size == 32 */ |
| #define REGPUSH0_16_32(reg) \ | #define REGPUSH0_16_32(reg) \ |
| do { \ | do { \ |
| UINT32 new_esp = CPU_ESP - 2; \ | UINT32 __new_esp = CPU_ESP - 2; \ |
| cpu_vmemorywrite_w(CPU_SS_INDEX, new_esp, (UINT16)reg); \ | cpu_vmemorywrite_w(CPU_SS_INDEX, __new_esp, (UINT16)reg); \ |
| CPU_ESP = new_esp; \ | CPU_ESP = __new_esp; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| /* Operand Size == 32 && Stack Size == 16 */ | /* Operand Size == 32 && Stack Size == 16 */ |
| #define REGPUSH0_32_16(reg) \ | #define REGPUSH0_32_16(reg) \ |
| do { \ | do { \ |
| UINT16 new_sp = CPU_SP - 4; \ | UINT16 __new_sp = CPU_SP - 4; \ |
| cpu_vmemorywrite_d(CPU_SS_INDEX, new_sp, reg); \ | cpu_vmemorywrite_d(CPU_SS_INDEX, __new_sp, reg); \ |
| CPU_SP = new_sp; \ | CPU_SP = __new_sp; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define REGPUSH0_32(reg) \ | #define REGPUSH0_32(reg) \ |
| do { \ | do { \ |
| UINT32 new_esp = CPU_ESP - 4; \ | UINT32 __new_esp = CPU_ESP - 4; \ |
| cpu_vmemorywrite_d(CPU_SS_INDEX, new_esp, reg); \ | cpu_vmemorywrite_d(CPU_SS_INDEX, __new_esp, reg); \ |
| CPU_ESP = new_esp; \ | CPU_ESP = __new_esp; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define PUSH0_16(reg) \ | #define PUSH0_16(reg) \ |
| Line 761 do { \ | Line 768 do { \ |
| #define REGPOP(reg, clock) \ | #define REGPOP(reg, clock) \ |
| do { \ | do { \ |
| CPU_WORKCLOCK(clock); \ | |
| (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_SP); \ | (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_SP); \ |
| CPU_SP += 2; \ | CPU_SP += 2; \ |
| CPU_WORKCLOCK(clock); \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define REGPOP_32(reg, clock) \ | #define REGPOP_32(reg, clock) \ |
| do { \ | do { \ |
| CPU_WORKCLOCK(clock); \ | |
| (reg) = cpu_vmemoryread_d(CPU_SS_INDEX, CPU_ESP); \ | (reg) = cpu_vmemoryread_d(CPU_SS_INDEX, CPU_ESP); \ |
| CPU_ESP += 4; \ | CPU_ESP += 4; \ |
| CPU_WORKCLOCK(clock); \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define REGPOP0(reg) \ | #define REGPOP0(reg) \ |
| Line 820 do { \ | Line 827 do { \ |
| */ | */ |
| #define SP_PUSH_16(reg) \ | #define SP_PUSH_16(reg) \ |
| do { \ | do { \ |
| UINT16 sp = CPU_SP; \ | UINT16 __sp = CPU_SP; \ |
| if (!CPU_STAT_SS32) { \ | if (!CPU_STAT_SS32) { \ |
| REGPUSH0(sp); \ | REGPUSH0(__sp); \ |
| } else { \ | } else { \ |
| REGPUSH0_16_32(sp); \ | REGPUSH0_16_32(__sp); \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define ESP_PUSH_32(reg) \ | #define ESP_PUSH_32(reg) \ |
| do { \ | do { \ |
| UINT32 sp = CPU_ESP; \ | UINT32 __esp = CPU_ESP; \ |
| if (!CPU_STAT_SS32) { \ | if (!CPU_STAT_SS32) { \ |
| REGPUSH0_32_16(sp); \ | REGPUSH0_32_16(__esp); \ |
| } else { \ | } else { \ |
| REGPUSH0_32(sp); \ | REGPUSH0_32(__esp); \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define SP_POP_16(reg) \ | #define SP_POP_16(reg) \ |
| do { \ | do { \ |
| UINT32 sp; \ | UINT32 __sp; \ |
| if (!CPU_STAT_SS32) { \ | if (!CPU_STAT_SS32) { \ |
| sp = CPU_SP; \ | __sp = CPU_SP; \ |
| } else { \ | } else { \ |
| sp = CPU_ESP; \ | __sp = CPU_ESP; \ |
| } \ | } \ |
| CPU_SP = cpu_vmemoryread_w(CPU_SS_INDEX, sp); \ | CPU_SP = cpu_vmemoryread_w(CPU_SS_INDEX, __sp); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define ESP_POP_32(reg) \ | #define ESP_POP_32(reg) \ |
| do { \ | do { \ |
| UINT32 sp; \ | UINT32 __esp; \ |
| if (!CPU_STAT_SS32) { \ | if (!CPU_STAT_SS32) { \ |
| sp = CPU_SP; \ | __esp = CPU_SP; \ |
| } else { \ | } else { \ |
| sp = CPU_ESP; \ | __esp = CPU_ESP; \ |
| } \ | } \ |
| CPU_ESP = cpu_vmemoryread_d(CPU_SS_INDEX, sp); \ | CPU_ESP = cpu_vmemoryread_d(CPU_SS_INDEX, __esp); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| Line 866 do { \ | Line 873 do { \ |
| */ | */ |
| #define JMPSHORT(clock) \ | #define JMPSHORT(clock) \ |
| do { \ | do { \ |
| UINT32 __ip; \ | UINT32 __new_ip; \ |
| UINT32 __dest; \ | |
| CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ |
| __ip = __CBD(cpu_codefetch(CPU_EIP)); \ | GET_PCBYTESD(__dest); \ |
| __ip++; \ | __new_ip = CPU_EIP + __dest; \ |
| ADD_EIP(__ip); \ | if (!CPU_INST_OP32) { \ |
| CPU_PREFETCH_CLEAR(); \ | __new_ip &= 0xffff; \ |
| } \ | |
| if (__new_ip > CPU_STAT_CS_LIMIT) { \ | |
| EXCEPTION(GP_EXCEPTION, 0); \ | |
| } \ | |
| CPU_EIP = __new_ip; \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define JMPNEAR(clock) \ | #define JMPNEAR(clock) \ |
| do { \ | do { \ |
| UINT32 __ip; \ | UINT16 __new_ip; \ |
| SINT16 __dest; \ | |
| CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ |
| __ip = __CWDE(cpu_codefetch_w(CPU_EIP)); \ | GET_PCWORDS(__dest); \ |
| __ip += 2; \ | __new_ip = CPU_IP + __dest; \ |
| ADD_EIP(__ip); \ | if (__new_ip > CPU_STAT_CS_LIMIT) { \ |
| CPU_PREFETCH_CLEAR(); \ | EXCEPTION(GP_EXCEPTION, 0); \ |
| } \ | |
| CPU_EIP = __new_ip; \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define JMPNEAR_4(clock) \ | #define JMPNEAR32(clock) \ |
| do { \ | do { \ |
| UINT32 __ip; \ | UINT32 __new_ip; \ |
| UINT32 __dest; \ | |
| CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ |
| __ip = cpu_codefetch_d(CPU_EIP); \ | GET_PCDWORD(__dest); \ |
| __ip += 4; \ | __new_ip = CPU_EIP + __dest; \ |
| ADD_EIP(__ip); \ | if (__new_ip > CPU_STAT_CS_LIMIT) { \ |
| CPU_PREFETCH_CLEAR(); \ | EXCEPTION(GP_EXCEPTION, 0); \ |
| } \ | |
| CPU_EIP = __new_ip; \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #if !defined(IA32_SUPPORT_PREFETCH_QUEUE) | |
| #define JMPNOP(clock, d) \ | |
| do { \ | |
| CPU_WORKCLOCK(clock); \ | |
| ADD_EIP((d)); \ | |
| } while (/*CONSTCOND*/ 0) | |
| #else | |
| #define JMPNOP(clock, d) \ | #define JMPNOP(clock, d) \ |
| do { \ | do { \ |
| CPU_WORKCLOCK(clock); \ | CPU_WORKCLOCK(clock); \ |
| if (CPU_PREFETCHQ_REMAIN > (d)) { \ | _ADD_EIP((d)); \ |
| CPU_PREFETCHQ_REMAIN -= (d); \ | |
| } else { \ | |
| CPU_PREFETCHQ_REMAIN = 0; \ | |
| } \ | |
| ADD_EIP((d)); \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #endif | |
| /* | |
| * conditions | |
| */ | |
| #define CC_O (CPU_OV) | |
| #define CC_NO (!CPU_OV) | |
| #define CC_C (CPU_FLAGL & C_FLAG) | |
| #define CC_NC (!(CPU_FLAGL & C_FLAG)) | |
| #define CC_Z (CPU_FLAGL & Z_FLAG) | |
| #define CC_NZ (!(CPU_FLAGL & Z_FLAG)) | |
| #define CC_NA (CPU_FLAGL & (Z_FLAG | C_FLAG)) | |
| #define CC_A (!(CPU_FLAGL & (Z_FLAG | C_FLAG))) | |
| #define CC_S (CPU_FLAGL & S_FLAG) | |
| #define CC_NS (!(CPU_FLAGL & S_FLAG)) | |
| #define CC_P (CPU_FLAGL & P_FLAG) | |
| #define CC_NP (!(CPU_FLAGL & P_FLAG)) | |
| #define CC_L (((CPU_FLAGL & S_FLAG) == 0) != (CPU_OV == 0)) | |
| #define CC_NL (((CPU_FLAGL & S_FLAG) == 0) == (CPU_OV == 0)) | |
| #define CC_LE ((CPU_FLAGL & Z_FLAG) || \ | |
| (((CPU_FLAGL & S_FLAG) == 0) != (CPU_OV == 0))) | |
| #define CC_NLE ((!(CPU_FLAGL & Z_FLAG)) && \ | |
| (((CPU_FLAGL & S_FLAG) == 0) == (CPU_OV == 0))) | |
| /* | /* |