--- np2/i386c/ia32/ia32.mcr 2004/01/15 15:49:15 1.3 +++ np2/i386c/ia32/ia32.mcr 2004/02/18 20:11:37 1.11 @@ -1,4 +1,4 @@ -/* $Id: ia32.mcr,v 1.3 2004/01/15 15:49:15 monaka Exp $ */ +/* $Id: ia32.mcr,v 1.11 2004/02/18 20:11:37 yui Exp $ */ /* * Copyright (c) 2002-2003 NONAKA Kimihiro @@ -58,42 +58,10 @@ do { \ (q) = __tmp; \ } while (/*CONSTCOND*/ 0) -/* - * bswap - */ -#if defined(bswap32) && !defined(USE_ASM_BSWAP) -#define BSWAP_DWORD(v) bswap32(v) -#else /* !bswap32 || USE_ASM_BSWAP */ -INLINE static DWORD -BSWAP_DWORD(DWORD val) -{ -#if defined(__GNUC__) && (defined(i386) || defined(__i386__)) - __asm__ __volatile__ ( -#if defined(USE_ASM_BSWAP) - "bswap %0" -#else /* !USE_ASM_BSWAP */ - "rorw $8, %w1\n\t" - "rorl $16, %1\n\t" - "rorw $8, %w1\n\t" -#endif /* USE_ASM_BSWAP */ - : "=r" (val) : "0" (val)); - return val; -#else /* !(__GNUC__ && (i386 || __i386__)) */ - DWORD v; - v = (val & 0x000000ff) << 24; - v |= (val & 0x0000ff00) << 8; - v |= (val & 0x00ff0000) >> 8; - v |= (val & 0xff000000) >> 24; - return v; -#endif /* __GNUC__ && (i386 || __i386__) */ -} -#endif /* bswap32 && !USE_ASM_BSWAP */ - /* * clock */ -#ifndef DONT_USE_NEVENT #define CPU_WORKCLOCK(clock) \ do { \ CPU_REMCLOCK -= (clock); \ @@ -111,16 +79,16 @@ do { \ CPU_REMCLOCK = 0; \ } \ } while (/*CONSTCOND*/ 0) -#endif +/* + * instruction pointer + */ #define SET_EIP(v) \ do { \ DWORD __new_ip = (v); \ - if (!CPU_INST_OP32) { \ - __new_ip &= 0x0000ffff; \ - } \ if (__new_ip > CPU_STAT_CS_LIMIT) { \ + VERBOSE(("SET_EIP: new_ip = %08x, limit = %08x", __new_ip, CPU_STAT_CS_LIMIT)); \ EXCEPTION(GP_EXCEPTION, 0); \ } \ CPU_EIP = __new_ip; \ @@ -129,11 +97,8 @@ do { \ #define ADD_EIP(v) \ do { \ DWORD __tmp_ip = CPU_EIP + (v); \ - if (!CPU_INST_OP32) { \ - __tmp_ip &= 0x0000ffff; \ - } \ - if (__tmp_ip > CPU_STAT_CS_LIMIT) { \ - EXCEPTION(GP_EXCEPTION, 0); \ + if (!CPU_STATSAVE.cpu_inst_default.op_32) { \ + __tmp_ip &= 0xffff; \ } \ CPU_EIP = __tmp_ip; \ } while (/*CONSTCOND*/ 0) @@ -435,7 +400,7 @@ do { \ (r) = (d) - (s) - __c; \ CPU_OV = ((d) ^ (r)) & ((d) ^ (s)) & 0x80000000; \ CPU_FLAGL = (BYTE)(((r) ^ (d) ^ (s)) & A_FLAG); \ - if ((d) < (s) + __c) { \ + if ((!__c && (d) < (s)) || (__c && (d) <= (s))) { \ CPU_FLAGL |= C_FLAG; \ } \ if ((r) == 0) { \ @@ -633,7 +598,7 @@ do { \ do { \ CPU_FLAGL &= (Z_FLAG | S_FLAG | A_FLAG | P_FLAG); \ (r) = (SQWORD)(d) * (SQWORD)(s); \ - CPU_OV = (DWORD)(((r) + 0x80000000ULL) >> 32); \ + CPU_OV = (DWORD)(((r) + QWORD_CONST(0x80000000)) >> 32); \ if (CPU_OV) { \ CPU_FLAGL |= C_FLAG; \ } \ @@ -740,14 +705,14 @@ do { \ #define REGPUSH0(reg) \ do { \ CPU_SP -= 2; \ - cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, reg); \ + cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, (WORD)reg); \ } while (/*CONSTCOND*/ 0) /* Operand Size == 16 && Stack Size == 32 */ #define REGPUSH0_16_32(reg) \ do { \ CPU_ESP -= 2; \ - cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, reg); \ + cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, (WORD)reg); \ } while (/*CONSTCOND*/ 0) /* Operand Size == 32 && Stack Size == 16 */ @@ -763,50 +728,6 @@ do { \ cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, reg); \ } while (/*CONSTCOND*/ 0) -#define SP_PUSH(reg, clock) \ -do { \ - WORD sp = CPU_SP; \ - CPU_SP -= 2; \ - cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, sp); \ - CPU_WORKCLOCK(clock); \ -} while (/*CONSTCOND*/ 0) - -#define SP_PUSH0(reg) \ -do { \ - WORD sp = CPU_SP; \ - CPU_SP -= 2; \ - cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, sp); \ -} while (/*CONSTCOND*/ 0) - -#define SP_PUSH0_16_32(reg) \ -do { \ - WORD sp = CPU_SP; \ - CPU_ESP -= 2; \ - cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, sp); \ -} while (/*CONSTCOND*/ 0) - -#define ESP_PUSH(reg, clock) \ -do { \ - DWORD esp = CPU_ESP; \ - CPU_ESP -= 4; \ - cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, esp); \ - CPU_WORKCLOCK(clock); \ -} while (/*CONSTCOND*/ 0) - -#define ESP_PUSH0_32_16(reg) \ -do { \ - DWORD esp = CPU_ESP; \ - CPU_SP -= 4; \ - cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_SP, esp); \ -} while (/*CONSTCOND*/ 0) - -#define ESP_PUSH0_32(reg) \ -do { \ - DWORD esp = CPU_ESP; \ - CPU_ESP -= 4; \ - cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, esp); \ -} while (/*CONSTCOND*/ 0) - #define PUSH0_16(reg) \ do { \ if (!CPU_STAT_SS32) { \ @@ -834,30 +755,6 @@ do { \ } \ } while (/*CONSTCOND*/ 0) -#define SP_PUSH0_16(reg) \ -do { \ - WORD sp = CPU_SP; \ - if (!CPU_STAT_SS32) { \ - CPU_SP -= 2; \ - cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_SP, sp); \ - } else { \ - CPU_ESP -= 2; \ - cpu_vmemorywrite_w(CPU_SS_INDEX, CPU_ESP, sp); \ - } \ -} while (/*CONSTCOND*/ 0) - -#define SP_PUSH0_32(reg) \ -do { \ - DWORD esp = CPU_ESP; \ - if (CPU_STAT_SS32) { \ - CPU_ESP -= 4; \ - cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_ESP, esp); \ - } else { \ - CPU_SP -= 4; \ - cpu_vmemorywrite_d(CPU_SS_INDEX, CPU_SP, esp); \ - } \ -} while (/*CONSTCOND*/ 0) - #define REGPOP(reg, clock) \ do { \ (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_SP); \ @@ -914,24 +811,52 @@ do { \ } \ } while (/*CONSTCOND*/ 0) -#define SP_POP0_16(reg) \ +/* + * stack pointer + */ +#define SP_PUSH_16(reg) \ do { \ + WORD sp = CPU_SP; \ if (!CPU_STAT_SS32) { \ - (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_SP); \ + REGPUSH0(sp); \ } else { \ - (reg) = cpu_vmemoryread_w(CPU_SS_INDEX, CPU_ESP); \ + REGPUSH0_16_32(sp); \ } \ } while (/*CONSTCOND*/ 0) -#define ESP_POP0_32(reg) \ +#define ESP_PUSH_32(reg) \ do { \ - if (CPU_STAT_SS32) { \ - (reg) = cpu_vmemoryread_d(CPU_SS_INDEX, CPU_ESP); \ + DWORD sp = CPU_ESP; \ + if (!CPU_STAT_SS32) { \ + REGPUSH0_32_16(sp); \ + } else { \ + REGPUSH0_32(sp); \ + } \ +} while (/*CONSTCOND*/ 0) + +#define SP_POP_16(reg) \ +do { \ + DWORD sp; \ + if (!CPU_STAT_SS32) { \ + sp = CPU_SP; \ + } else { \ + sp = CPU_ESP; \ + } \ + CPU_SP = cpu_vmemoryread_w(CPU_SS_INDEX, sp); \ +} while (/*CONSTCOND*/ 0) + +#define ESP_POP_32(reg) \ +do { \ + DWORD sp; \ + if (!CPU_STAT_SS32) { \ + sp = CPU_SP; \ } else { \ - (reg) = cpu_vmemoryread_d(CPU_SS_INDEX, CPU_SP); \ + sp = CPU_ESP; \ } \ + CPU_ESP = cpu_vmemoryread_d(CPU_SS_INDEX, sp); \ } while (/*CONSTCOND*/ 0) + /* * jump */ @@ -968,7 +893,10 @@ do { \ ADD_EIP((d)); \ } while (/*CONSTCOND*/ 0) -/* instruction check */ + +/* + * instruction check + */ #include "ia32xc.mcr" #endif /* IA32_CPU_IA32_MCR__ */