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|
| version 1.1, 2003/12/08 00:55:31 | version 1.2, 2004/02/20 16:09:04 |
|---|---|
| Line 37 | Line 37 |
| /* | /* |
| * arith | * arith |
| */ | */ |
| #define XC_ADDBYTE(r, d, s) \ | #define XC_ADD_BYTE(r, d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| BYTE __r = __d; \ | UINT8 __r = __d; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ADDBYTE((r), (d), (s)); \ | _ADD_BYTE((r), (d), (s)); \ |
| __R = (r) & 0xff; \ | __R = (r) & 0xff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 65 do { \ | Line 65 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ADDBYTE: __s = %02x, __d = %02x", __s, __d); \ | ia32_warning("XC_ADD_BYTE: __s = %02x, __d = %02x", __s, __d); \ |
| ia32_warning("XC_ADDBYTE: __R = %02x, __r = %02x", \ | ia32_warning("XC_ADD_BYTE: __R = %02x, __r = %02x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ADDBYTE: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_ADD_BYTE: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ |
| ia32_warning("XC_ADDBYTE: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_ADD_BYTE: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ |
| Line 78 do { \ | Line 78 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ADDWORD(r, d, s) \ | #define XC_ADD_WORD(r, d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| WORD __r = __d; \ | UINT16 __r = __d; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ADDWORD((r), (d), (s)); \ | _ADD_WORD((r), (d), (s)); \ |
| __R = (r) & 0xffff; \ | __R = (r) & 0xffff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 106 do { \ | Line 106 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ADDWORD: __s = %04x, __d = %04x", __s, __d); \ | ia32_warning("XC_ADD_WORD: __s = %04x, __d = %04x", __s, __d); \ |
| ia32_warning("XC_ADDWORD: __R = %04x, __r = %04x", \ | ia32_warning("XC_ADD_WORD: __R = %04x, __r = %04x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ADDWORD: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_ADD_WORD: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ |
| ia32_warning("XC_ADDWORD: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_ADD_WORD: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ |
| Line 119 do { \ | Line 119 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ADDDWORD(r, d, s) \ | #define XC_ADD_DWORD(r, d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r = __d; \ | UINT32 __r = __d; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ADDDWORD((r), (d), (s)); \ | _ADD_DWORD((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 147 do { \ | Line 147 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ADDDWORD: __s = %08x, __d = %08x", __s, __d); \ | ia32_warning("XC_ADD_DWORD: __s = %08x, __d = %08x", __s, __d);\ |
| ia32_warning("XC_ADDDWORD: __R = %08x, __r = %08x", \ | ia32_warning("XC_ADD_DWORD: __R = %08x, __r = %08x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ADDDWORD: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_ADD_DWORD: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ |
| ia32_warning("XC_ADDDWORD: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_ADD_DWORD: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ |
| Line 160 do { \ | Line 160 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ORBYTE(d, s) \ | #define XC_OR_BYTE(d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| BYTE __r = __d; \ | UINT8 __r = __d; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ORBYTE((d), (s)); \ | _OR_BYTE((d), (s)); \ |
| __R = (d) & 0xff; \ | __R = (d) & 0xff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 188 do { \ | Line 188 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZP_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZP_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ORBYTE: __s = %02x, __d = %02x", __s, __d); \ | ia32_warning("XC_OR_BYTE: __s = %02x, __d = %02x", __s, __d); \ |
| ia32_warning("XC_ORBYTE: __R = %02x, __r = %02x", \ | ia32_warning("XC_OR_BYTE: __R = %02x, __r = %02x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ORBYTE: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_OR_BYTE: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZP_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZP_FLAG); \ |
| ia32_warning("XC_ORBYTE: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_OR_BYTE: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZP_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZP_FLAG) == 0); \ |
| Line 201 do { \ | Line 201 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ORWORD(d, s) \ | #define XC_OR_WORD(d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| WORD __r = __d; \ | UINT16 __r = __d; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ORWORD((d), (s)); \ | _OR_WORD((d), (s)); \ |
| __R = (d) & 0xffff; \ | __R = (d) & 0xffff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 229 do { \ | Line 229 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZP_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZP_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ORWORD: __s = %04x, __d = %04x", __s, __d); \ | ia32_warning("XC_OR_WORD: __s = %04x, __d = %04x", __s, __d); \ |
| ia32_warning("XC_ORWORD: __R = %04x, __r = %04x", \ | ia32_warning("XC_OR_WORD: __R = %04x, __r = %04x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ORWORD: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_OR_WORD: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZP_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZP_FLAG); \ |
| ia32_warning("XC_ORWORD: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_OR_WORD: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZP_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZP_FLAG) == 0); \ |
| Line 242 do { \ | Line 242 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ORDWORD(d, s) \ | #define XC_OR_DWORD(d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r = __d; \ | UINT32 __r = __d; \ |
| DWORD __R; \ | DWORD __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ORDWORD((d), (s)); \ | _OR_DWORD((d), (s)); \ |
| __R = (d); \ | __R = (d); \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 270 do { \ | Line 270 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZP_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZP_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ORDWORD: __s = %08x, __d = %08x", __s, __d); \ | ia32_warning("XC_OR_DWORD: __s = %08x, __d = %08x", __s, __d); \ |
| ia32_warning("XC_ORDWORD: __R = %08x, __r = %08x", \ | ia32_warning("XC_OR_DWORD: __R = %08x, __r = %08x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ORDWORD: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_OR_DWORD: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZP_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZP_FLAG); \ |
| ia32_warning("XC_ORDWORD: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_OR_DWORD: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZP_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZP_FLAG) == 0); \ |
| Line 284 do { \ | Line 284 do { \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| /* flag no check */ | /* flag no check */ |
| #define XC_ADCBYTE(r, d, s) \ | #define XC_ADC_BYTE(r, d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| BYTE __r = __d; \ | UINT8 __r = __d; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| BYTE __xc_flagl = CPU_FLAGL; \ | UINT8 __xc_flagl = CPU_FLAGL; \ |
| \ | \ |
| _ADCBYTE((r), (d), (s)); \ | _ADC_BYTE((r), (d), (s)); \ |
| __R = (r) & 0xff; \ | __R = (r) & 0xff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 317 do { \ | Line 317 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ADCBYTE: __s = %02x, __d = %02x", __s, __d); \ | ia32_warning("XC_ADC_BYTE: __s = %02x, __d = %02x", __s, __d); \ |
| ia32_warning("XC_ADCBYTE: __R = %02x, __r = %02x", \ | ia32_warning("XC_ADC_BYTE: __R = %02x, __r = %02x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ADCBYTE: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_ADC_BYTE: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ |
| ia32_warning("XC_ADCBYTE: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_ADC_BYTE: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ |
| Line 330 do { \ | Line 330 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ADCWORD(r, d, s) \ | #define XC_ADC_WORD(r, d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| WORD __r = __d; \ | UINT16 __r = __d; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| BYTE __xc_flagl = CPU_FLAGL; \ | UINT8 __xc_flagl = CPU_FLAGL; \ |
| \ | \ |
| _ADCWORD((r), (d), (s)); \ | _ADC_WORD((r), (d), (s)); \ |
| __R = (r) & 0xffff; \ | __R = (r) & 0xffff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 363 do { \ | Line 363 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ADCWORD: __s = %04x, __d = %04x", __s, __d); \ | ia32_warning("XC_ADC_WORD: __s = %04x, __d = %04x", __s, __d); \ |
| ia32_warning("XC_ADCWORD: __R = %04x, __r = %04x", \ | ia32_warning("XC_ADC_WORD: __R = %04x, __r = %04x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ADCWORD: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_ADC_WORD: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ |
| ia32_warning("XC_ADCWORD: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_ADC_WORD: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ |
| Line 376 do { \ | Line 376 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ADCDWORD(r, d, s) \ | #define XC_ADC_DWORD(r, d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r = __d; \ | UINT32 __r = __d; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| BYTE __xc_flagl = CPU_FLAGL; \ | UINT8 __xc_flagl = CPU_FLAGL; \ |
| \ | \ |
| _ADCDWORD((r), (d), (s)); \ | _ADC_DWORD((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 409 do { \ | Line 409 do { \ |
| if ((__R != __r) || \ | if ((__R != __r) || \ |
| (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ | (((__f ^ CPU_FLAGL) & SZAPC_FLAG) != 0) || \ |
| (!CPU_OV != !__o)) { \ | (!CPU_OV != !__o)) { \ |
| ia32_warning("XC_ADCDWORD: __s = %08x, __d = %08x", __s, __d); \ | ia32_warning("XC_ADC_DWORD: __s = %08x, __d = %08x", __s, __d);\ |
| ia32_warning("XC_ADCDWORD: __R = %08x, __r = %08x", \ | ia32_warning("XC_ADC_DWORD: __R = %08x, __r = %08x", \ |
| __R, __r); \ | __R, __r); \ |
| ia32_warning("XC_ADCDWORD: CPU_FLAGL = %02x, __f = %02x, " \ | ia32_warning("XC_ADC_DWORD: CPU_FLAGL = %02x, __f = %02x, " \ |
| "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ | "mask = %02x", CPU_FLAGL, __f, SZAPC_FLAG); \ |
| ia32_warning("XC_ADCDWORD: CPU_OV = %s, __o = %s", \ | ia32_warning("XC_ADC_DWORD: CPU_OV = %s, __o = %s", \ |
| CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ | CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ |
| assert(__R == __r); \ | assert(__R == __r); \ |
| assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ | assert(((__f ^ CPU_FLAGL) & SZAPC_FLAG) == 0); \ |
| Line 425 do { \ | Line 425 do { \ |
| /* flag no check */ | /* flag no check */ |
| #define XC_BYTE_SBB(r, d, s) \ | #define XC_BYTE_SBB(r, d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| BYTE __r = __d; \ | UINT8 __r = __d; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| BYTE __xc_flagl = CPU_FLAGL; \ | UINT8 __xc_flagl = CPU_FLAGL; \ |
| \ | \ |
| _BYTE_SBB((r), (d), (s)); \ | _BYTE_SBB((r), (d), (s)); \ |
| __R = (r) & 0xff; \ | __R = (r) & 0xff; \ |
| Line 471 do { \ | Line 471 do { \ |
| #define XC_WORD_SBB(r, d, s) \ | #define XC_WORD_SBB(r, d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| WORD __r = __d; \ | UINT16 __r = __d; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| BYTE __xc_flagl = CPU_FLAGL; \ | UINT8 __xc_flagl = CPU_FLAGL; \ |
| \ | \ |
| _WORD_SBB((r), (d), (s)); \ | _WORD_SBB((r), (d), (s)); \ |
| __R = (r) & 0xffff; \ | __R = (r) & 0xffff; \ |
| Line 517 do { \ | Line 517 do { \ |
| #define XC_DWORD_SBB(r, d, s) \ | #define XC_DWORD_SBB(r, d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r = __d; \ | UINT32 __r = __d; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| BYTE __xc_flagl = CPU_FLAGL; \ | UINT8 __xc_flagl = CPU_FLAGL; \ |
| \ | \ |
| _DWORD_SBB((r), (d), (s)); \ | _DWORD_SBB((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| Line 561 do { \ | Line 561 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ANDBYTE(d, s) \ | #define XC_AND_BYTE(d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| BYTE __r = __d; \ | UINT8 __r = __d; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ANDBYTE((d), (s)); \ | _AND_BYTE((d), (s)); \ |
| __R = (d) & 0xff; \ | __R = (d) & 0xff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 604 do { \ | Line 604 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ANDWORD(d, s) \ | #define XC_AND_WORD(d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| WORD __r = __d; \ | UINT16 __r = __d; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ANDWORD((d), (s)); \ | _AND_WORD((d), (s)); \ |
| __R = (d) & 0xffff; \ | __R = (d) & 0xffff; \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 647 do { \ | Line 647 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define XC_ANDDWORD(d, s) \ | #define XC_AND_DWORD(d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r = __d; \ | UINT32 __r = __d; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _ANDDWORD((d), (s)); \ | _AND_DWORD((d), (s)); \ |
| __R = (d); \ | __R = (d); \ |
| \ | \ |
| __asm__ __volatile__ ( \ | __asm__ __volatile__ ( \ |
| Line 692 do { \ | Line 692 do { \ |
| #define XC_BYTE_SUB(r, d, s) \ | #define XC_BYTE_SUB(r, d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| BYTE __r = __d; \ | UINT8 __r = __d; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _BYTE_SUB((r), (d), (s)); \ | _BYTE_SUB((r), (d), (s)); \ |
| __R = (r) & 0xff; \ | __R = (r) & 0xff; \ |
| Line 735 do { \ | Line 735 do { \ |
| #define XC_WORD_SUB(r, d, s) \ | #define XC_WORD_SUB(r, d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| WORD __r = __d; \ | UINT16 __r = __d; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _WORD_SUB((r), (d), (s)); \ | _WORD_SUB((r), (d), (s)); \ |
| __R = (r) & 0xffff; \ | __R = (r) & 0xffff; \ |
| Line 778 do { \ | Line 778 do { \ |
| #define XC_DWORD_SUB(r, d, s) \ | #define XC_DWORD_SUB(r, d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r = __d; \ | UINT32 __r = __d; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _DWORD_SUB((r), (d), (s)); \ | _DWORD_SUB((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| Line 821 do { \ | Line 821 do { \ |
| #define XC_BYTE_XOR(d, s) \ | #define XC_BYTE_XOR(d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| BYTE __r = __d; \ | UINT8 __r = __d; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _BYTE_XOR((d), (s)); \ | _BYTE_XOR((d), (s)); \ |
| __R = (d) & 0xff; \ | __R = (d) & 0xff; \ |
| Line 864 do { \ | Line 864 do { \ |
| #define XC_WORD_XOR(d, s) \ | #define XC_WORD_XOR(d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| WORD __r = __d; \ | UINT16 __r = __d; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _WORD_XOR((d), (s)); \ | _WORD_XOR((d), (s)); \ |
| __R = (d) & 0xffff; \ | __R = (d) & 0xffff; \ |
| Line 907 do { \ | Line 907 do { \ |
| #define XC_DWORD_XOR(d, s) \ | #define XC_DWORD_XOR(d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r = __d; \ | UINT32 __r = __d; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _DWORD_XOR((d), (s)); \ | _DWORD_XOR((d), (s)); \ |
| __R = (d); \ | __R = (d); \ |
| Line 950 do { \ | Line 950 do { \ |
| #define XC_BYTE_NEG(d, s) \ | #define XC_BYTE_NEG(d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __r = __s; \ | UINT8 __r = __s; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _BYTE_NEG((d), (s)); \ | _BYTE_NEG((d), (s)); \ |
| __R = (d) & 0xff; \ | __R = (d) & 0xff; \ |
| Line 990 do { \ | Line 990 do { \ |
| #define XC_WORD_NEG(d, s) \ | #define XC_WORD_NEG(d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __r = __s; \ | UINT16 __r = __s; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _WORD_NEG((d), (s)); \ | _WORD_NEG((d), (s)); \ |
| __R = (d) & 0xffff; \ | __R = (d) & 0xffff; \ |
| Line 1030 do { \ | Line 1030 do { \ |
| #define XC_DWORD_NEG(d, s) \ | #define XC_DWORD_NEG(d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __r = __s; \ | UINT32 __r = __s; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _DWORD_NEG((d), (s)); \ | _DWORD_NEG((d), (s)); \ |
| __R = (d); \ | __R = (d); \ |
| Line 1070 do { \ | Line 1070 do { \ |
| #define XC_BYTE_MUL(r, d, s) \ | #define XC_BYTE_MUL(r, d, s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __d = (d) & 0xff; \ | UINT8 __d = (d) & 0xff; \ |
| WORD __r; \ | UINT16 __r; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _BYTE_MUL((r), (d), (s)); \ | _BYTE_MUL((r), (d), (s)); \ |
| __R = (r) & 0xffff; \ | __R = (r) & 0xffff; \ |
| Line 1114 do { \ | Line 1114 do { \ |
| #define XC_WORD_MUL(r, d, s) \ | #define XC_WORD_MUL(r, d, s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __d = (d) & 0xffff; \ | UINT16 __d = (d) & 0xffff; \ |
| DWORD __r; \ | UINT32 __r; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _WORD_MUL((r), (d), (s)); \ | _WORD_MUL((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| Line 1163 do { \ | Line 1163 do { \ |
| #define XC_DWORD_MUL(r, d, s) \ | #define XC_DWORD_MUL(r, d, s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __d = (d); \ | UINT32 __d = (d); \ |
| DWORD __r; \ | UINT32 __r; \ |
| DWORD __h; \ | UINT32 __h; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _DWORD_MUL((r), (d), (s)); \ | _DWORD_MUL((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| Line 1214 do { \ | Line 1214 do { \ |
| #define XC_BYTE_IMUL(r, d, s) \ | #define XC_BYTE_IMUL(r, d, s) \ |
| do { \ | do { \ |
| SBYTE __s = (s) & 0xff; \ | SINT8 __s = (s) & 0xff; \ |
| SBYTE __d = (d) & 0xff; \ | SINT8 __d = (d) & 0xff; \ |
| SWORD __R; \ | SINT16 __R; \ |
| SWORD __r; \ | SINT16 __r; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _BYTE_IMUL((r), (d), (s)); \ | _BYTE_IMUL((r), (d), (s)); \ |
| __R = (r) & 0xffff; \ | __R = (r) & 0xffff; \ |
| Line 1258 do { \ | Line 1258 do { \ |
| #define XC_WORD_IMUL(r, d, s) \ | #define XC_WORD_IMUL(r, d, s) \ |
| do { \ | do { \ |
| SWORD __s = (s) & 0xffff; \ | SINT16 __s = (s) & 0xffff; \ |
| SWORD __d = (d) & 0xffff; \ | SINT16 __d = (d) & 0xffff; \ |
| SDWORD __r; \ | SINT32 __r; \ |
| SDWORD __R; \ | SINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _WORD_IMUL((r), (d), (s)); \ | _WORD_IMUL((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| Line 1307 do { \ | Line 1307 do { \ |
| #define XC_DWORD_IMUL(r, d, s) \ | #define XC_DWORD_IMUL(r, d, s) \ |
| do { \ | do { \ |
| SQWORD __R; \ | SINT64 __R; \ |
| SDWORD __s = (s); \ | SINT32 __s = (s); \ |
| SDWORD __d = (d); \ | SINT32 __d = (d); \ |
| DWORD __r; \ | UINT32 __r; \ |
| DWORD __h; \ | UINT32 __h; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _DWORD_IMUL((r), (d), (s)); \ | _DWORD_IMUL((r), (d), (s)); \ |
| __R = (r); \ | __R = (r); \ |
| Line 1360 do { \ | Line 1360 do { \ |
| /* flag no check */ | /* flag no check */ |
| #define XC_BYTE_INC(s) \ | #define XC_BYTE_INC(s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __r = __s; \ | UINT8 __r = __s; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _BYTE_INC((s)); \ | _BYTE_INC((s)); \ |
| __R = (s) & 0xff; \ | __R = (s) & 0xff; \ |
| Line 1400 do { \ | Line 1400 do { \ |
| #define XC_WORD_INC(s) \ | #define XC_WORD_INC(s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __r = __s; \ | UINT16 __r = __s; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _WORD_INC((s)); \ | _WORD_INC((s)); \ |
| __R = (s) & 0xffff; \ | __R = (s) & 0xffff; \ |
| Line 1440 do { \ | Line 1440 do { \ |
| #define XC_DWORD_INC(s) \ | #define XC_DWORD_INC(s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __r = __s; \ | UINT32 __r = __s; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _DWORD_INC((s)); \ | _DWORD_INC((s)); \ |
| __R = (s); \ | __R = (s); \ |
| Line 1481 do { \ | Line 1481 do { \ |
| /* flag no check */ | /* flag no check */ |
| #define XC_BYTE_DEC(s) \ | #define XC_BYTE_DEC(s) \ |
| do { \ | do { \ |
| BYTE __s = (s) & 0xff; \ | UINT8 __s = (s) & 0xff; \ |
| BYTE __r = __s; \ | UINT8 __r = __s; \ |
| BYTE __R; \ | UINT8 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _BYTE_DEC((s)); \ | _BYTE_DEC((s)); \ |
| __R = (s) & 0xff; \ | __R = (s) & 0xff; \ |
| Line 1521 do { \ | Line 1521 do { \ |
| #define XC_WORD_DEC(s) \ | #define XC_WORD_DEC(s) \ |
| do { \ | do { \ |
| WORD __s = (s) & 0xffff; \ | UINT16 __s = (s) & 0xffff; \ |
| WORD __r = __s; \ | UINT16 __r = __s; \ |
| WORD __R; \ | UINT16 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _WORD_DEC((s)); \ | _WORD_DEC((s)); \ |
| __R = (s) & 0xffff; \ | __R = (s) & 0xffff; \ |
| Line 1561 do { \ | Line 1561 do { \ |
| #define XC_DWORD_DEC(s) \ | #define XC_DWORD_DEC(s) \ |
| do { \ | do { \ |
| DWORD __s = (s); \ | UINT32 __s = (s); \ |
| DWORD __r = __s; \ | UINT32 __r = __s; \ |
| DWORD __R; \ | UINT32 __R; \ |
| BYTE __f; \ | UINT8 __f; \ |
| BYTE __o; \ | UINT8 __o; \ |
| \ | \ |
| _DWORD_DEC((s)); \ | _DWORD_DEC((s)); \ |
| __R = (s); \ | __R = (s); \ |
| Line 1599 do { \ | Line 1599 do { \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define ADDBYTE(r, d, s) XC_ADDBYTE(r, d, s) | #define ADD_BYTE(r, d, s) XC_ADD_BYTE(r, d, s) |
| #define ADDWORD(r, d, s) XC_ADDWORD(r, d, s) | #define ADD_WORD(r, d, s) XC_ADD_WORD(r, d, s) |
| #define ADDDWORD(r, d, s) XC_ADDDWORD(r, d, s) | #define ADD_DWORD(r, d, s) XC_ADD_DWORD(r, d, s) |
| #define ORBYTE(d, s) XC_ORBYTE(d, s) | #define OR_BYTE(d, s) XC_OR_BYTE(d, s) |
| #define ORWORD(d, s) XC_ORWORD(d, s) | #define OR_WORD(d, s) XC_OR_WORD(d, s) |
| #define ORDWORD(d, s) XC_ORDWORD(d, s) | #define OR_DWORD(d, s) XC_OR_DWORD(d, s) |
| #define ADCBYTE(r, d, s) XC_ADCBYTE(r, d, s) | #define ADC_BYTE(r, d, s) XC_ADC_BYTE(r, d, s) |
| #define ADCWORD(r, d, s) XC_ADCWORD(r, d, s) | #define ADC_WORD(r, d, s) XC_ADC_WORD(r, d, s) |
| #define ADCDWORD(r, d, s) XC_ADCDWORD(r, d, s) | #define ADC_DWORD(r, d, s) XC_ADC_DWORD(r, d, s) |
| #define BYTE_SBB(r, d, s) XC_BYTE_SBB(r, d, s) | #define BYTE_SBB(r, d, s) XC_BYTE_SBB(r, d, s) |
| #define WORD_SBB(r, d, s) XC_WORD_SBB(r, d, s) | #define WORD_SBB(r, d, s) XC_WORD_SBB(r, d, s) |
| #define DWORD_SBB(r, d, s) XC_DWORD_SBB(r, d, s) | #define DWORD_SBB(r, d, s) XC_DWORD_SBB(r, d, s) |
| #define ANDBYTE(d, s) XC_ANDBYTE(d, s) | #define AND_BYTE(d, s) XC_AND_BYTE(d, s) |
| #define ANDWORD(d, s) XC_ANDWORD(d, s) | #define AND_WORD(d, s) XC_AND_WORD(d, s) |
| #define ANDDWORD(d, s) XC_ANDDWORD(d, s) | #define AND_DWORD(d, s) XC_AND_DWORD(d, s) |
| #define BYTE_SUB(r, d, s) XC_BYTE_SUB(r, d, s) | #define BYTE_SUB(r, d, s) XC_BYTE_SUB(r, d, s) |
| #define WORD_SUB(r, d, s) XC_WORD_SUB(r, d, s) | #define WORD_SUB(r, d, s) XC_WORD_SUB(r, d, s) |
| #define DWORD_SUB(r, d, s) XC_DWORD_SUB(r, d, s) | #define DWORD_SUB(r, d, s) XC_DWORD_SUB(r, d, s) |
| Line 1636 do { \ | Line 1636 do { \ |
| #define WORD_DEC(s) XC_WORD_DEC(s) | #define WORD_DEC(s) XC_WORD_DEC(s) |
| #define DWORD_DEC(s) XC_DWORD_DEC(s) | #define DWORD_DEC(s) XC_DWORD_DEC(s) |
| #define XC_STORE_FLAGL() WORD __xc_flagl = CPU_FLAGL | #define XC_STORE_FLAGL() UINT8 __xc_flagl = CPU_FLAGL |
| #else /* !(IA32_CROSS_CHECK && __GNUC__ && (i386) || __i386__)) */ | #else /* !(IA32_CROSS_CHECK && __GNUC__ && (i386) || __i386__)) */ |
| #define ADDBYTE(r, d, s) _ADDBYTE(r, d, s) | #define ADD_BYTE(r, d, s) _ADD_BYTE(r, d, s) |
| #define ADDWORD(r, d, s) _ADDWORD(r, d, s) | #define ADD_WORD(r, d, s) _ADD_WORD(r, d, s) |
| #define ADDDWORD(r, d, s) _ADDDWORD(r, d, s) | #define ADD_DWORD(r, d, s) _ADD_DWORD(r, d, s) |
| #define ORBYTE(d, s) _ORBYTE(d, s) | #define OR_BYTE(d, s) _OR_BYTE(d, s) |
| #define ORWORD(d, s) _ORWORD(d, s) | #define OR_WORD(d, s) _OR_WORD(d, s) |
| #define ORDWORD(d, s) _ORDWORD(d, s) | #define OR_DWORD(d, s) _OR_DWORD(d, s) |
| #define ADCBYTE(r, d, s) _ADCBYTE(r, d, s) | #define ADC_BYTE(r, d, s) _ADC_BYTE(r, d, s) |
| #define ADCWORD(r, d, s) _ADCWORD(r, d, s) | #define ADC_WORD(r, d, s) _ADC_WORD(r, d, s) |
| #define ADCDWORD(r, d, s) _ADCDWORD(r, d, s) | #define ADC_DWORD(r, d, s) _ADC_DWORD(r, d, s) |
| #define BYTE_SBB(r, d, s) _BYTE_SBB(r, d, s) | #define BYTE_SBB(r, d, s) _BYTE_SBB(r, d, s) |
| #define WORD_SBB(r, d, s) _WORD_SBB(r, d, s) | #define WORD_SBB(r, d, s) _WORD_SBB(r, d, s) |
| #define DWORD_SBB(r, d, s) _DWORD_SBB(r, d, s) | #define DWORD_SBB(r, d, s) _DWORD_SBB(r, d, s) |
| #define ANDBYTE(d, s) _ANDBYTE(d, s) | #define AND_BYTE(d, s) _AND_BYTE(d, s) |
| #define ANDWORD(d, s) _ANDWORD(d, s) | #define AND_WORD(d, s) _AND_WORD(d, s) |
| #define ANDDWORD(d, s) _ANDDWORD(d, s) | #define ANDDWORD(d, s) _AND_DWORD(d, s) |
| #define BYTE_SUB(r, d, s) _BYTE_SUB(r, d, s) | #define BYT_E_SUB(r, d, s) _BYTE_SUB(r, d, s) |
| #define WORD_SUB(r, d, s) _WORD_SUB(r, d, s) | #define WORD_SUB(r, d, s) _WORD_SUB(r, d, s) |
| #define DWORD_SUB(r, d, s) _DWORD_SUB(r, d, s) | #define DWORD_SUB(r, d, s) _DWORD_SUB(r, d, s) |
| #define BYTE_XOR(d, s) _BYTE_XOR(d, s) | #define BYTE_XOR(d, s) _BYTE_XOR(d, s) |