--- np2/i386c/ia32/ia32xc.mcr 2004/03/23 15:29:34 1.5 +++ np2/i386c/ia32/ia32xc.mcr 2005/03/12 12:34:30 1.8 @@ -1,4 +1,4 @@ -/* $Id: ia32xc.mcr,v 1.5 2004/03/23 15:29:34 monaka Exp $ */ +/* $Id: ia32xc.mcr,v 1.8 2005/03/12 12:34:30 monaka Exp $ */ /* * Copyright (c) 2003 NONAKA Kimihiro @@ -12,8 +12,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES @@ -30,7 +28,7 @@ #ifndef IA32_CPU_IA32XC_MCR__ #define IA32_CPU_IA32XC_MCR__ -#if defined(IA32_CROSS_CHECK) && defined(__GNUC__) && (defined(i386) || defined(__i386__)) +#if defined(IA32_CROSS_CHECK) && defined(GCC_CPU_ARCH_IA32) #define IA32_CPU_ENABLE_XC @@ -247,7 +245,7 @@ do { \ UINT32 __s = (s); \ UINT32 __d = (d); \ UINT32 __r = __d; \ - DWORD __R; \ + UINT32 __R; \ UINT8 __f; \ UINT8 __o; \ \ @@ -1337,21 +1335,21 @@ do { \ : "=m" (__r), "=m" (__h), "=m" (__f), "=m" (__o) \ : "m" (__d), "m" (__s) \ : "eax", "edx"); \ - if (((DWORD)__R != __r) || \ - ((DWORD)(__R >> 32) != __h) || \ + if (((UINT32)__R != __r) || \ + ((UINT32)(__R >> 32) != __h) || \ (((__f ^ CPU_FLAGL) & C_FLAG) != 0) || \ (!CPU_OV != !__o)) { \ ia32_warning("XC_DWORD_IMUL: __s = %08x, __d = %08x",__s, __d);\ ia32_warning("XC_DWORD_IMUL: __Rl = %08x, __r = %08x", \ - (DWORD)__R, __r); \ + (UINT32)__R, __r); \ ia32_warning("XC_DWORD_IMUL: __Rh == %08x, __h == %08x", \ - (DWORD)(__R >> 32), __h); \ + (UINT32)(__R >> 32), __h); \ ia32_warning("XC_DWORD_IMUL: CPU_FLAGL = %02x, __f = %02x, " \ "mask = %02x", CPU_FLAGL, __f, C_FLAG); \ ia32_warning("XC_DWORD_IMUL: CPU_OV = %s, __o = %s", \ CPU_OV ? "OV" : "NV", __o ? "OV" : "NV"); \ - assert((DWORD)__R == __r); \ - assert((DWORD)(__R >> 32) == __h); \ + assert((UINT32)__R == __r); \ + assert((UINT32)(__R >> 32) == __h); \ assert(((__f ^ CPU_FLAGL) & C_FLAG) == 0); \ assert(!CPU_OV == !__o); \ } \ @@ -1709,6 +1707,6 @@ do { \ #define XC_STORE_FLAGL() -#endif /* IA32_CROSS_CHECK && __GNUC__ && (i386) || __i386__) */ +#endif /* IA32_CROSS_CHECK && GCC_CPU_ARCH_IA32 */ #endif /* IA32_CPU_IA32_MCR__ */