--- np2/i386c/ia32/instructions/arith.mcr	2005/03/12 12:33:48	1.2
+++ np2/i386c/ia32/instructions/arith.mcr	2012/01/08 19:09:40	1.6
@@ -1,5 +1,3 @@
-/*	$Id: arith.mcr,v 1.2 2005/03/12 12:33:48 monaka Exp $	*/
-
 /*
  * Copyright (c) 2004 NONAKA Kimihiro
  * All rights reserved.
@@ -30,29 +28,26 @@
 
 /* args == 1 */
 #define	ARITH_INSTRUCTION_1(inst) \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##1(UINT32 dst, void *arg) \
 { \
-	(void)arg; \
 	BYTE_##inst(dst); \
 	return dst; \
 } \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##2(UINT32 dst, void *arg) \
 { \
-	(void)arg; \
 	WORD_##inst(dst); \
 	return dst; \
 } \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##4(UINT32 dst, void *arg) \
 { \
-	(void)arg; \
 	DWORD_##inst(dst); \
 	return dst; \
 } \
 \
-void \
+void CPUCALL \
 inst##_Eb(UINT32 op) \
 { \
 	UINT8 *out; \
@@ -67,11 +62,11 @@ inst##_Eb(UINT32 op) \
 	} else { \
 		CPU_WORKCLOCK(5); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW(CPU_INST_SEGREG_INDEX, madr, inst##1, 0); \
+		cpu_vmemory_RMW_b(CPU_INST_SEGREG_INDEX, madr, inst##1, 0); \
 	} \
 } \
 \
-void \
+void CPUCALL \
 inst##_Ew(UINT32 op) \
 { \
 	UINT16 *out; \
@@ -86,11 +81,11 @@ inst##_Ew(UINT32 op) \
 	} else { \
 		CPU_WORKCLOCK(5); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, 0); \
+		cpu_vmemory_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, 0); \
 	} \
 } \
 \
-void \
+void CPUCALL \
 inst##_Ed(UINT32 op) \
 { \
 	UINT32 *out; \
@@ -105,27 +100,27 @@ inst##_Ed(UINT32 op) \
 	} else { \
 		CPU_WORKCLOCK(5); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, 0); \
+		cpu_vmemory_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, 0); \
 	} \
 }
 
 /* args == 2 */
 #define	ARITH_INSTRUCTION_2(inst) \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##1(UINT32 dst, void *arg) \
 { \
 	UINT32 src = PTR_TO_UINT32(arg); \
 	BYTE_##inst(dst, src); \
 	return dst; \
 } \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##2(UINT32 dst, void *arg) \
 { \
 	UINT32 src = PTR_TO_UINT32(arg); \
 	WORD_##inst(dst, src); \
 	return dst; \
 } \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##4(UINT32 dst, void *arg) \
 { \
 	UINT32 src = PTR_TO_UINT32(arg); \
@@ -149,7 +144,7 @@ inst##_EbGb(void) \
 	} else { \
 		CPU_WORKCLOCK(7); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
+		cpu_vmemory_RMW_b(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
 	} \
 } \
 \
@@ -169,7 +164,7 @@ inst##_EwGw(void) \
 	} else { \
 		CPU_WORKCLOCK(7); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
+		cpu_vmemory_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
 	} \
 } \
 \
@@ -189,7 +184,7 @@ inst##_EdGd(void) \
 	} else { \
 		CPU_WORKCLOCK(7); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
+		cpu_vmemory_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
 	} \
 } \
 \
@@ -265,7 +260,7 @@ inst##_EAXId(void) \
 	CPU_EAX = dst; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EbIb(UINT8 *regp, UINT32 src) \
 { \
 	UINT32 dst; \
@@ -275,14 +270,14 @@ inst##_EbIb(UINT8 *regp, UINT32 src) \
 	*regp = (UINT8)dst; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EbIb_ext(UINT32 madr, UINT32 src) \
 { \
 \
-	cpu_memory_access_va_RMW(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
+	cpu_vmemory_RMW_b(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
 } \
 \
-void \
+void CPUCALL \
 inst##_EwIx(UINT16 *regp, UINT32 src) \
 { \
 	UINT32 dst; \
@@ -292,14 +287,14 @@ inst##_EwIx(UINT16 *regp, UINT32 src) \
 	*regp = (UINT16)dst; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EwIx_ext(UINT32 madr, UINT32 src) \
 { \
 \
-	cpu_memory_access_va_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
+	cpu_vmemory_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
 } \
 \
-void \
+void CPUCALL \
 inst##_EdIx(UINT32 *regp, UINT32 src) \
 { \
 	UINT32 dst; \
@@ -309,16 +304,16 @@ inst##_EdIx(UINT32 *regp, UINT32 src) \
 	*regp = dst; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EdIx_ext(UINT32 madr, UINT32 src) \
 { \
 \
-	cpu_memory_access_va_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
+	cpu_vmemory_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
 }
 
 /* args == 3 */
 #define	ARITH_INSTRUCTION_3(inst) \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##1(UINT32 dst, void *arg) \
 { \
 	UINT32 src = PTR_TO_UINT32(arg); \
@@ -326,7 +321,7 @@ inst##1(UINT32 dst, void *arg) \
 	BYTE_##inst(res, dst, src); \
 	return res; \
 } \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##2(UINT32 dst, void *arg) \
 { \
 	UINT32 src = PTR_TO_UINT32(arg); \
@@ -334,7 +329,7 @@ inst##2(UINT32 dst, void *arg) \
 	WORD_##inst(res, dst, src); \
 	return res; \
 } \
-static UINT32 \
+static UINT32 CPUCALL \
 inst##4(UINT32 dst, void *arg) \
 { \
 	UINT32 src = PTR_TO_UINT32(arg); \
@@ -359,7 +354,7 @@ inst##_EbGb(void) \
 	} else { \
 		CPU_WORKCLOCK(7); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
+		cpu_vmemory_RMW_b(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
 	} \
 } \
 \
@@ -379,7 +374,7 @@ inst##_EwGw(void) \
 	} else { \
 		CPU_WORKCLOCK(7); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
+		cpu_vmemory_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
 	} \
 } \
 \
@@ -399,7 +394,7 @@ inst##_EdGd(void) \
 	} else { \
 		CPU_WORKCLOCK(7); \
 		madr = calc_ea_dst(op); \
-		cpu_memory_access_va_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
+		cpu_vmemory_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
 	} \
 } \
 \
@@ -475,7 +470,7 @@ inst##_EAXId(void) \
 	CPU_EAX = res; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EbIb(UINT8 *regp, UINT32 src) \
 { \
 	UINT32 dst, res; \
@@ -485,14 +480,14 @@ inst##_EbIb(UINT8 *regp, UINT32 src) \
 	*regp = (UINT8)res; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EbIb_ext(UINT32 madr, UINT32 src) \
 { \
 \
-	cpu_memory_access_va_RMW(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
+	cpu_vmemory_RMW_b(CPU_INST_SEGREG_INDEX, madr, inst##1, UINT32_TO_PTR(src)); \
 } \
 \
-void \
+void CPUCALL \
 inst##_EwIx(UINT16 *regp, UINT32 src) \
 { \
 	UINT32 dst, res; \
@@ -502,14 +497,14 @@ inst##_EwIx(UINT16 *regp, UINT32 src) \
 	*regp = (UINT16)res; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EwIx_ext(UINT32 madr, UINT32 src) \
 { \
 \
-	cpu_memory_access_va_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
+	cpu_vmemory_RMW_w(CPU_INST_SEGREG_INDEX, madr, inst##2, UINT32_TO_PTR(src)); \
 } \
 \
-void \
+void CPUCALL \
 inst##_EdIx(UINT32 *regp, UINT32 src) \
 { \
 	UINT32 dst, res; \
@@ -519,11 +514,11 @@ inst##_EdIx(UINT32 *regp, UINT32 src) \
 	*regp = res; \
 } \
 \
-void \
+void CPUCALL \
 inst##_EdIx_ext(UINT32 madr, UINT32 src) \
 { \
 \
-	cpu_memory_access_va_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
+	cpu_vmemory_RMW_d(CPU_INST_SEGREG_INDEX, madr, inst##4, UINT32_TO_PTR(src)); \
 }
 
 #endif	/* IA32_CPU_ARITH_MCR__ */