--- np2/i386c/ia32/instructions/bit_byte.c	2011/01/15 17:17:23	1.12
+++ np2/i386c/ia32/instructions/bit_byte.c	2011/12/29 13:32:13	1.13
@@ -79,7 +79,7 @@ BT_EdGd(void)
 	CPU_FLAGL |= (dst >> BIT_INDEX32(src)) & 1;
 }
 
-void
+void CPUCALL
 BT_EwIb(UINT32 op)
 {
 	UINT32 src, dst, madr;
@@ -98,7 +98,7 @@ BT_EwIb(UINT32 op)
 	CPU_FLAGL |= (dst >> BIT_INDEX16(src)) & 1;
 }
 
-void
+void CPUCALL
 BT_EdIb(UINT32 op)
 {
 	UINT32 src, dst, madr;
@@ -190,7 +190,7 @@ BTS_EdGd(void)
 	}
 }
 
-void
+void CPUCALL
 BTS_EwIb(UINT32 op)
 {
 	UINT16 *out;
@@ -226,7 +226,7 @@ BTS_EwIb(UINT32 op)
 	}
 }
 
-void
+void CPUCALL
 BTS_EdIb(UINT32 op)
 {
 	UINT32 *out;
@@ -335,7 +335,7 @@ BTR_EdGd(void)
 	}
 }
 
-void
+void CPUCALL
 BTR_EwIb(UINT32 op)
 {
 	UINT16 *out;
@@ -371,7 +371,7 @@ BTR_EwIb(UINT32 op)
 	}
 }
 
-void
+void CPUCALL
 BTR_EdIb(UINT32 op)
 {
 	UINT32 *out;
@@ -480,7 +480,7 @@ BTC_EdGd(void)
 	}
 }
 
-void
+void CPUCALL
 BTC_EwIb(UINT32 op)
 {
 	UINT16 *out;
@@ -516,7 +516,7 @@ BTC_EwIb(UINT32 op)
 	}
 }
 
-void
+void CPUCALL
 BTC_EdIb(UINT32 op)
 {
 	UINT32 *out;
@@ -1004,7 +1004,7 @@ TEST_EAXId(void)
 	DWORD_AND(tmp, src);
 }
 
-void
+void CPUCALL
 TEST_EbIb(UINT32 op)
 {
 	UINT32 src, tmp, madr;
@@ -1021,7 +1021,7 @@ TEST_EbIb(UINT32 op)
 	BYTE_AND(tmp, src);
 }
 
-void
+void CPUCALL
 TEST_EwIw(UINT32 op)
 {
 	UINT32 src, tmp, madr;
@@ -1038,7 +1038,7 @@ TEST_EwIw(UINT32 op)
 	WORD_AND(tmp, src);
 }
 
-void
+void CPUCALL
 TEST_EdId(UINT32 op)
 {
 	UINT32 src, tmp, madr;