--- np2/i386c/ia32/instructions/bit_byte.c 2004/03/21 21:30:49 1.8 +++ np2/i386c/ia32/instructions/bit_byte.c 2011/12/29 13:32:13 1.13 @@ -1,5 +1,3 @@ -/* $Id: bit_byte.c,v 1.8 2004/03/21 21:30:49 yui Exp $ */ - /* * Copyright (c) 2002-2003 NONAKA Kimihiro * All rights reserved. @@ -12,8 +10,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES @@ -33,7 +29,6 @@ #include "bit_byte.h" -#if 1 #define BIT_OFFSET16(v) (2 * (((SINT16)(v)) >> 4)) #define BIT_INDEX16(v) ((v) & 0xf) #define BIT_MAKEBIT16(v) (1 << BIT_INDEX16(v)) @@ -41,15 +36,6 @@ #define BIT_OFFSET32(v) (4 * (((SINT32)(v)) >> 5)) #define BIT_INDEX32(v) ((v) & 0x1f) #define BIT_MAKEBIT32(v) (1 << BIT_INDEX32(v)) -#else -#define BIT_OFFSET16(v) (2 * (((SINT16)(v)) / 16)) -#define BIT_INDEX16(v) ((v) & 0xf) -#define BIT_MAKEBIT16(v) (1 << BIT_INDEX16(v)) - -#define BIT_OFFSET32(v) (4 * (((SINT32)(v)) / 32)) -#define BIT_INDEX32(v) ((v) & 0x1f) -#define BIT_MAKEBIT32(v) (1 << BIT_INDEX32(v)) -#endif /* @@ -93,7 +79,7 @@ BT_EdGd(void) CPU_FLAGL |= (dst >> BIT_INDEX32(src)) & 1; } -void +void CPUCALL BT_EwIb(UINT32 op) { UINT32 src, dst, madr; @@ -112,7 +98,7 @@ BT_EwIb(UINT32 op) CPU_FLAGL |= (dst >> BIT_INDEX16(src)) & 1; } -void +void CPUCALL BT_EdIb(UINT32 op) { UINT32 src, dst, madr; @@ -204,7 +190,7 @@ BTS_EdGd(void) } } -void +void CPUCALL BTS_EwIb(UINT32 op) { UINT16 *out; @@ -240,7 +226,7 @@ BTS_EwIb(UINT32 op) } } -void +void CPUCALL BTS_EdIb(UINT32 op) { UINT32 *out; @@ -349,7 +335,7 @@ BTR_EdGd(void) } } -void +void CPUCALL BTR_EwIb(UINT32 op) { UINT16 *out; @@ -385,7 +371,7 @@ BTR_EwIb(UINT32 op) } } -void +void CPUCALL BTR_EdIb(UINT32 op) { UINT32 *out; @@ -494,7 +480,7 @@ BTC_EdGd(void) } } -void +void CPUCALL BTC_EwIb(UINT32 op) { UINT16 *out; @@ -530,7 +516,7 @@ BTC_EwIb(UINT32 op) } } -void +void CPUCALL BTC_EdIb(UINT32 op) { UINT32 *out; @@ -948,7 +934,7 @@ TEST_EbGb(void) madr = calc_ea_dst(op); tmp = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, madr); } - AND_BYTE(tmp, src); + BYTE_AND(tmp, src); } void @@ -965,7 +951,7 @@ TEST_EwGw(void) madr = calc_ea_dst(op); tmp = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr); } - AND_WORD(tmp, src); + WORD_AND(tmp, src); } void @@ -982,7 +968,7 @@ TEST_EdGd(void) madr = calc_ea_dst(op); tmp = cpu_vmemoryread_d(CPU_INST_SEGREG_INDEX, madr); } - AND_DWORD(tmp, src); + DWORD_AND(tmp, src); } void @@ -993,7 +979,7 @@ TEST_ALIb(void) CPU_WORKCLOCK(3); tmp = CPU_AL; GET_PCBYTE(src); - AND_BYTE(tmp, src); + BYTE_AND(tmp, src); } void @@ -1004,7 +990,7 @@ TEST_AXIw(void) CPU_WORKCLOCK(3); tmp = CPU_AX; GET_PCWORD(src); - AND_WORD(tmp, src); + WORD_AND(tmp, src); } void @@ -1015,10 +1001,10 @@ TEST_EAXId(void) CPU_WORKCLOCK(3); tmp = CPU_EAX; GET_PCDWORD(src); - AND_DWORD(tmp, src); + DWORD_AND(tmp, src); } -void +void CPUCALL TEST_EbIb(UINT32 op) { UINT32 src, tmp, madr; @@ -1032,10 +1018,10 @@ TEST_EbIb(UINT32 op) tmp = cpu_vmemoryread(CPU_INST_SEGREG_INDEX, madr); } GET_PCBYTE(src); - AND_BYTE(tmp, src); + BYTE_AND(tmp, src); } -void +void CPUCALL TEST_EwIw(UINT32 op) { UINT32 src, tmp, madr; @@ -1049,10 +1035,10 @@ TEST_EwIw(UINT32 op) tmp = cpu_vmemoryread_w(CPU_INST_SEGREG_INDEX, madr); } GET_PCWORD(src); - AND_WORD(tmp, src); + WORD_AND(tmp, src); } -void +void CPUCALL TEST_EdId(UINT32 op) { UINT32 src, tmp, madr; @@ -1066,5 +1052,5 @@ TEST_EdId(UINT32 op) tmp = cpu_vmemoryread_d(CPU_INST_SEGREG_INDEX, madr); } GET_PCDWORD(src); - AND_DWORD(tmp, src); + DWORD_AND(tmp, src); }