--- np2/i386c/ia32/instructions/ctrl_trans.c 2005/02/04 05:32:24 1.17 +++ np2/i386c/ia32/instructions/ctrl_trans.c 2008/01/25 17:49:46 1.21 @@ -1,4 +1,4 @@ -/* $Id: ctrl_trans.c,v 1.17 2005/02/04 05:32:24 yui Exp $ */ +/* $Id: ctrl_trans.c,v 1.21 2008/01/25 17:49:46 monaka Exp $ */ /* * Copyright (c) 2002-2003 NONAKA Kimihiro @@ -12,8 +12,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES @@ -34,6 +32,10 @@ #include "ctrl_trans.h" +#if defined(ENABLE_TRAP) +#include "inttrap.h" +#endif + /* * JMP @@ -1148,28 +1150,11 @@ IRET(void) UINT32 new_ip; UINT32 new_flags; UINT32 new_cs; -#if !defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) UINT32 mask; -#endif if (!CPU_STAT_PM) { /* Real mode */ CPU_WORKCLOCK(22); -#if defined(IA32_DONT_USE_SET_EFLAGS_FUNCTION) - if (!CPU_INST_OP32) { - POP0_16(new_ip); - POP0_16(new_cs); - POP0_16(new_flags); - CPU_FLAG = new_flags & ALL_FLAG; - } else { - POP0_32(new_ip); - POP0_32(new_cs); - POP0_32(new_flags); - CPU_EFLAG = (new_flags & (ALL_FLAG|RF_FLAG|AC_FLAG|ID_FLAG)) | (CPU_EFLAG & (VM_FLAG|VIF_FLAG|VIP_FLAG)); - } - CPU_OV = CPU_FLAG & O_FLAG; - CPU_TRAP = (CPU_FLAG & (I_FLAG|T_FLAG)) == (I_FLAG|T_FLAG); -#else mask = I_FLAG|IOPL_FLAG; if (!CPU_INST_OP32) { POP0_16(new_ip); @@ -1183,7 +1168,6 @@ IRET(void) } set_eflags(new_flags, mask); -#endif CPU_SET_SEGREG(CPU_CS_INDEX, (UINT16)new_cs); SET_EIP(new_ip); @@ -1238,14 +1222,9 @@ INT_Ib(void) CPU_WORKCLOCK(37); if (!CPU_STAT_PM || !CPU_STAT_VM86 || (CPU_STAT_IOPL == CPU_IOPL3)) { GET_PCBYTE(vect); -if (vect == 0x50) { - if (CPU_AH == 0) { - TRACEOUT(("INT50 AX=%.4x %.4x:%.4x", CPU_AX, CPU_ES, CPU_DI)); - } - else if ((CPU_AH != 0x09) && (CPU_AH != 0x0b) && (CPU_AH != 0x11) && (CPU_AH != 0x14)) { - TRACEOUT(("INT50 AX=%.4x", CPU_AX)); - } -} +#if defined(ENABLE_TRAP) + softinttrap(CPU_CS, CPU_EIP - 2, vect); +#endif INTERRUPT(vect, -1, 0, 0); return; }