--- np2/i386c/ia32/instructions/data_trans.c	2011/12/20 01:17:30	1.21
+++ np2/i386c/ia32/instructions/data_trans.c	2012/01/08 19:09:40	1.23
@@ -743,7 +743,7 @@ CMOVNLE_GdEd(void)
 /*
  * XCHG
  */
-static UINT32
+static UINT32 CPUCALL
 XCHG(UINT32 dst, void *arg)
 {
 	UINT32 src = PTR_TO_UINT32(arg);
@@ -765,7 +765,7 @@ XCHG_EbGb(void)
 	} else {
 		CPU_WORKCLOCK(5);
 		madr = calc_ea_dst(op);
-		*src = (UINT8)cpu_memory_access_va_RMW(CPU_INST_SEGREG_INDEX, madr, XCHG, UINT32_TO_PTR(*src));
+		*src = (UINT8)cpu_vmemory_RMW_b(CPU_INST_SEGREG_INDEX, madr, XCHG, UINT32_TO_PTR(*src));
 	}
 }
 
@@ -783,7 +783,7 @@ XCHG_EwGw(void)
 	} else {
 		CPU_WORKCLOCK(5);
 		madr = calc_ea_dst(op);
-		*src = (UINT16)cpu_memory_access_va_RMW_w(CPU_INST_SEGREG_INDEX, madr, XCHG, UINT32_TO_PTR(*src));
+		*src = (UINT16)cpu_vmemory_RMW_w(CPU_INST_SEGREG_INDEX, madr, XCHG, UINT32_TO_PTR(*src));
 	}
 }
 
@@ -801,7 +801,7 @@ XCHG_EdGd(void)
 	} else {
 		CPU_WORKCLOCK(5);
 		madr = calc_ea_dst(op);
-		*src = cpu_memory_access_va_RMW_d(CPU_INST_SEGREG_INDEX, madr, XCHG, UINT32_TO_PTR(*src));
+		*src = cpu_vmemory_RMW_d(CPU_INST_SEGREG_INDEX, madr, XCHG, UINT32_TO_PTR(*src));
 	}
 }
 
@@ -826,7 +826,7 @@ void XCHG_EDIEAX(void) { CPU_WORKCLOCK(3
 /*
  * BSWAP
  */
-static INLINE UINT32
+static INLINE UINT32 CPUCALL
 BSWAP_DWORD(UINT32 val)
 {
 	UINT32 v;
@@ -849,7 +849,7 @@ void BSWAP_EDI(void) { CPU_WORKCLOCK(2);
 /*
  * XADD
  */
-static UINT32
+static UINT32 CPUCALL
 XADD1(UINT32 dst, void *arg)
 {
 	UINT32 src = PTR_TO_UINT32(arg);
@@ -858,7 +858,7 @@ XADD1(UINT32 dst, void *arg)
 	return res;
 }
 
-static UINT32
+static UINT32 CPUCALL
 XADD2(UINT32 dst, void *arg)
 {
 	UINT32 src = PTR_TO_UINT32(arg);
@@ -867,7 +867,7 @@ XADD2(UINT32 dst, void *arg)
 	return res;
 }
 
-static UINT32
+static UINT32 CPUCALL
 XADD4(UINT32 dst, void *arg)
 {
 	UINT32 src = PTR_TO_UINT32(arg);
@@ -893,7 +893,7 @@ XADD_EbGb(void)
 	} else {
 		CPU_WORKCLOCK(7);
 		madr = calc_ea_dst(op);
-		*src = (UINT8)cpu_memory_access_va_RMW(CPU_INST_SEGREG_INDEX, madr, XADD1, UINT32_TO_PTR(*src));
+		*src = (UINT8)cpu_vmemory_RMW_b(CPU_INST_SEGREG_INDEX, madr, XADD1, UINT32_TO_PTR(*src));
 	}
 }
 
@@ -914,7 +914,7 @@ XADD_EwGw(void)
 	} else {
 		CPU_WORKCLOCK(7);
 		madr = calc_ea_dst(op);
-		*src = (UINT16)cpu_memory_access_va_RMW_w(CPU_INST_SEGREG_INDEX, madr, XADD2, UINT32_TO_PTR(*src));
+		*src = (UINT16)cpu_vmemory_RMW_w(CPU_INST_SEGREG_INDEX, madr, XADD2, UINT32_TO_PTR(*src));
 	}
 }
 
@@ -935,7 +935,7 @@ XADD_EdGd(void)
 	} else {
 		CPU_WORKCLOCK(7);
 		madr = calc_ea_dst(op);
-		*src = cpu_memory_access_va_RMW_d(CPU_INST_SEGREG_INDEX, madr, XADD4, UINT32_TO_PTR(*src));
+		*src = cpu_vmemory_RMW_d(CPU_INST_SEGREG_INDEX, madr, XADD4, UINT32_TO_PTR(*src));
 	}
 }
 
@@ -1029,7 +1029,7 @@ CMPXCHG_EdGd(void)
 	DWORD_SUB(tmp, eax, dst);
 }
 
-void
+void CPUCALL
 CMPXCHG8B(UINT32 op)
 {
 	UINT32 madr, dst_l, dst_h;
@@ -1074,7 +1074,7 @@ void PUSH_EBP(void) { CPU_WORKCLOCK(3); 
 void PUSH_ESI(void) { CPU_WORKCLOCK(3); PUSH0_32(CPU_ESI); }
 void PUSH_EDI(void) { CPU_WORKCLOCK(3); PUSH0_32(CPU_EDI); }
 
-void
+void CPUCALL
 PUSH_Ew(UINT32 op)
 {
 	UINT32 dst, madr;
@@ -1090,7 +1090,7 @@ PUSH_Ew(UINT32 op)
 	PUSH0_16(dst);
 }
 
-void
+void CPUCALL
 PUSH_Ed(UINT32 op)
 {
 	UINT32 dst, madr;
@@ -1191,7 +1191,7 @@ POP_Ew(void)
 	CPU_CLEAR_PREV_ESP();
 }
 
-void
+void CPUCALL
 POP_Ew_G5(UINT32 op)
 {
 	UINT32 madr;
@@ -1230,7 +1230,7 @@ POP_Ed(void)
 	CPU_CLEAR_PREV_ESP();
 }
 
-void
+void CPUCALL
 POP_Ed_G5(UINT32 op)
 {
 	UINT32 src, madr;